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-rw-r--r--arch/arm/mach-s5pv310/include/mach/pwm-clock.h70
-rw-r--r--arch/arm/mach-s5pv310/localtimer.c25
-rw-r--r--arch/arm/mach-s5pv310/time.c287
-rw-r--r--arch/arm/plat-s5p/include/plat/s5pv310.h1
-rw-r--r--arch/arm/plat-samsung/Makefile2
5 files changed, 384 insertions, 1 deletions
diff --git a/arch/arm/mach-s5pv310/include/mach/pwm-clock.h b/arch/arm/mach-s5pv310/include/mach/pwm-clock.h
new file mode 100644
index 000000000000..7e6da2701088
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/pwm-clock.h
@@ -0,0 +1,70 @@
1/* linux/arch/arm/mach-s5pv310/include/mach/pwm-clock.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
12 *
13 * S5PV310 - pwm clock and timer support
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18*/
19
20#ifndef __ASM_ARCH_PWMCLK_H
21#define __ASM_ARCH_PWMCLK_H __FILE__
22
23/**
24 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
25 * @tcfg: The timer TCFG1 register bits shifted down to 0.
26 *
27 * Return true if the given configuration from TCFG1 is a TCLK instead
28 * any of the TDIV clocks.
29 */
30static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
31{
32 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
33}
34
35/**
36 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
37 * @tcfg1: The tcfg1 setting, shifted down.
38 *
39 * Get the divisor value for the given tcfg1 setting. We assume the
40 * caller has already checked to see if this is not a TCLK source.
41 */
42static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
43{
44 return 1 << tcfg1;
45}
46
47/**
48 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
49 *
50 * Return true if we have a /1 in the tdiv setting.
51 */
52static inline unsigned int pwm_tdiv_has_div1(void)
53{
54 return 1;
55}
56
57/**
58 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
59 * @div: The divisor to calculate the bit information for.
60 *
61 * Turn a divisor into the necessary bit field for TCFG1.
62 */
63static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
64{
65 return ilog2(div);
66}
67
68#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
69
70#endif /* __ASM_ARCH_PWMCLK_H */
diff --git a/arch/arm/mach-s5pv310/localtimer.c b/arch/arm/mach-s5pv310/localtimer.c
new file mode 100644
index 000000000000..2784036cd8b1
--- /dev/null
+++ b/arch/arm/mach-s5pv310/localtimer.c
@@ -0,0 +1,25 @@
1/* linux/arch/arm/mach-s5pv310/localtimer.c
2 *
3 * Cloned from linux/arch/arm/mach-realview/localtimer.c
4 *
5 * Copyright (C) 2002 ARM Ltd.
6 * All Rights Reserved
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/clockchips.h>
14
15#include <asm/irq.h>
16#include <asm/localtimer.h>
17
18/*
19 * Setup the local clock events for a CPU.
20 */
21void __cpuinit local_timer_setup(struct clock_event_device *evt)
22{
23 evt->irq = IRQ_LOCALTIMER;
24 twd_timer_setup(evt);
25}
diff --git a/arch/arm/mach-s5pv310/time.c b/arch/arm/mach-s5pv310/time.c
new file mode 100644
index 000000000000..01b012ad1bfd
--- /dev/null
+++ b/arch/arm/mach-s5pv310/time.c
@@ -0,0 +1,287 @@
1/* linux/arch/arm/mach-s5pv310/time.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV310 (and compatible) HRT support
7 * PWM 2/4 is used for this feature
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/sched.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/err.h>
18#include <linux/clk.h>
19#include <linux/clockchips.h>
20#include <linux/platform_device.h>
21
22#include <asm/smp_twd.h>
23
24#include <mach/map.h>
25#include <plat/regs-timer.h>
26#include <asm/mach/time.h>
27
28static unsigned long clock_count_per_tick;
29
30static struct clk *tin2;
31static struct clk *tin4;
32static struct clk *tdiv2;
33static struct clk *tdiv4;
34static struct clk *timerclk;
35
36static void s5pv310_pwm_stop(unsigned int pwm_id)
37{
38 unsigned long tcon;
39
40 tcon = __raw_readl(S3C2410_TCON);
41
42 switch (pwm_id) {
43 case 2:
44 tcon &= ~S3C2410_TCON_T2START;
45 break;
46 case 4:
47 tcon &= ~S3C2410_TCON_T4START;
48 break;
49 default:
50 break;
51 }
52 __raw_writel(tcon, S3C2410_TCON);
53}
54
55static void s5pv310_pwm_init(unsigned int pwm_id, unsigned long tcnt)
56{
57 unsigned long tcon;
58
59 tcon = __raw_readl(S3C2410_TCON);
60
61 /* timers reload after counting zero, so reduce the count by 1 */
62 tcnt--;
63
64 /* ensure timer is stopped... */
65 switch (pwm_id) {
66 case 2:
67 tcon &= ~(0xf<<12);
68 tcon |= S3C2410_TCON_T2MANUALUPD;
69
70 __raw_writel(tcnt, S3C2410_TCNTB(2));
71 __raw_writel(tcnt, S3C2410_TCMPB(2));
72 __raw_writel(tcon, S3C2410_TCON);
73
74 break;
75 case 4:
76 tcon &= ~(7<<20);
77 tcon |= S3C2410_TCON_T4MANUALUPD;
78
79 __raw_writel(tcnt, S3C2410_TCNTB(4));
80 __raw_writel(tcnt, S3C2410_TCMPB(4));
81 __raw_writel(tcon, S3C2410_TCON);
82
83 break;
84 default:
85 break;
86 }
87}
88
89static inline void s5pv310_pwm_start(unsigned int pwm_id, bool periodic)
90{
91 unsigned long tcon;
92
93 tcon = __raw_readl(S3C2410_TCON);
94
95 switch (pwm_id) {
96 case 2:
97 tcon |= S3C2410_TCON_T2START;
98 tcon &= ~S3C2410_TCON_T2MANUALUPD;
99
100 if (periodic)
101 tcon |= S3C2410_TCON_T2RELOAD;
102 else
103 tcon &= ~S3C2410_TCON_T2RELOAD;
104 break;
105 case 4:
106 tcon |= S3C2410_TCON_T4START;
107 tcon &= ~S3C2410_TCON_T4MANUALUPD;
108
109 if (periodic)
110 tcon |= S3C2410_TCON_T4RELOAD;
111 else
112 tcon &= ~S3C2410_TCON_T4RELOAD;
113 break;
114 default:
115 break;
116 }
117 __raw_writel(tcon, S3C2410_TCON);
118}
119
120static int s5pv310_pwm_set_next_event(unsigned long cycles,
121 struct clock_event_device *evt)
122{
123 s5pv310_pwm_init(2, cycles);
124 s5pv310_pwm_start(2, 0);
125 return 0;
126}
127
128static void s5pv310_pwm_set_mode(enum clock_event_mode mode,
129 struct clock_event_device *evt)
130{
131 s5pv310_pwm_stop(2);
132
133 switch (mode) {
134 case CLOCK_EVT_MODE_PERIODIC:
135 s5pv310_pwm_init(2, clock_count_per_tick);
136 s5pv310_pwm_start(2, 1);
137 break;
138 case CLOCK_EVT_MODE_ONESHOT:
139 break;
140 case CLOCK_EVT_MODE_UNUSED:
141 case CLOCK_EVT_MODE_SHUTDOWN:
142 case CLOCK_EVT_MODE_RESUME:
143 break;
144 }
145}
146
147static struct clock_event_device pwm_event_device = {
148 .name = "pwm_timer2",
149 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
150 .rating = 200,
151 .shift = 32,
152 .set_next_event = s5pv310_pwm_set_next_event,
153 .set_mode = s5pv310_pwm_set_mode,
154};
155
156irqreturn_t s5pv310_clock_event_isr(int irq, void *dev_id)
157{
158 struct clock_event_device *evt = &pwm_event_device;
159
160 evt->event_handler(evt);
161
162 return IRQ_HANDLED;
163}
164
165static struct irqaction s5pv310_clock_event_irq = {
166 .name = "pwm_timer2_irq",
167 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
168 .handler = s5pv310_clock_event_isr,
169};
170
171static void __init s5pv310_clockevent_init(void)
172{
173 unsigned long pclk;
174 unsigned long clock_rate;
175 struct clk *tscaler;
176
177 pclk = clk_get_rate(timerclk);
178
179 /* configure clock tick */
180
181 tscaler = clk_get_parent(tdiv2);
182
183 clk_set_rate(tscaler, pclk / 2);
184 clk_set_rate(tdiv2, pclk / 2);
185 clk_set_parent(tin2, tdiv2);
186
187 clock_rate = clk_get_rate(tin2);
188
189 clock_count_per_tick = clock_rate / HZ;
190
191 pwm_event_device.mult =
192 div_sc(clock_rate, NSEC_PER_SEC, pwm_event_device.shift);
193 pwm_event_device.max_delta_ns =
194 clockevent_delta2ns(-1, &pwm_event_device);
195 pwm_event_device.min_delta_ns =
196 clockevent_delta2ns(1, &pwm_event_device);
197
198 pwm_event_device.cpumask = cpumask_of(0);
199 clockevents_register_device(&pwm_event_device);
200
201 setup_irq(IRQ_TIMER2, &s5pv310_clock_event_irq);
202}
203
204static cycle_t s5pv310_pwm4_read(struct clocksource *cs)
205{
206 return (cycle_t) ~__raw_readl(S3C_TIMERREG(0x40));
207}
208
209struct clocksource pwm_clocksource = {
210 .name = "pwm_timer4",
211 .rating = 250,
212 .read = s5pv310_pwm4_read,
213 .mask = CLOCKSOURCE_MASK(32),
214 .shift = 20,
215 .flags = CLOCK_SOURCE_IS_CONTINUOUS ,
216};
217
218static void __init s5pv310_clocksource_init(void)
219{
220 unsigned long pclk;
221 unsigned long clock_rate;
222
223 pclk = clk_get_rate(timerclk);
224
225 clk_set_rate(tdiv4, pclk / 2);
226 clk_set_parent(tin4, tdiv4);
227
228 clock_rate = clk_get_rate(tin4);
229
230 s5pv310_pwm_init(4, ~0);
231 s5pv310_pwm_start(4, 1);
232
233 pwm_clocksource.mult =
234 clocksource_khz2mult(clock_rate/1000, pwm_clocksource.shift);
235
236 if (clocksource_register(&pwm_clocksource))
237 panic("%s: can't register clocksource\n", pwm_clocksource.name);
238}
239
240static void __init s5pv310_timer_resources(void)
241{
242 struct platform_device tmpdev;
243
244 tmpdev.dev.bus = &platform_bus_type;
245
246 timerclk = clk_get(NULL, "timers");
247 if (IS_ERR(timerclk))
248 panic("failed to get timers clock for system timer");
249
250 clk_enable(timerclk);
251
252 tmpdev.id = 2;
253 tin2 = clk_get(&tmpdev.dev, "pwm-tin");
254 if (IS_ERR(tin2))
255 panic("failed to get pwm-tin2 clock for system timer");
256
257 tdiv2 = clk_get(&tmpdev.dev, "pwm-tdiv");
258 if (IS_ERR(tdiv2))
259 panic("failed to get pwm-tdiv2 clock for system timer");
260 clk_enable(tin2);
261
262 tmpdev.id = 4;
263 tin4 = clk_get(&tmpdev.dev, "pwm-tin");
264 if (IS_ERR(tin4))
265 panic("failed to get pwm-tin4 clock for system timer");
266
267 tdiv4 = clk_get(&tmpdev.dev, "pwm-tdiv");
268 if (IS_ERR(tdiv4))
269 panic("failed to get pwm-tdiv4 clock for system timer");
270
271 clk_enable(tin4);
272}
273
274static void __init s5pv310_timer_init(void)
275{
276#ifdef CONFIG_LOCAL_TIMERS
277 twd_base = S5P_VA_TWD;
278#endif
279
280 s5pv310_timer_resources();
281 s5pv310_clockevent_init();
282 s5pv310_clocksource_init();
283}
284
285struct sys_timer s5pv310_timer = {
286 .init = s5pv310_timer_init,
287};
diff --git a/arch/arm/plat-s5p/include/plat/s5pv310.h b/arch/arm/plat-s5p/include/plat/s5pv310.h
index d2f05e1cad9d..769c991ceb37 100644
--- a/arch/arm/plat-s5p/include/plat/s5pv310.h
+++ b/arch/arm/plat-s5p/include/plat/s5pv310.h
@@ -22,6 +22,7 @@ extern int s5pv310_init(void);
22extern void s5pv310_init_irq(void); 22extern void s5pv310_init_irq(void);
23extern void s5pv310_map_io(void); 23extern void s5pv310_map_io(void);
24extern void s5pv310_init_clocks(int xtal); 24extern void s5pv310_init_clocks(int xtal);
25extern struct sys_timer s5pv310_timer;
25 26
26#define s5pv310_init_uarts s5pv310_common_init_uarts 27#define s5pv310_init_uarts s5pv310_common_init_uarts
27 28
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index b1d82cc5e716..0d5bf8a20a63 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -12,7 +12,7 @@ obj- :=
12# Objects we always build independent of SoC choice 12# Objects we always build independent of SoC choice
13 13
14obj-y += init.o 14obj-y += init.o
15obj-y += time.o 15obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o
16obj-y += clock.o 16obj-y += clock.o
17obj-y += pwm-clock.o 17obj-y += pwm-clock.o
18obj-y += gpio.o 18obj-y += gpio.o