diff options
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_connector.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_drv.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimd.c | 27 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_cs.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_connectors.c | 25 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_gart.c | 2 | ||||
-rw-r--r-- | include/drm/Kbuild | 1 | ||||
-rw-r--r-- | include/drm/exynos_drm.h | 22 |
10 files changed, 79 insertions, 48 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c index d620b0784257..618bd4d87d28 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_connector.c +++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include "drmP.h" | 28 | #include "drmP.h" |
29 | #include "drm_crtc_helper.h" | 29 | #include "drm_crtc_helper.h" |
30 | 30 | ||
31 | #include <drm/exynos_drm.h> | ||
31 | #include "exynos_drm_drv.h" | 32 | #include "exynos_drm_drv.h" |
32 | #include "exynos_drm_encoder.h" | 33 | #include "exynos_drm_encoder.h" |
33 | 34 | ||
@@ -44,8 +45,9 @@ struct exynos_drm_connector { | |||
44 | /* convert exynos_video_timings to drm_display_mode */ | 45 | /* convert exynos_video_timings to drm_display_mode */ |
45 | static inline void | 46 | static inline void |
46 | convert_to_display_mode(struct drm_display_mode *mode, | 47 | convert_to_display_mode(struct drm_display_mode *mode, |
47 | struct fb_videomode *timing) | 48 | struct exynos_drm_panel_info *panel) |
48 | { | 49 | { |
50 | struct fb_videomode *timing = &panel->timing; | ||
49 | DRM_DEBUG_KMS("%s\n", __FILE__); | 51 | DRM_DEBUG_KMS("%s\n", __FILE__); |
50 | 52 | ||
51 | mode->clock = timing->pixclock / 1000; | 53 | mode->clock = timing->pixclock / 1000; |
@@ -60,6 +62,8 @@ convert_to_display_mode(struct drm_display_mode *mode, | |||
60 | mode->vsync_start = mode->vdisplay + timing->upper_margin; | 62 | mode->vsync_start = mode->vdisplay + timing->upper_margin; |
61 | mode->vsync_end = mode->vsync_start + timing->vsync_len; | 63 | mode->vsync_end = mode->vsync_start + timing->vsync_len; |
62 | mode->vtotal = mode->vsync_end + timing->lower_margin; | 64 | mode->vtotal = mode->vsync_end + timing->lower_margin; |
65 | mode->width_mm = panel->width_mm; | ||
66 | mode->height_mm = panel->height_mm; | ||
63 | 67 | ||
64 | if (timing->vmode & FB_VMODE_INTERLACED) | 68 | if (timing->vmode & FB_VMODE_INTERLACED) |
65 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | 69 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
@@ -148,16 +152,18 @@ static int exynos_drm_connector_get_modes(struct drm_connector *connector) | |||
148 | connector->display_info.raw_edid = edid; | 152 | connector->display_info.raw_edid = edid; |
149 | } else { | 153 | } else { |
150 | struct drm_display_mode *mode = drm_mode_create(connector->dev); | 154 | struct drm_display_mode *mode = drm_mode_create(connector->dev); |
151 | struct fb_videomode *timing; | 155 | struct exynos_drm_panel_info *panel; |
152 | 156 | ||
153 | if (display_ops->get_timing) | 157 | if (display_ops->get_panel) |
154 | timing = display_ops->get_timing(manager->dev); | 158 | panel = display_ops->get_panel(manager->dev); |
155 | else { | 159 | else { |
156 | drm_mode_destroy(connector->dev, mode); | 160 | drm_mode_destroy(connector->dev, mode); |
157 | return 0; | 161 | return 0; |
158 | } | 162 | } |
159 | 163 | ||
160 | convert_to_display_mode(mode, timing); | 164 | convert_to_display_mode(mode, panel); |
165 | connector->display_info.width_mm = mode->width_mm; | ||
166 | connector->display_info.height_mm = mode->height_mm; | ||
161 | 167 | ||
162 | mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; | 168 | mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; |
163 | drm_mode_set_name(mode); | 169 | drm_mode_set_name(mode); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index e685e1e33055..13540de90bfc 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h | |||
@@ -136,7 +136,7 @@ struct exynos_drm_overlay { | |||
136 | * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI. | 136 | * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI. |
137 | * @is_connected: check for that display is connected or not. | 137 | * @is_connected: check for that display is connected or not. |
138 | * @get_edid: get edid modes from display driver. | 138 | * @get_edid: get edid modes from display driver. |
139 | * @get_timing: get timing object from display driver. | 139 | * @get_panel: get panel object from display driver. |
140 | * @check_timing: check if timing is valid or not. | 140 | * @check_timing: check if timing is valid or not. |
141 | * @power_on: display device on or off. | 141 | * @power_on: display device on or off. |
142 | */ | 142 | */ |
@@ -145,7 +145,7 @@ struct exynos_drm_display_ops { | |||
145 | bool (*is_connected)(struct device *dev); | 145 | bool (*is_connected)(struct device *dev); |
146 | int (*get_edid)(struct device *dev, struct drm_connector *connector, | 146 | int (*get_edid)(struct device *dev, struct drm_connector *connector, |
147 | u8 *edid, int len); | 147 | u8 *edid, int len); |
148 | void *(*get_timing)(struct device *dev); | 148 | void *(*get_panel)(struct device *dev); |
149 | int (*check_timing)(struct device *dev, void *timing); | 149 | int (*check_timing)(struct device *dev, void *timing); |
150 | int (*power_on)(struct device *dev, int mode); | 150 | int (*power_on)(struct device *dev, int mode); |
151 | }; | 151 | }; |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 0dbb32bb18a3..360adf2bba04 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c | |||
@@ -89,7 +89,7 @@ struct fimd_context { | |||
89 | bool suspended; | 89 | bool suspended; |
90 | struct mutex lock; | 90 | struct mutex lock; |
91 | 91 | ||
92 | struct fb_videomode *timing; | 92 | struct exynos_drm_panel_info *panel; |
93 | }; | 93 | }; |
94 | 94 | ||
95 | static bool fimd_display_is_connected(struct device *dev) | 95 | static bool fimd_display_is_connected(struct device *dev) |
@@ -101,13 +101,13 @@ static bool fimd_display_is_connected(struct device *dev) | |||
101 | return true; | 101 | return true; |
102 | } | 102 | } |
103 | 103 | ||
104 | static void *fimd_get_timing(struct device *dev) | 104 | static void *fimd_get_panel(struct device *dev) |
105 | { | 105 | { |
106 | struct fimd_context *ctx = get_fimd_context(dev); | 106 | struct fimd_context *ctx = get_fimd_context(dev); |
107 | 107 | ||
108 | DRM_DEBUG_KMS("%s\n", __FILE__); | 108 | DRM_DEBUG_KMS("%s\n", __FILE__); |
109 | 109 | ||
110 | return ctx->timing; | 110 | return ctx->panel; |
111 | } | 111 | } |
112 | 112 | ||
113 | static int fimd_check_timing(struct device *dev, void *timing) | 113 | static int fimd_check_timing(struct device *dev, void *timing) |
@@ -131,7 +131,7 @@ static int fimd_display_power_on(struct device *dev, int mode) | |||
131 | static struct exynos_drm_display_ops fimd_display_ops = { | 131 | static struct exynos_drm_display_ops fimd_display_ops = { |
132 | .type = EXYNOS_DISPLAY_TYPE_LCD, | 132 | .type = EXYNOS_DISPLAY_TYPE_LCD, |
133 | .is_connected = fimd_display_is_connected, | 133 | .is_connected = fimd_display_is_connected, |
134 | .get_timing = fimd_get_timing, | 134 | .get_panel = fimd_get_panel, |
135 | .check_timing = fimd_check_timing, | 135 | .check_timing = fimd_check_timing, |
136 | .power_on = fimd_display_power_on, | 136 | .power_on = fimd_display_power_on, |
137 | }; | 137 | }; |
@@ -193,7 +193,8 @@ static void fimd_apply(struct device *subdrv_dev) | |||
193 | static void fimd_commit(struct device *dev) | 193 | static void fimd_commit(struct device *dev) |
194 | { | 194 | { |
195 | struct fimd_context *ctx = get_fimd_context(dev); | 195 | struct fimd_context *ctx = get_fimd_context(dev); |
196 | struct fb_videomode *timing = ctx->timing; | 196 | struct exynos_drm_panel_info *panel = ctx->panel; |
197 | struct fb_videomode *timing = &panel->timing; | ||
197 | u32 val; | 198 | u32 val; |
198 | 199 | ||
199 | if (ctx->suspended) | 200 | if (ctx->suspended) |
@@ -786,7 +787,7 @@ static int __devinit fimd_probe(struct platform_device *pdev) | |||
786 | struct fimd_context *ctx; | 787 | struct fimd_context *ctx; |
787 | struct exynos_drm_subdrv *subdrv; | 788 | struct exynos_drm_subdrv *subdrv; |
788 | struct exynos_drm_fimd_pdata *pdata; | 789 | struct exynos_drm_fimd_pdata *pdata; |
789 | struct fb_videomode *timing; | 790 | struct exynos_drm_panel_info *panel; |
790 | struct resource *res; | 791 | struct resource *res; |
791 | int win; | 792 | int win; |
792 | int ret = -EINVAL; | 793 | int ret = -EINVAL; |
@@ -799,9 +800,9 @@ static int __devinit fimd_probe(struct platform_device *pdev) | |||
799 | return -EINVAL; | 800 | return -EINVAL; |
800 | } | 801 | } |
801 | 802 | ||
802 | timing = &pdata->timing; | 803 | panel = &pdata->panel; |
803 | if (!timing) { | 804 | if (!panel) { |
804 | dev_err(dev, "timing is null.\n"); | 805 | dev_err(dev, "panel is null.\n"); |
805 | return -EINVAL; | 806 | return -EINVAL; |
806 | } | 807 | } |
807 | 808 | ||
@@ -863,16 +864,16 @@ static int __devinit fimd_probe(struct platform_device *pdev) | |||
863 | goto err_req_irq; | 864 | goto err_req_irq; |
864 | } | 865 | } |
865 | 866 | ||
866 | ctx->clkdiv = fimd_calc_clkdiv(ctx, timing); | 867 | ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing); |
867 | ctx->vidcon0 = pdata->vidcon0; | 868 | ctx->vidcon0 = pdata->vidcon0; |
868 | ctx->vidcon1 = pdata->vidcon1; | 869 | ctx->vidcon1 = pdata->vidcon1; |
869 | ctx->default_win = pdata->default_win; | 870 | ctx->default_win = pdata->default_win; |
870 | ctx->timing = timing; | 871 | ctx->panel = panel; |
871 | 872 | ||
872 | timing->pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv; | 873 | panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv; |
873 | 874 | ||
874 | DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n", | 875 | DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n", |
875 | timing->pixclock, ctx->clkdiv); | 876 | panel->timing.pixclock, ctx->clkdiv); |
876 | 877 | ||
877 | subdrv = &ctx->subdrv; | 878 | subdrv = &ctx->subdrv; |
878 | 879 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f425b23e3803..f851db7be2cc 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -4680,8 +4680,17 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane, | |||
4680 | 4680 | ||
4681 | crtc = intel_get_crtc_for_plane(dev, plane); | 4681 | crtc = intel_get_crtc_for_plane(dev, plane); |
4682 | clock = crtc->mode.clock; | 4682 | clock = crtc->mode.clock; |
4683 | if (!clock) { | ||
4684 | *sprite_wm = 0; | ||
4685 | return false; | ||
4686 | } | ||
4683 | 4687 | ||
4684 | line_time_us = (sprite_width * 1000) / clock; | 4688 | line_time_us = (sprite_width * 1000) / clock; |
4689 | if (!line_time_us) { | ||
4690 | *sprite_wm = 0; | ||
4691 | return false; | ||
4692 | } | ||
4693 | |||
4685 | line_count = (latency_ns / line_time_us + 1000) / 1000; | 4694 | line_count = (latency_ns / line_time_us + 1000) / 1000; |
4686 | line_size = sprite_width * pixel_size; | 4695 | line_size = sprite_width * pixel_size; |
4687 | 4696 | ||
@@ -6175,7 +6184,7 @@ void intel_crtc_load_lut(struct drm_crtc *crtc) | |||
6175 | int i; | 6184 | int i; |
6176 | 6185 | ||
6177 | /* The clocks have to be on to load the palette. */ | 6186 | /* The clocks have to be on to load the palette. */ |
6178 | if (!crtc->enabled) | 6187 | if (!crtc->enabled || !intel_crtc->active) |
6179 | return; | 6188 | return; |
6180 | 6189 | ||
6181 | /* use legacy palette for Ironlake */ | 6190 | /* use legacy palette for Ironlake */ |
@@ -6561,7 +6570,7 @@ intel_framebuffer_create_for_mode(struct drm_device *dev, | |||
6561 | mode_cmd.height = mode->vdisplay; | 6570 | mode_cmd.height = mode->vdisplay; |
6562 | mode_cmd.pitches[0] = intel_framebuffer_pitch_for_width(mode_cmd.width, | 6571 | mode_cmd.pitches[0] = intel_framebuffer_pitch_for_width(mode_cmd.width, |
6563 | bpp); | 6572 | bpp); |
6564 | mode_cmd.pixel_format = 0; | 6573 | mode_cmd.pixel_format = drm_mode_legacy_fb_format(bpp, depth); |
6565 | 6574 | ||
6566 | return intel_framebuffer_create(dev, &mode_cmd, obj); | 6575 | return intel_framebuffer_create(dev, &mode_cmd, obj); |
6567 | } | 6576 | } |
@@ -8185,7 +8194,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) | |||
8185 | 8194 | ||
8186 | if (intel_enable_rc6(dev_priv->dev)) | 8195 | if (intel_enable_rc6(dev_priv->dev)) |
8187 | rc6_mask = GEN6_RC_CTL_RC6_ENABLE | | 8196 | rc6_mask = GEN6_RC_CTL_RC6_ENABLE | |
8188 | (IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0; | 8197 | ((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0); |
8189 | 8198 | ||
8190 | I915_WRITE(GEN6_RC_CONTROL, | 8199 | I915_WRITE(GEN6_RC_CONTROL, |
8191 | rc6_mask | | 8200 | rc6_mask | |
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 1ab842c6032e..536191540b03 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
@@ -301,7 +301,7 @@ static int init_ring_common(struct intel_ring_buffer *ring) | |||
301 | 301 | ||
302 | I915_WRITE_CTL(ring, | 302 | I915_WRITE_CTL(ring, |
303 | ((ring->size - PAGE_SIZE) & RING_NR_PAGES) | 303 | ((ring->size - PAGE_SIZE) & RING_NR_PAGES) |
304 | | RING_REPORT_64K | RING_VALID); | 304 | | RING_VALID); |
305 | 305 | ||
306 | /* If the head is still not zero, the ring is dead */ | 306 | /* If the head is still not zero, the ring is dead */ |
307 | if ((I915_READ_CTL(ring) & RING_VALID) == 0 || | 307 | if ((I915_READ_CTL(ring) & RING_VALID) == 0 || |
@@ -1132,18 +1132,6 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n) | |||
1132 | struct drm_device *dev = ring->dev; | 1132 | struct drm_device *dev = ring->dev; |
1133 | struct drm_i915_private *dev_priv = dev->dev_private; | 1133 | struct drm_i915_private *dev_priv = dev->dev_private; |
1134 | unsigned long end; | 1134 | unsigned long end; |
1135 | u32 head; | ||
1136 | |||
1137 | /* If the reported head position has wrapped or hasn't advanced, | ||
1138 | * fallback to the slow and accurate path. | ||
1139 | */ | ||
1140 | head = intel_read_status_page(ring, 4); | ||
1141 | if (head > ring->head) { | ||
1142 | ring->head = head; | ||
1143 | ring->space = ring_space(ring); | ||
1144 | if (ring->space >= n) | ||
1145 | return 0; | ||
1146 | } | ||
1147 | 1135 | ||
1148 | trace_i915_ring_wait_begin(ring); | 1136 | trace_i915_ring_wait_begin(ring); |
1149 | if (drm_core_check_feature(dev, DRIVER_GEM)) | 1137 | if (drm_core_check_feature(dev, DRIVER_GEM)) |
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 38ce5d0427e3..387fcc9f03ef 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
@@ -1304,6 +1304,7 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, | |||
1304 | h0 = G_038004_TEX_HEIGHT(word1) + 1; | 1304 | h0 = G_038004_TEX_HEIGHT(word1) + 1; |
1305 | d0 = G_038004_TEX_DEPTH(word1); | 1305 | d0 = G_038004_TEX_DEPTH(word1); |
1306 | nfaces = 1; | 1306 | nfaces = 1; |
1307 | array = 0; | ||
1307 | switch (G_038000_DIM(word0)) { | 1308 | switch (G_038000_DIM(word0)) { |
1308 | case V_038000_SQ_TEX_DIM_1D: | 1309 | case V_038000_SQ_TEX_DIM_1D: |
1309 | case V_038000_SQ_TEX_DIM_2D: | 1310 | case V_038000_SQ_TEX_DIM_2D: |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index e7cb3ab09243..8b3d8ed52ff6 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -1117,13 +1117,23 @@ static int radeon_dp_get_modes(struct drm_connector *connector) | |||
1117 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | 1117 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { |
1118 | struct drm_display_mode *mode; | 1118 | struct drm_display_mode *mode; |
1119 | 1119 | ||
1120 | if (!radeon_dig_connector->edp_on) | 1120 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
1121 | atombios_set_edp_panel_power(connector, | 1121 | if (!radeon_dig_connector->edp_on) |
1122 | ATOM_TRANSMITTER_ACTION_POWER_ON); | 1122 | atombios_set_edp_panel_power(connector, |
1123 | ret = radeon_ddc_get_modes(radeon_connector); | 1123 | ATOM_TRANSMITTER_ACTION_POWER_ON); |
1124 | if (!radeon_dig_connector->edp_on) | 1124 | ret = radeon_ddc_get_modes(radeon_connector); |
1125 | atombios_set_edp_panel_power(connector, | 1125 | if (!radeon_dig_connector->edp_on) |
1126 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | 1126 | atombios_set_edp_panel_power(connector, |
1127 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | ||
1128 | } else { | ||
1129 | /* need to setup ddc on the bridge */ | ||
1130 | if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) != | ||
1131 | ENCODER_OBJECT_ID_NONE) { | ||
1132 | if (encoder) | ||
1133 | radeon_atom_ext_encoder_setup_ddc(encoder); | ||
1134 | } | ||
1135 | ret = radeon_ddc_get_modes(radeon_connector); | ||
1136 | } | ||
1127 | 1137 | ||
1128 | if (ret > 0) { | 1138 | if (ret > 0) { |
1129 | if (encoder) { | 1139 | if (encoder) { |
@@ -1134,7 +1144,6 @@ static int radeon_dp_get_modes(struct drm_connector *connector) | |||
1134 | return ret; | 1144 | return ret; |
1135 | } | 1145 | } |
1136 | 1146 | ||
1137 | encoder = radeon_best_single_encoder(connector); | ||
1138 | if (!encoder) | 1147 | if (!encoder) |
1139 | return 0; | 1148 | return 0; |
1140 | 1149 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index 010dad8b66ae..c58a036233fb 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c | |||
@@ -597,13 +597,13 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev, | |||
597 | if (bo_va == NULL) | 597 | if (bo_va == NULL) |
598 | return 0; | 598 | return 0; |
599 | 599 | ||
600 | list_del(&bo_va->bo_list); | ||
601 | mutex_lock(&vm->mutex); | 600 | mutex_lock(&vm->mutex); |
602 | radeon_mutex_lock(&rdev->cs_mutex); | 601 | radeon_mutex_lock(&rdev->cs_mutex); |
603 | radeon_vm_bo_update_pte(rdev, vm, bo, NULL); | 602 | radeon_vm_bo_update_pte(rdev, vm, bo, NULL); |
604 | radeon_mutex_unlock(&rdev->cs_mutex); | 603 | radeon_mutex_unlock(&rdev->cs_mutex); |
605 | list_del(&bo_va->vm_list); | 604 | list_del(&bo_va->vm_list); |
606 | mutex_unlock(&vm->mutex); | 605 | mutex_unlock(&vm->mutex); |
606 | list_del(&bo_va->bo_list); | ||
607 | 607 | ||
608 | kfree(bo_va); | 608 | kfree(bo_va); |
609 | return 0; | 609 | return 0; |
diff --git a/include/drm/Kbuild b/include/drm/Kbuild index a5c0e10fd47d..1e38a19d68f6 100644 --- a/include/drm/Kbuild +++ b/include/drm/Kbuild | |||
@@ -2,6 +2,7 @@ header-y += drm.h | |||
2 | header-y += drm_fourcc.h | 2 | header-y += drm_fourcc.h |
3 | header-y += drm_mode.h | 3 | header-y += drm_mode.h |
4 | header-y += drm_sarea.h | 4 | header-y += drm_sarea.h |
5 | header-y += exynos_drm.h | ||
5 | header-y += i810_drm.h | 6 | header-y += i810_drm.h |
6 | header-y += i915_drm.h | 7 | header-y += i915_drm.h |
7 | header-y += mga_drm.h | 8 | header-y += mga_drm.h |
diff --git a/include/drm/exynos_drm.h b/include/drm/exynos_drm.h index 5e120f1c5cd9..1ed3aae893a5 100644 --- a/include/drm/exynos_drm.h +++ b/include/drm/exynos_drm.h | |||
@@ -97,15 +97,30 @@ struct drm_exynos_plane_set_zpos { | |||
97 | #define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \ | 97 | #define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \ |
98 | DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos) | 98 | DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos) |
99 | 99 | ||
100 | #ifdef __KERNEL__ | ||
101 | |||
100 | /** | 102 | /** |
101 | * Platform Specific Structure for DRM based FIMD. | 103 | * A structure for lcd panel information. |
102 | * | 104 | * |
103 | * @timing: default video mode for initializing | 105 | * @timing: default video mode for initializing |
106 | * @width_mm: physical size of lcd width. | ||
107 | * @height_mm: physical size of lcd height. | ||
108 | */ | ||
109 | struct exynos_drm_panel_info { | ||
110 | struct fb_videomode timing; | ||
111 | u32 width_mm; | ||
112 | u32 height_mm; | ||
113 | }; | ||
114 | |||
115 | /** | ||
116 | * Platform Specific Structure for DRM based FIMD. | ||
117 | * | ||
118 | * @panel: default panel info for initializing | ||
104 | * @default_win: default window layer number to be used for UI. | 119 | * @default_win: default window layer number to be used for UI. |
105 | * @bpp: default bit per pixel. | 120 | * @bpp: default bit per pixel. |
106 | */ | 121 | */ |
107 | struct exynos_drm_fimd_pdata { | 122 | struct exynos_drm_fimd_pdata { |
108 | struct fb_videomode timing; | 123 | struct exynos_drm_panel_info panel; |
109 | u32 vidcon0; | 124 | u32 vidcon0; |
110 | u32 vidcon1; | 125 | u32 vidcon1; |
111 | unsigned int default_win; | 126 | unsigned int default_win; |
@@ -139,4 +154,5 @@ struct exynos_drm_hdmi_pdata { | |||
139 | unsigned int bpp; | 154 | unsigned int bpp; |
140 | }; | 155 | }; |
141 | 156 | ||
142 | #endif | 157 | #endif /* __KERNEL__ */ |
158 | #endif /* _EXYNOS_DRM_H_ */ | ||