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-rw-r--r--Documentation/devicetree/bindings/arm/samsung/pmu.txt15
-rw-r--r--Documentation/devicetree/bindings/clock/exynos4-clock.txt259
-rw-r--r--Documentation/devicetree/bindings/clock/exynos5250-clock.txt163
-rw-r--r--Documentation/devicetree/bindings/clock/exynos5420-clock.txt184
-rw-r--r--Documentation/devicetree/bindings/clock/exynos5440-clock.txt45
-rw-r--r--arch/arm/Kconfig.debug5
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi73
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi9
-rw-r--r--arch/arm/boot/dts/exynos4412-odroidx.dts2
-rw-r--r--arch/arm/boot/dts/exynos4412-origen.dts4
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi34
-rw-r--r--arch/arm/boot/dts/exynos5.dtsi7
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts4
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts146
-rw-r--r--arch/arm/boot/dts/exynos5250-snow.dts4
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi118
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts298
-rw-r--r--arch/arm/boot/dts/exynos5420-smdk5420.dts253
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi159
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi33
-rw-r--r--arch/arm/include/debug/samsung.S2
-rw-r--r--arch/arm/mach-exynos/common.c2
-rw-r--r--arch/arm/mach-exynos/include/mach/uncompress.h48
-rw-r--r--arch/arm/mach-exynos/pm.c148
-rw-r--r--arch/arm/mach-exynos/pm_domains.c2
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig2
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2410.c3
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2412.c3
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2440.c2
-rw-r--r--arch/arm/mach-s3c24xx/common.c3
-rw-r--r--arch/arm/mach-s3c24xx/dma-s3c2410.c2
-rw-r--r--arch/arm/mach-s3c24xx/dma-s3c2412.c2
-rw-r--r--arch/arm/mach-s3c24xx/dma-s3c2440.c2
-rw-r--r--arch/arm/mach-s3c24xx/dma-s3c2443.c2
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/rtc-core.h (renamed from arch/arm/plat-samsung/include/plat/rtc-core.h)13
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/tick.h15
-rw-r--r--arch/arm/mach-s3c24xx/mach-amlm5900.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-at2440evb.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-bast.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-gta02.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-h1940.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-jive.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-mini2440.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-n30.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-nexcoder.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-osiris.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-otom.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-qt2410.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-rx1950.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-rx3715.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-s3c2416-dt.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2410.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2413.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2416.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2440.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-smdk2443.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-tct_hammer.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-vr1000.c2
-rw-r--r--arch/arm/mach-s3c24xx/mach-vstms.c2
-rw-r--r--arch/arm/mach-s3c24xx/pm.c2
-rw-r--r--arch/arm/mach-s3c24xx/s3c2410.c2
-rw-r--r--arch/arm/mach-s3c24xx/s3c2412.c2
-rw-r--r--arch/arm/mach-s3c24xx/s3c2416.c2
-rw-r--r--arch/arm/mach-s3c24xx/s3c2443.c2
-rw-r--r--arch/arm/mach-s3c24xx/s3c244x.c2
-rw-r--r--arch/arm/mach-s3c24xx/sleep-s3c2410.S2
-rw-r--r--arch/arm/mach-s3c24xx/sleep.S2
-rw-r--r--arch/arm/mach-s3c64xx/common.c2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/tick.h31
-rw-r--r--arch/arm/mach-s3c64xx/irq-pm.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-anw6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-ncp.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6400.c3
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/s3c6400.c2
-rw-r--r--arch/arm/mach-s3c64xx/s3c6410.c2
-rw-r--r--arch/arm/mach-s5p64x0/common.c2
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/debug-macro.S3
-rw-r--r--arch/arm/mach-s5p64x0/irq-pm.c2
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c2
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c2
-rw-r--r--arch/arm/mach-s5pc100/common.c2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/tick.h31
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c2
-rw-r--r--arch/arm/mach-s5pv210/common.c2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c2
-rw-r--r--arch/arm/mach-s5pv210/mach-torbreck.c2
-rw-r--r--arch/arm/plat-samsung/clock.c2
-rw-r--r--arch/arm/plat-samsung/cpu.c7
-rw-r--r--arch/arm/plat-samsung/devs.c12
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-serial.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h2
-rw-r--r--arch/arm/plat-samsung/init.c3
-rw-r--r--arch/arm/plat-samsung/pm-gpio.c5
-rw-r--r--arch/arm/plat-samsung/pm.c3
-rw-r--r--arch/arm/plat-samsung/s5p-irq-pm.c13
-rw-r--r--drivers/clk/samsung/clk-exynos4.c172
-rw-r--r--drivers/clk/samsung/clk-exynos5250.c49
-rw-r--r--drivers/clk/samsung/clk-exynos5420.c49
-rw-r--r--drivers/clk/samsung/clk-exynos5440.c2
-rw-r--r--drivers/clk/samsung/clk-s3c64xx.c79
-rw-r--r--drivers/clk/samsung/clk.c71
-rw-r--r--drivers/clk/samsung/clk.h14
117 files changed, 1445 insertions, 1294 deletions
diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.txt b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
new file mode 100644
index 000000000000..f1f155255f28
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/samsung/pmu.txt
@@ -0,0 +1,15 @@
1SAMSUNG Exynos SoC series PMU Registers
2
3Properties:
4 - compatible : should contain two values. First value must be one from following list:
5 - "samsung,exynos5250-pmu" - for Exynos5250 SoC,
6 - "samsung,exynos5420-pmu" - for Exynos5420 SoC.
7 second value must be always "syscon".
8
9 - reg : offset and length of the register set.
10
11Example :
12pmu_system_controller: system-controller@10040000 {
13 compatible = "samsung,exynos5250-pmu", "syscon";
14 reg = <0x10040000 0x5000>;
15};
diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
index a2ac2d9ac71a..f5a5b19ed3b2 100644
--- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt
@@ -15,259 +15,12 @@ Required Properties:
15 15
16- #clock-cells: should be 1. 16- #clock-cells: should be 1.
17 17
18The following is the list of clocks generated by the controller. Each clock is 18Each clock is assigned an identifier and client nodes can use this identifier
19assigned an identifier and client nodes use this identifier to specify the 19to specify the clock which they consume.
20clock which they consume. Some of the clocks are available only on a particular
21Exynos4 SoC and this is specified where applicable.
22
23
24 [Core Clocks]
25
26 Clock ID SoC (if specific)
27 -----------------------------------------------
28
29 xxti 1
30 xusbxti 2
31 fin_pll 3
32 fout_apll 4
33 fout_mpll 5
34 fout_epll 6
35 fout_vpll 7
36 sclk_apll 8
37 sclk_mpll 9
38 sclk_epll 10
39 sclk_vpll 11
40 arm_clk 12
41 aclk200 13
42 aclk100 14
43 aclk160 15
44 aclk133 16
45 mout_mpll_user_t 17 Exynos4x12
46 mout_mpll_user_c 18 Exynos4x12
47 mout_core 19
48 mout_apll 20
49
50
51 [Clock Gate for Special Clocks]
52
53 Clock ID SoC (if specific)
54 -----------------------------------------------
55
56 sclk_fimc0 128
57 sclk_fimc1 129
58 sclk_fimc2 130
59 sclk_fimc3 131
60 sclk_cam0 132
61 sclk_cam1 133
62 sclk_csis0 134
63 sclk_csis1 135
64 sclk_hdmi 136
65 sclk_mixer 137
66 sclk_dac 138
67 sclk_pixel 139
68 sclk_fimd0 140
69 sclk_mdnie0 141 Exynos4412
70 sclk_mdnie_pwm0 12 142 Exynos4412
71 sclk_mipi0 143
72 sclk_audio0 144
73 sclk_mmc0 145
74 sclk_mmc1 146
75 sclk_mmc2 147
76 sclk_mmc3 148
77 sclk_mmc4 149
78 sclk_sata 150 Exynos4210
79 sclk_uart0 151
80 sclk_uart1 152
81 sclk_uart2 153
82 sclk_uart3 154
83 sclk_uart4 155
84 sclk_audio1 156
85 sclk_audio2 157
86 sclk_spdif 158
87 sclk_spi0 159
88 sclk_spi1 160
89 sclk_spi2 161
90 sclk_slimbus 162
91 sclk_fimd1 163 Exynos4210
92 sclk_mipi1 164 Exynos4210
93 sclk_pcm1 165
94 sclk_pcm2 166
95 sclk_i2s1 167
96 sclk_i2s2 168
97 sclk_mipihsi 169 Exynos4412
98 sclk_mfc 170
99 sclk_pcm0 171
100 sclk_g3d 172
101 sclk_pwm_isp 173 Exynos4x12
102 sclk_spi0_isp 174 Exynos4x12
103 sclk_spi1_isp 175 Exynos4x12
104 sclk_uart_isp 176 Exynos4x12
105 sclk_fimg2d 177
106
107 [Peripheral Clock Gates]
108
109 Clock ID SoC (if specific)
110 -----------------------------------------------
111
112 fimc0 256
113 fimc1 257
114 fimc2 258
115 fimc3 259
116 csis0 260
117 csis1 261
118 jpeg 262
119 smmu_fimc0 263
120 smmu_fimc1 264
121 smmu_fimc2 265
122 smmu_fimc3 266
123 smmu_jpeg 267
124 vp 268
125 mixer 269
126 tvenc 270 Exynos4210
127 hdmi 271
128 smmu_tv 272
129 mfc 273
130 smmu_mfcl 274
131 smmu_mfcr 275
132 g3d 276
133 g2d 277
134 rotator 278 Exynos4210
135 mdma 279 Exynos4210
136 smmu_g2d 280 Exynos4210
137 smmu_rotator 281 Exynos4210
138 smmu_mdma 282 Exynos4210
139 fimd0 283
140 mie0 284
141 mdnie0 285 Exynos4412
142 dsim0 286
143 smmu_fimd0 287
144 fimd1 288 Exynos4210
145 mie1 289 Exynos4210
146 dsim1 290 Exynos4210
147 smmu_fimd1 291 Exynos4210
148 pdma0 292
149 pdma1 293
150 pcie_phy 294
151 sata_phy 295 Exynos4210
152 tsi 296
153 sdmmc0 297
154 sdmmc1 298
155 sdmmc2 299
156 sdmmc3 300
157 sdmmc4 301
158 sata 302 Exynos4210
159 sromc 303
160 usb_host 304
161 usb_device 305
162 pcie 306
163 onenand 307
164 nfcon 308
165 smmu_pcie 309
166 gps 310
167 smmu_gps 311
168 uart0 312
169 uart1 313
170 uart2 314
171 uart3 315
172 uart4 316
173 i2c0 317
174 i2c1 318
175 i2c2 319
176 i2c3 320
177 i2c4 321
178 i2c5 322
179 i2c6 323
180 i2c7 324
181 i2c_hdmi 325
182 tsadc 326
183 spi0 327
184 spi1 328
185 spi2 329
186 i2s1 330
187 i2s2 331
188 pcm0 332
189 i2s0 333
190 pcm1 334
191 pcm2 335
192 pwm 336
193 slimbus 337
194 spdif 338
195 ac97 339
196 modemif 340
197 chipid 341
198 sysreg 342
199 hdmi_cec 343
200 mct 344
201 wdt 345
202 rtc 346
203 keyif 347
204 audss 348
205 mipi_hsi 349 Exynos4210
206 mdma2 350 Exynos4210
207 pixelasyncm0 351
208 pixelasyncm1 352
209 fimc_lite0 353 Exynos4x12
210 fimc_lite1 354 Exynos4x12
211 ppmuispx 355 Exynos4x12
212 ppmuispmx 356 Exynos4x12
213 fimc_isp 357 Exynos4x12
214 fimc_drc 358 Exynos4x12
215 fimc_fd 359 Exynos4x12
216 mcuisp 360 Exynos4x12
217 gicisp 361 Exynos4x12
218 smmu_isp 362 Exynos4x12
219 smmu_drc 363 Exynos4x12
220 smmu_fd 364 Exynos4x12
221 smmu_lite0 365 Exynos4x12
222 smmu_lite1 366 Exynos4x12
223 mcuctl_isp 367 Exynos4x12
224 mpwm_isp 368 Exynos4x12
225 i2c0_isp 369 Exynos4x12
226 i2c1_isp 370 Exynos4x12
227 mtcadc_isp 371 Exynos4x12
228 pwm_isp 372 Exynos4x12
229 wdt_isp 373 Exynos4x12
230 uart_isp 374 Exynos4x12
231 asyncaxim 375 Exynos4x12
232 smmu_ispcx 376 Exynos4x12
233 spi0_isp 377 Exynos4x12
234 spi1_isp 378 Exynos4x12
235 pwm_isp_sclk 379 Exynos4x12
236 spi0_isp_sclk 380 Exynos4x12
237 spi1_isp_sclk 381 Exynos4x12
238 uart_isp_sclk 382 Exynos4x12
239 tmu_apbif 383
240
241 [Mux Clocks]
242
243 Clock ID SoC (if specific)
244 -----------------------------------------------
245
246 mout_fimc0 384
247 mout_fimc1 385
248 mout_fimc2 386
249 mout_fimc3 387
250 mout_cam0 388
251 mout_cam1 389
252 mout_csis0 390
253 mout_csis1 391
254 mout_g3d0 392
255 mout_g3d1 393
256 mout_g3d 394
257 aclk400_mcuisp 395 Exynos4x12
258
259 [Div Clocks]
260
261 Clock ID SoC (if specific)
262 -----------------------------------------------
263
264 div_isp0 450 Exynos4x12
265 div_isp1 451 Exynos4x12
266 div_mcuisp0 452 Exynos4x12
267 div_mcuisp1 453 Exynos4x12
268 div_aclk200 454 Exynos4x12
269 div_aclk400_mcuisp 455 Exynos4x12
270 20
21All available clocks are defined as preprocessor macros in
22dt-bindings/clock/exynos4.h header and can be used in device
23tree sources.
271 24
272Example 1: An example of a clock controller node is listed below. 25Example 1: An example of a clock controller node is listed below.
273 26
@@ -285,6 +38,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
285 compatible = "samsung,exynos4210-uart"; 38 compatible = "samsung,exynos4210-uart";
286 reg = <0x13820000 0x100>; 39 reg = <0x13820000 0x100>;
287 interrupts = <0 54 0>; 40 interrupts = <0 54 0>;
288 clocks = <&clock 314>, <&clock 153>; 41 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
289 clock-names = "uart", "clk_uart_baud0"; 42 clock-names = "uart", "clk_uart_baud0";
290 }; 43 };
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
index 72ce617dea82..536eacd1063f 100644
--- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
@@ -13,163 +13,12 @@ Required Properties:
13 13
14- #clock-cells: should be 1. 14- #clock-cells: should be 1.
15 15
16The following is the list of clocks generated by the controller. Each clock is 16Each clock is assigned an identifier and client nodes can use this identifier
17assigned an identifier and client nodes use this identifier to specify the 17to specify the clock which they consume.
18clock which they consume.
19
20
21 [Core Clocks]
22
23 Clock ID
24 ----------------------------
25
26 fin_pll 1
27
28 [Clock Gate for Special Clocks]
29
30 Clock ID
31 ----------------------------
32
33 sclk_cam_bayer 128
34 sclk_cam0 129
35 sclk_cam1 130
36 sclk_gscl_wa 131
37 sclk_gscl_wb 132
38 sclk_fimd1 133
39 sclk_mipi1 134
40 sclk_dp 135
41 sclk_hdmi 136
42 sclk_pixel 137
43 sclk_audio0 138
44 sclk_mmc0 139
45 sclk_mmc1 140
46 sclk_mmc2 141
47 sclk_mmc3 142
48 sclk_sata 143
49 sclk_usb3 144
50 sclk_jpeg 145
51 sclk_uart0 146
52 sclk_uart1 147
53 sclk_uart2 148
54 sclk_uart3 149
55 sclk_pwm 150
56 sclk_audio1 151
57 sclk_audio2 152
58 sclk_spdif 153
59 sclk_spi0 154
60 sclk_spi1 155
61 sclk_spi2 156
62 div_i2s1 157
63 div_i2s2 158
64 sclk_hdmiphy 159
65 div_pcm0 160
66
67
68 [Peripheral Clock Gates]
69
70 Clock ID
71 ----------------------------
72
73 gscl0 256
74 gscl1 257
75 gscl2 258
76 gscl3 259
77 gscl_wa 260
78 gscl_wb 261
79 smmu_gscl0 262
80 smmu_gscl1 263
81 smmu_gscl2 264
82 smmu_gscl3 265
83 mfc 266
84 smmu_mfcl 267
85 smmu_mfcr 268
86 rotator 269
87 jpeg 270
88 mdma1 271
89 smmu_rotator 272
90 smmu_jpeg 273
91 smmu_mdma1 274
92 pdma0 275
93 pdma1 276
94 sata 277
95 usbotg 278
96 mipi_hsi 279
97 sdmmc0 280
98 sdmmc1 281
99 sdmmc2 282
100 sdmmc3 283
101 sromc 284
102 usb2 285
103 usb3 286
104 sata_phyctrl 287
105 sata_phyi2c 288
106 uart0 289
107 uart1 290
108 uart2 291
109 uart3 292
110 uart4 293
111 i2c0 294
112 i2c1 295
113 i2c2 296
114 i2c3 297
115 i2c4 298
116 i2c5 299
117 i2c6 300
118 i2c7 301
119 i2c_hdmi 302
120 adc 303
121 spi0 304
122 spi1 305
123 spi2 306
124 i2s1 307
125 i2s2 308
126 pcm1 309
127 pcm2 310
128 pwm 311
129 spdif 312
130 ac97 313
131 hsi2c0 314
132 hsi2c1 315
133 hs12c2 316
134 hs12c3 317
135 chipid 318
136 sysreg 319
137 pmu 320
138 cmu_top 321
139 cmu_core 322
140 cmu_mem 323
141 tzpc0 324
142 tzpc1 325
143 tzpc2 326
144 tzpc3 327
145 tzpc4 328
146 tzpc5 329
147 tzpc6 330
148 tzpc7 331
149 tzpc8 332
150 tzpc9 333
151 hdmi_cec 334
152 mct 335
153 wdt 336
154 rtc 337
155 tmu 338
156 fimd1 339
157 mie1 340
158 dsim0 341
159 dp 342
160 mixer 343
161 hdmi 344
162 g2d 345
163 mdma0 346
164 smmu_mdma0 347
165
166
167 [Clock Muxes]
168
169 Clock ID
170 ----------------------------
171 mout_hdmi 1024
172 18
19All available clocks are defined as preprocessor macros in
20dt-bindings/clock/exynos5250.h header and can be used in device
21tree sources.
173 22
174Example 1: An example of a clock controller node is listed below. 23Example 1: An example of a clock controller node is listed below.
175 24
@@ -187,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
187 compatible = "samsung,exynos4210-uart"; 36 compatible = "samsung,exynos4210-uart";
188 reg = <0x13820000 0x100>; 37 reg = <0x13820000 0x100>;
189 interrupts = <0 54 0>; 38 interrupts = <0 54 0>;
190 clocks = <&clock 314>, <&clock 153>; 39 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
191 clock-names = "uart", "clk_uart_baud0"; 40 clock-names = "uart", "clk_uart_baud0";
192 }; 41 };
diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
index 458f34789e5d..ca88c97a8562 100644
--- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt
@@ -13,184 +13,12 @@ Required Properties:
13 13
14- #clock-cells: should be 1. 14- #clock-cells: should be 1.
15 15
16The following is the list of clocks generated by the controller. Each clock is 16Each clock is assigned an identifier and client nodes can use this identifier
17assigned an identifier and client nodes use this identifier to specify the 17to specify the clock which they consume.
18clock which they consume.
19 18
20 19All available clocks are defined as preprocessor macros in
21 [Core Clocks] 20dt-bindings/clock/exynos5420.h header and can be used in device
22 21tree sources.
23 Clock ID
24 ----------------------------
25
26 fin_pll 1
27
28 [Clock Gate for Special Clocks]
29
30 Clock ID
31 ----------------------------
32 sclk_uart0 128
33 sclk_uart1 129
34 sclk_uart2 130
35 sclk_uart3 131
36 sclk_mmc0 132
37 sclk_mmc1 133
38 sclk_mmc2 134
39 sclk_spi0 135
40 sclk_spi1 136
41 sclk_spi2 137
42 sclk_i2s1 138
43 sclk_i2s2 139
44 sclk_pcm1 140
45 sclk_pcm2 141
46 sclk_spdif 142
47 sclk_hdmi 143
48 sclk_pixel 144
49 sclk_dp1 145
50 sclk_mipi1 146
51 sclk_fimd1 147
52 sclk_maudio0 148
53 sclk_maupcm0 149
54 sclk_usbd300 150
55 sclk_usbd301 151
56 sclk_usbphy300 152
57 sclk_usbphy301 153
58 sclk_unipro 154
59 sclk_pwm 155
60 sclk_gscl_wa 156
61 sclk_gscl_wb 157
62 sclk_hdmiphy 158
63
64 [Peripheral Clock Gates]
65
66 Clock ID
67 ----------------------------
68
69 aclk66_peric 256
70 uart0 257
71 uart1 258
72 uart2 259
73 uart3 260
74 i2c0 261
75 i2c1 262
76 i2c2 263
77 i2c3 264
78 i2c4 265
79 i2c5 266
80 i2c6 267
81 i2c7 268
82 i2c_hdmi 269
83 tsadc 270
84 spi0 271
85 spi1 272
86 spi2 273
87 keyif 274
88 i2s1 275
89 i2s2 276
90 pcm1 277
91 pcm2 278
92 pwm 279
93 spdif 280
94 i2c8 281
95 i2c9 282
96 i2c10 283
97 aclk66_psgen 300
98 chipid 301
99 sysreg 302
100 tzpc0 303
101 tzpc1 304
102 tzpc2 305
103 tzpc3 306
104 tzpc4 307
105 tzpc5 308
106 tzpc6 309
107 tzpc7 310
108 tzpc8 311
109 tzpc9 312
110 hdmi_cec 313
111 seckey 314
112 mct 315
113 wdt 316
114 rtc 317
115 tmu 318
116 tmu_gpu 319
117 pclk66_gpio 330
118 aclk200_fsys2 350
119 mmc0 351
120 mmc1 352
121 mmc2 353
122 sromc 354
123 ufs 355
124 aclk200_fsys 360
125 tsi 361
126 pdma0 362
127 pdma1 363
128 rtic 364
129 usbh20 365
130 usbd300 366
131 usbd301 377
132 aclk400_mscl 380
133 mscl0 381
134 mscl1 382
135 mscl2 383
136 smmu_mscl0 384
137 smmu_mscl1 385
138 smmu_mscl2 386
139 aclk333 400
140 mfc 401
141 smmu_mfcl 402
142 smmu_mfcr 403
143 aclk200_disp1 410
144 dsim1 411
145 dp1 412
146 hdmi 413
147 aclk300_disp1 420
148 fimd1 421
149 smmu_fimd1 422
150 aclk166 430
151 mixer 431
152 aclk266 440
153 rotator 441
154 mdma1 442
155 smmu_rotator 443
156 smmu_mdma1 444
157 aclk300_jpeg 450
158 jpeg 451
159 jpeg2 452
160 smmu_jpeg 453
161 aclk300_gscl 460
162 smmu_gscl0 461
163 smmu_gscl1 462
164 gscl_wa 463
165 gscl_wb 464
166 gscl0 465
167 gscl1 466
168 clk_3aa 467
169 aclk266_g2d 470
170 sss 471
171 slim_sss 472
172 mdma0 473
173 aclk333_g2d 480
174 g2d 481
175 aclk333_432_gscl 490
176 smmu_3aa 491
177 smmu_fimcl0 492
178 smmu_fimcl1 493
179 smmu_fimcl3 494
180 fimc_lite3 495
181 aclk_g3d 500
182 g3d 501
183 smmu_mixer 502
184
185 Mux ID
186 ----------------------------
187
188 mout_hdmi 640
189
190 Divider ID
191 ----------------------------
192
193 dout_pixel 768
194 22
195Example 1: An example of a clock controller node is listed below. 23Example 1: An example of a clock controller node is listed below.
196 24
@@ -208,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
208 compatible = "samsung,exynos4210-uart"; 36 compatible = "samsung,exynos4210-uart";
209 reg = <0x13820000 0x100>; 37 reg = <0x13820000 0x100>;
210 interrupts = <0 54 0>; 38 interrupts = <0 54 0>;
211 clocks = <&clock 259>, <&clock 130>; 39 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
212 clock-names = "uart", "clk_uart_baud0"; 40 clock-names = "uart", "clk_uart_baud0";
213 }; 41 };
diff --git a/Documentation/devicetree/bindings/clock/exynos5440-clock.txt b/Documentation/devicetree/bindings/clock/exynos5440-clock.txt
index 9955dc9c7d96..5f7005f73058 100644
--- a/Documentation/devicetree/bindings/clock/exynos5440-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5440-clock.txt
@@ -12,45 +12,12 @@ Required Properties:
12 12
13- #clock-cells: should be 1. 13- #clock-cells: should be 1.
14 14
15The following is the list of clocks generated by the controller. Each clock is 15Each clock is assigned an identifier and client nodes can use this identifier
16assigned an identifier and client nodes use this identifier to specify the 16to specify the clock which they consume.
17clock which they consume. 17
18 18All available clocks are defined as preprocessor macros in
19 19dt-bindings/clock/exynos5440.h header and can be used in device
20 [Core Clocks] 20tree sources.
21
22 Clock ID
23 ----------------------------
24
25 xtal 1
26 arm_clk 2
27
28 [Peripheral Clock Gates]
29
30 Clock ID
31 ----------------------------
32
33 spi_baud 16
34 pb0_250 17
35 pr0_250 18
36 pr1_250 19
37 b_250 20
38 b_125 21
39 b_200 22
40 sata 23
41 usb 24
42 gmac0 25
43 cs250 26
44 pb0_250_o 27
45 pr0_250_o 28
46 pr1_250_o 29
47 b_250_o 30
48 b_125_o 31
49 b_200_o 32
50 sata_o 33
51 usb_o 34
52 gmac0_o 35
53 cs250_o 36
54 21
55Example: An example of a clock controller node is listed below. 22Example: An example of a clock controller node is listed below.
56 23
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 0531da8e5216..3e988f6b45bc 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1145,7 +1145,7 @@ config DEBUG_UART_8250_FLOW_CONTROL
1145 1145
1146config DEBUG_UNCOMPRESS 1146config DEBUG_UNCOMPRESS
1147 bool 1147 bool
1148 depends on ARCH_MULTIPLATFORM || ARCH_MSM 1148 depends on ARCH_MULTIPLATFORM || ARCH_MSM || ARCH_EXYNOS
1149 default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \ 1149 default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \
1150 (!DEBUG_TEGRA_UART || !ZBOOT_ROM) 1150 (!DEBUG_TEGRA_UART || !ZBOOT_ROM)
1151 help 1151 help
@@ -1161,7 +1161,8 @@ config DEBUG_UNCOMPRESS
1161 1161
1162config UNCOMPRESS_INCLUDE 1162config UNCOMPRESS_INCLUDE
1163 string 1163 string
1164 default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM 1164 default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \
1165 ARCH_EXYNOS
1165 default "mach/uncompress.h" 1166 default "mach/uncompress.h"
1166 1167
1167config EARLY_PRINTK 1168config EARLY_PRINTK
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 08452e183b57..28b5ec79f339 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -19,6 +19,7 @@
19 * published by the Free Software Foundation. 19 * published by the Free Software Foundation.
20 */ 20 */
21 21
22#include <dt-bindings/clock/exynos4.h>
22#include "skeleton.dtsi" 23#include "skeleton.dtsi"
23 24
24/ { 25/ {
@@ -119,7 +120,7 @@
119 compatible = "samsung,exynos4210-fimc"; 120 compatible = "samsung,exynos4210-fimc";
120 reg = <0x11800000 0x1000>; 121 reg = <0x11800000 0x1000>;
121 interrupts = <0 84 0>; 122 interrupts = <0 84 0>;
122 clocks = <&clock 256>, <&clock 128>; 123 clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
123 clock-names = "fimc", "sclk_fimc"; 124 clock-names = "fimc", "sclk_fimc";
124 samsung,power-domain = <&pd_cam>; 125 samsung,power-domain = <&pd_cam>;
125 samsung,sysreg = <&sys_reg>; 126 samsung,sysreg = <&sys_reg>;
@@ -130,7 +131,7 @@
130 compatible = "samsung,exynos4210-fimc"; 131 compatible = "samsung,exynos4210-fimc";
131 reg = <0x11810000 0x1000>; 132 reg = <0x11810000 0x1000>;
132 interrupts = <0 85 0>; 133 interrupts = <0 85 0>;
133 clocks = <&clock 257>, <&clock 129>; 134 clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
134 clock-names = "fimc", "sclk_fimc"; 135 clock-names = "fimc", "sclk_fimc";
135 samsung,power-domain = <&pd_cam>; 136 samsung,power-domain = <&pd_cam>;
136 samsung,sysreg = <&sys_reg>; 137 samsung,sysreg = <&sys_reg>;
@@ -141,7 +142,7 @@
141 compatible = "samsung,exynos4210-fimc"; 142 compatible = "samsung,exynos4210-fimc";
142 reg = <0x11820000 0x1000>; 143 reg = <0x11820000 0x1000>;
143 interrupts = <0 86 0>; 144 interrupts = <0 86 0>;
144 clocks = <&clock 258>, <&clock 130>; 145 clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
145 clock-names = "fimc", "sclk_fimc"; 146 clock-names = "fimc", "sclk_fimc";
146 samsung,power-domain = <&pd_cam>; 147 samsung,power-domain = <&pd_cam>;
147 samsung,sysreg = <&sys_reg>; 148 samsung,sysreg = <&sys_reg>;
@@ -152,7 +153,7 @@
152 compatible = "samsung,exynos4210-fimc"; 153 compatible = "samsung,exynos4210-fimc";
153 reg = <0x11830000 0x1000>; 154 reg = <0x11830000 0x1000>;
154 interrupts = <0 87 0>; 155 interrupts = <0 87 0>;
155 clocks = <&clock 259>, <&clock 131>; 156 clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
156 clock-names = "fimc", "sclk_fimc"; 157 clock-names = "fimc", "sclk_fimc";
157 samsung,power-domain = <&pd_cam>; 158 samsung,power-domain = <&pd_cam>;
158 samsung,sysreg = <&sys_reg>; 159 samsung,sysreg = <&sys_reg>;
@@ -163,7 +164,7 @@
163 compatible = "samsung,exynos4210-csis"; 164 compatible = "samsung,exynos4210-csis";
164 reg = <0x11880000 0x4000>; 165 reg = <0x11880000 0x4000>;
165 interrupts = <0 78 0>; 166 interrupts = <0 78 0>;
166 clocks = <&clock 260>, <&clock 134>; 167 clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
167 clock-names = "csis", "sclk_csis"; 168 clock-names = "csis", "sclk_csis";
168 bus-width = <4>; 169 bus-width = <4>;
169 samsung,power-domain = <&pd_cam>; 170 samsung,power-domain = <&pd_cam>;
@@ -178,7 +179,7 @@
178 compatible = "samsung,exynos4210-csis"; 179 compatible = "samsung,exynos4210-csis";
179 reg = <0x11890000 0x4000>; 180 reg = <0x11890000 0x4000>;
180 interrupts = <0 80 0>; 181 interrupts = <0 80 0>;
181 clocks = <&clock 261>, <&clock 135>; 182 clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
182 clock-names = "csis", "sclk_csis"; 183 clock-names = "csis", "sclk_csis";
183 bus-width = <2>; 184 bus-width = <2>;
184 samsung,power-domain = <&pd_cam>; 185 samsung,power-domain = <&pd_cam>;
@@ -194,7 +195,7 @@
194 compatible = "samsung,s3c2410-wdt"; 195 compatible = "samsung,s3c2410-wdt";
195 reg = <0x10060000 0x100>; 196 reg = <0x10060000 0x100>;
196 interrupts = <0 43 0>; 197 interrupts = <0 43 0>;
197 clocks = <&clock 345>; 198 clocks = <&clock CLK_WDT>;
198 clock-names = "watchdog"; 199 clock-names = "watchdog";
199 status = "disabled"; 200 status = "disabled";
200 }; 201 };
@@ -203,7 +204,7 @@
203 compatible = "samsung,s3c6410-rtc"; 204 compatible = "samsung,s3c6410-rtc";
204 reg = <0x10070000 0x100>; 205 reg = <0x10070000 0x100>;
205 interrupts = <0 44 0>, <0 45 0>; 206 interrupts = <0 44 0>, <0 45 0>;
206 clocks = <&clock 346>; 207 clocks = <&clock CLK_RTC>;
207 clock-names = "rtc"; 208 clock-names = "rtc";
208 status = "disabled"; 209 status = "disabled";
209 }; 210 };
@@ -212,7 +213,7 @@
212 compatible = "samsung,s5pv210-keypad"; 213 compatible = "samsung,s5pv210-keypad";
213 reg = <0x100A0000 0x100>; 214 reg = <0x100A0000 0x100>;
214 interrupts = <0 109 0>; 215 interrupts = <0 109 0>;
215 clocks = <&clock 347>; 216 clocks = <&clock CLK_KEYIF>;
216 clock-names = "keypad"; 217 clock-names = "keypad";
217 status = "disabled"; 218 status = "disabled";
218 }; 219 };
@@ -221,7 +222,7 @@
221 compatible = "samsung,exynos4210-sdhci"; 222 compatible = "samsung,exynos4210-sdhci";
222 reg = <0x12510000 0x100>; 223 reg = <0x12510000 0x100>;
223 interrupts = <0 73 0>; 224 interrupts = <0 73 0>;
224 clocks = <&clock 297>, <&clock 145>; 225 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
225 clock-names = "hsmmc", "mmc_busclk.2"; 226 clock-names = "hsmmc", "mmc_busclk.2";
226 status = "disabled"; 227 status = "disabled";
227 }; 228 };
@@ -230,7 +231,7 @@
230 compatible = "samsung,exynos4210-sdhci"; 231 compatible = "samsung,exynos4210-sdhci";
231 reg = <0x12520000 0x100>; 232 reg = <0x12520000 0x100>;
232 interrupts = <0 74 0>; 233 interrupts = <0 74 0>;
233 clocks = <&clock 298>, <&clock 146>; 234 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
234 clock-names = "hsmmc", "mmc_busclk.2"; 235 clock-names = "hsmmc", "mmc_busclk.2";
235 status = "disabled"; 236 status = "disabled";
236 }; 237 };
@@ -239,7 +240,7 @@
239 compatible = "samsung,exynos4210-sdhci"; 240 compatible = "samsung,exynos4210-sdhci";
240 reg = <0x12530000 0x100>; 241 reg = <0x12530000 0x100>;
241 interrupts = <0 75 0>; 242 interrupts = <0 75 0>;
242 clocks = <&clock 299>, <&clock 147>; 243 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
243 clock-names = "hsmmc", "mmc_busclk.2"; 244 clock-names = "hsmmc", "mmc_busclk.2";
244 status = "disabled"; 245 status = "disabled";
245 }; 246 };
@@ -248,7 +249,7 @@
248 compatible = "samsung,exynos4210-sdhci"; 249 compatible = "samsung,exynos4210-sdhci";
249 reg = <0x12540000 0x100>; 250 reg = <0x12540000 0x100>;
250 interrupts = <0 76 0>; 251 interrupts = <0 76 0>;
251 clocks = <&clock 300>, <&clock 148>; 252 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
252 clock-names = "hsmmc", "mmc_busclk.2"; 253 clock-names = "hsmmc", "mmc_busclk.2";
253 status = "disabled"; 254 status = "disabled";
254 }; 255 };
@@ -257,7 +258,7 @@
257 compatible = "samsung,exynos4210-ehci"; 258 compatible = "samsung,exynos4210-ehci";
258 reg = <0x12580000 0x100>; 259 reg = <0x12580000 0x100>;
259 interrupts = <0 70 0>; 260 interrupts = <0 70 0>;
260 clocks = <&clock 304>; 261 clocks = <&clock CLK_USB_HOST>;
261 clock-names = "usbhost"; 262 clock-names = "usbhost";
262 status = "disabled"; 263 status = "disabled";
263 }; 264 };
@@ -266,7 +267,7 @@
266 compatible = "samsung,exynos4210-ohci"; 267 compatible = "samsung,exynos4210-ohci";
267 reg = <0x12590000 0x100>; 268 reg = <0x12590000 0x100>;
268 interrupts = <0 70 0>; 269 interrupts = <0 70 0>;
269 clocks = <&clock 304>; 270 clocks = <&clock CLK_USB_HOST>;
270 clock-names = "usbhost"; 271 clock-names = "usbhost";
271 status = "disabled"; 272 status = "disabled";
272 }; 273 };
@@ -276,7 +277,7 @@
276 reg = <0x13400000 0x10000>; 277 reg = <0x13400000 0x10000>;
277 interrupts = <0 94 0>; 278 interrupts = <0 94 0>;
278 samsung,power-domain = <&pd_mfc>; 279 samsung,power-domain = <&pd_mfc>;
279 clocks = <&clock 273>; 280 clocks = <&clock CLK_MFC>;
280 clock-names = "mfc"; 281 clock-names = "mfc";
281 status = "disabled"; 282 status = "disabled";
282 }; 283 };
@@ -285,7 +286,7 @@
285 compatible = "samsung,exynos4210-uart"; 286 compatible = "samsung,exynos4210-uart";
286 reg = <0x13800000 0x100>; 287 reg = <0x13800000 0x100>;
287 interrupts = <0 52 0>; 288 interrupts = <0 52 0>;
288 clocks = <&clock 312>, <&clock 151>; 289 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
289 clock-names = "uart", "clk_uart_baud0"; 290 clock-names = "uart", "clk_uart_baud0";
290 status = "disabled"; 291 status = "disabled";
291 }; 292 };
@@ -294,7 +295,7 @@
294 compatible = "samsung,exynos4210-uart"; 295 compatible = "samsung,exynos4210-uart";
295 reg = <0x13810000 0x100>; 296 reg = <0x13810000 0x100>;
296 interrupts = <0 53 0>; 297 interrupts = <0 53 0>;
297 clocks = <&clock 313>, <&clock 152>; 298 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
298 clock-names = "uart", "clk_uart_baud0"; 299 clock-names = "uart", "clk_uart_baud0";
299 status = "disabled"; 300 status = "disabled";
300 }; 301 };
@@ -303,7 +304,7 @@
303 compatible = "samsung,exynos4210-uart"; 304 compatible = "samsung,exynos4210-uart";
304 reg = <0x13820000 0x100>; 305 reg = <0x13820000 0x100>;
305 interrupts = <0 54 0>; 306 interrupts = <0 54 0>;
306 clocks = <&clock 314>, <&clock 153>; 307 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
307 clock-names = "uart", "clk_uart_baud0"; 308 clock-names = "uart", "clk_uart_baud0";
308 status = "disabled"; 309 status = "disabled";
309 }; 310 };
@@ -312,7 +313,7 @@
312 compatible = "samsung,exynos4210-uart"; 313 compatible = "samsung,exynos4210-uart";
313 reg = <0x13830000 0x100>; 314 reg = <0x13830000 0x100>;
314 interrupts = <0 55 0>; 315 interrupts = <0 55 0>;
315 clocks = <&clock 315>, <&clock 154>; 316 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
316 clock-names = "uart", "clk_uart_baud0"; 317 clock-names = "uart", "clk_uart_baud0";
317 status = "disabled"; 318 status = "disabled";
318 }; 319 };
@@ -323,7 +324,7 @@
323 compatible = "samsung,s3c2440-i2c"; 324 compatible = "samsung,s3c2440-i2c";
324 reg = <0x13860000 0x100>; 325 reg = <0x13860000 0x100>;
325 interrupts = <0 58 0>; 326 interrupts = <0 58 0>;
326 clocks = <&clock 317>; 327 clocks = <&clock CLK_I2C0>;
327 clock-names = "i2c"; 328 clock-names = "i2c";
328 pinctrl-names = "default"; 329 pinctrl-names = "default";
329 pinctrl-0 = <&i2c0_bus>; 330 pinctrl-0 = <&i2c0_bus>;
@@ -336,7 +337,7 @@
336 compatible = "samsung,s3c2440-i2c"; 337 compatible = "samsung,s3c2440-i2c";
337 reg = <0x13870000 0x100>; 338 reg = <0x13870000 0x100>;
338 interrupts = <0 59 0>; 339 interrupts = <0 59 0>;
339 clocks = <&clock 318>; 340 clocks = <&clock CLK_I2C1>;
340 clock-names = "i2c"; 341 clock-names = "i2c";
341 pinctrl-names = "default"; 342 pinctrl-names = "default";
342 pinctrl-0 = <&i2c1_bus>; 343 pinctrl-0 = <&i2c1_bus>;
@@ -349,7 +350,7 @@
349 compatible = "samsung,s3c2440-i2c"; 350 compatible = "samsung,s3c2440-i2c";
350 reg = <0x13880000 0x100>; 351 reg = <0x13880000 0x100>;
351 interrupts = <0 60 0>; 352 interrupts = <0 60 0>;
352 clocks = <&clock 319>; 353 clocks = <&clock CLK_I2C2>;
353 clock-names = "i2c"; 354 clock-names = "i2c";
354 status = "disabled"; 355 status = "disabled";
355 }; 356 };
@@ -360,7 +361,7 @@
360 compatible = "samsung,s3c2440-i2c"; 361 compatible = "samsung,s3c2440-i2c";
361 reg = <0x13890000 0x100>; 362 reg = <0x13890000 0x100>;
362 interrupts = <0 61 0>; 363 interrupts = <0 61 0>;
363 clocks = <&clock 320>; 364 clocks = <&clock CLK_I2C3>;
364 clock-names = "i2c"; 365 clock-names = "i2c";
365 status = "disabled"; 366 status = "disabled";
366 }; 367 };
@@ -371,7 +372,7 @@
371 compatible = "samsung,s3c2440-i2c"; 372 compatible = "samsung,s3c2440-i2c";
372 reg = <0x138A0000 0x100>; 373 reg = <0x138A0000 0x100>;
373 interrupts = <0 62 0>; 374 interrupts = <0 62 0>;
374 clocks = <&clock 321>; 375 clocks = <&clock CLK_I2C4>;
375 clock-names = "i2c"; 376 clock-names = "i2c";
376 status = "disabled"; 377 status = "disabled";
377 }; 378 };
@@ -382,7 +383,7 @@
382 compatible = "samsung,s3c2440-i2c"; 383 compatible = "samsung,s3c2440-i2c";
383 reg = <0x138B0000 0x100>; 384 reg = <0x138B0000 0x100>;
384 interrupts = <0 63 0>; 385 interrupts = <0 63 0>;
385 clocks = <&clock 322>; 386 clocks = <&clock CLK_I2C5>;
386 clock-names = "i2c"; 387 clock-names = "i2c";
387 status = "disabled"; 388 status = "disabled";
388 }; 389 };
@@ -393,7 +394,7 @@
393 compatible = "samsung,s3c2440-i2c"; 394 compatible = "samsung,s3c2440-i2c";
394 reg = <0x138C0000 0x100>; 395 reg = <0x138C0000 0x100>;
395 interrupts = <0 64 0>; 396 interrupts = <0 64 0>;
396 clocks = <&clock 323>; 397 clocks = <&clock CLK_I2C6>;
397 clock-names = "i2c"; 398 clock-names = "i2c";
398 status = "disabled"; 399 status = "disabled";
399 }; 400 };
@@ -404,7 +405,7 @@
404 compatible = "samsung,s3c2440-i2c"; 405 compatible = "samsung,s3c2440-i2c";
405 reg = <0x138D0000 0x100>; 406 reg = <0x138D0000 0x100>;
406 interrupts = <0 65 0>; 407 interrupts = <0 65 0>;
407 clocks = <&clock 324>; 408 clocks = <&clock CLK_I2C7>;
408 clock-names = "i2c"; 409 clock-names = "i2c";
409 status = "disabled"; 410 status = "disabled";
410 }; 411 };
@@ -417,7 +418,7 @@
417 dma-names = "tx", "rx"; 418 dma-names = "tx", "rx";
418 #address-cells = <1>; 419 #address-cells = <1>;
419 #size-cells = <0>; 420 #size-cells = <0>;
420 clocks = <&clock 327>, <&clock 159>; 421 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
421 clock-names = "spi", "spi_busclk0"; 422 clock-names = "spi", "spi_busclk0";
422 pinctrl-names = "default"; 423 pinctrl-names = "default";
423 pinctrl-0 = <&spi0_bus>; 424 pinctrl-0 = <&spi0_bus>;
@@ -432,7 +433,7 @@
432 dma-names = "tx", "rx"; 433 dma-names = "tx", "rx";
433 #address-cells = <1>; 434 #address-cells = <1>;
434 #size-cells = <0>; 435 #size-cells = <0>;
435 clocks = <&clock 328>, <&clock 160>; 436 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
436 clock-names = "spi", "spi_busclk0"; 437 clock-names = "spi", "spi_busclk0";
437 pinctrl-names = "default"; 438 pinctrl-names = "default";
438 pinctrl-0 = <&spi1_bus>; 439 pinctrl-0 = <&spi1_bus>;
@@ -447,7 +448,7 @@
447 dma-names = "tx", "rx"; 448 dma-names = "tx", "rx";
448 #address-cells = <1>; 449 #address-cells = <1>;
449 #size-cells = <0>; 450 #size-cells = <0>;
450 clocks = <&clock 329>, <&clock 161>; 451 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
451 clock-names = "spi", "spi_busclk0"; 452 clock-names = "spi", "spi_busclk0";
452 pinctrl-names = "default"; 453 pinctrl-names = "default";
453 pinctrl-0 = <&spi2_bus>; 454 pinctrl-0 = <&spi2_bus>;
@@ -458,7 +459,7 @@
458 compatible = "samsung,exynos4210-pwm"; 459 compatible = "samsung,exynos4210-pwm";
459 reg = <0x139D0000 0x1000>; 460 reg = <0x139D0000 0x1000>;
460 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; 461 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
461 clocks = <&clock 336>; 462 clocks = <&clock CLK_PWM>;
462 clock-names = "timers"; 463 clock-names = "timers";
463 #pwm-cells = <2>; 464 #pwm-cells = <2>;
464 status = "disabled"; 465 status = "disabled";
@@ -475,7 +476,7 @@
475 compatible = "arm,pl330", "arm,primecell"; 476 compatible = "arm,pl330", "arm,primecell";
476 reg = <0x12680000 0x1000>; 477 reg = <0x12680000 0x1000>;
477 interrupts = <0 35 0>; 478 interrupts = <0 35 0>;
478 clocks = <&clock 292>; 479 clocks = <&clock CLK_PDMA0>;
479 clock-names = "apb_pclk"; 480 clock-names = "apb_pclk";
480 #dma-cells = <1>; 481 #dma-cells = <1>;
481 #dma-channels = <8>; 482 #dma-channels = <8>;
@@ -486,7 +487,7 @@
486 compatible = "arm,pl330", "arm,primecell"; 487 compatible = "arm,pl330", "arm,primecell";
487 reg = <0x12690000 0x1000>; 488 reg = <0x12690000 0x1000>;
488 interrupts = <0 36 0>; 489 interrupts = <0 36 0>;
489 clocks = <&clock 293>; 490 clocks = <&clock CLK_PDMA1>;
490 clock-names = "apb_pclk"; 491 clock-names = "apb_pclk";
491 #dma-cells = <1>; 492 #dma-cells = <1>;
492 #dma-channels = <8>; 493 #dma-channels = <8>;
@@ -497,7 +498,7 @@
497 compatible = "arm,pl330", "arm,primecell"; 498 compatible = "arm,pl330", "arm,primecell";
498 reg = <0x12850000 0x1000>; 499 reg = <0x12850000 0x1000>;
499 interrupts = <0 34 0>; 500 interrupts = <0 34 0>;
500 clocks = <&clock 279>; 501 clocks = <&clock CLK_MDMA>;
501 clock-names = "apb_pclk"; 502 clock-names = "apb_pclk";
502 #dma-cells = <1>; 503 #dma-cells = <1>;
503 #dma-channels = <8>; 504 #dma-channels = <8>;
@@ -511,7 +512,7 @@
511 reg = <0x11c00000 0x20000>; 512 reg = <0x11c00000 0x20000>;
512 interrupt-names = "fifo", "vsync", "lcd_sys"; 513 interrupt-names = "fifo", "vsync", "lcd_sys";
513 interrupts = <11 0>, <11 1>, <11 2>; 514 interrupts = <11 0>, <11 1>, <11 2>;
514 clocks = <&clock 140>, <&clock 283>; 515 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
515 clock-names = "sclk_fimd", "fimd"; 516 clock-names = "sclk_fimd", "fimd";
516 samsung,power-domain = <&pd_lcd0>; 517 samsung,power-domain = <&pd_lcd0>;
517 status = "disabled"; 518 status = "disabled";
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 48ecd7a755ab..cb0e768dc6d4 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -53,7 +53,7 @@
53 reg = <0x10050000 0x800>; 53 reg = <0x10050000 0x800>;
54 interrupt-parent = <&mct_map>; 54 interrupt-parent = <&mct_map>;
55 interrupts = <0>, <1>, <2>, <3>, <4>, <5>; 55 interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
56 clocks = <&clock 3>, <&clock 344>; 56 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
57 clock-names = "fin_pll", "mct"; 57 clock-names = "fin_pll", "mct";
58 58
59 mct_map: mct-map { 59 mct_map: mct-map {
@@ -109,7 +109,7 @@
109 interrupt-parent = <&combiner>; 109 interrupt-parent = <&combiner>;
110 reg = <0x100C0000 0x100>; 110 reg = <0x100C0000 0x100>;
111 interrupts = <2 4>; 111 interrupts = <2 4>;
112 clocks = <&clock 383>; 112 clocks = <&clock CLK_TMU_APBIF>;
113 clock-names = "tmu_apbif"; 113 clock-names = "tmu_apbif";
114 status = "disabled"; 114 status = "disabled";
115 }; 115 };
@@ -118,13 +118,14 @@
118 compatible = "samsung,s5pv210-g2d"; 118 compatible = "samsung,s5pv210-g2d";
119 reg = <0x12800000 0x1000>; 119 reg = <0x12800000 0x1000>;
120 interrupts = <0 89 0>; 120 interrupts = <0 89 0>;
121 clocks = <&clock 177>, <&clock 277>; 121 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
122 clock-names = "sclk_fimg2d", "fimg2d"; 122 clock-names = "sclk_fimg2d", "fimg2d";
123 status = "disabled"; 123 status = "disabled";
124 }; 124 };
125 125
126 camera { 126 camera {
127 clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>; 127 clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
128 <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
128 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1"; 129 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
129 130
130 fimc_0: fimc@11800000 { 131 fimc_0: fimc@11800000 {
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 9804fcb71f8c..12459b01cca3 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -251,7 +251,7 @@
251 buck2_reg: BUCK2 { 251 buck2_reg: BUCK2 {
252 regulator-name = "vdd_arm"; 252 regulator-name = "vdd_arm";
253 regulator-min-microvolt = <900000>; 253 regulator-min-microvolt = <900000>;
254 regulator-max-microvolt = <1300000>; 254 regulator-max-microvolt = <1350000>;
255 regulator-always-on; 255 regulator-always-on;
256 regulator-boot-on; 256 regulator-boot-on;
257 }; 257 };
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index 6bc053924e9e..388f03579661 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -459,8 +459,8 @@
459 459
460 buck2_reg: BUCK2 { 460 buck2_reg: BUCK2 {
461 regulator-name = "vdd_arm"; 461 regulator-name = "vdd_arm";
462 regulator-min-microvolt = <925000>; 462 regulator-min-microvolt = <900000>;
463 regulator-max-microvolt = <1300000>; 463 regulator-max-microvolt = <1350000>;
464 regulator-always-on; 464 regulator-always-on;
465 regulator-boot-on; 465 regulator-boot-on;
466 op_mode = <1>; /* Normal Mode */ 466 op_mode = <1>; /* Normal Mode */
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 5c412aa14738..e0eb6bb64c34 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -47,7 +47,7 @@
47 reg = <0x10050000 0x800>; 47 reg = <0x10050000 0x800>;
48 interrupt-parent = <&mct_map>; 48 interrupt-parent = <&mct_map>;
49 interrupts = <0>, <1>, <2>, <3>, <4>; 49 interrupts = <0>, <1>, <2>, <3>, <4>;
50 clocks = <&clock 3>, <&clock 344>; 50 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
51 clock-names = "fin_pll", "mct"; 51 clock-names = "fin_pll", "mct";
52 52
53 mct_map: mct-map { 53 mct_map: mct-map {
@@ -97,13 +97,14 @@
97 compatible = "samsung,exynos4212-g2d"; 97 compatible = "samsung,exynos4212-g2d";
98 reg = <0x10800000 0x1000>; 98 reg = <0x10800000 0x1000>;
99 interrupts = <0 89 0>; 99 interrupts = <0 89 0>;
100 clocks = <&clock 177>, <&clock 277>; 100 clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
101 clock-names = "sclk_fimg2d", "fimg2d"; 101 clock-names = "sclk_fimg2d", "fimg2d";
102 status = "disabled"; 102 status = "disabled";
103 }; 103 };
104 104
105 camera { 105 camera {
106 clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>; 106 clocks = <&clock CLK_SCLK_CAM0>, <&clock CLK_SCLK_CAM1>,
107 <&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
107 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1"; 108 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
108 109
109 fimc_0: fimc@11800000 { 110 fimc_0: fimc@11800000 {
@@ -145,7 +146,7 @@
145 reg = <0x12390000 0x1000>; 146 reg = <0x12390000 0x1000>;
146 interrupts = <0 105 0>; 147 interrupts = <0 105 0>;
147 samsung,power-domain = <&pd_isp>; 148 samsung,power-domain = <&pd_isp>;
148 clocks = <&clock 353>; 149 clocks = <&clock CLK_FIMC_LITE0>;
149 clock-names = "flite"; 150 clock-names = "flite";
150 status = "disabled"; 151 status = "disabled";
151 }; 152 };
@@ -155,7 +156,7 @@
155 reg = <0x123A0000 0x1000>; 156 reg = <0x123A0000 0x1000>;
156 interrupts = <0 106 0>; 157 interrupts = <0 106 0>;
157 samsung,power-domain = <&pd_isp>; 158 samsung,power-domain = <&pd_isp>;
158 clocks = <&clock 354>; 159 clocks = <&clock CLK_FIMC_LITE1>;
159 clock-names = "flite"; 160 clock-names = "flite";
160 status = "disabled"; 161 status = "disabled";
161 }; 162 };
@@ -165,12 +166,19 @@
165 reg = <0x12000000 0x260000>; 166 reg = <0x12000000 0x260000>;
166 interrupts = <0 90 0>, <0 95 0>; 167 interrupts = <0 90 0>, <0 95 0>;
167 samsung,power-domain = <&pd_isp>; 168 samsung,power-domain = <&pd_isp>;
168 clocks = <&clock 353>, <&clock 354>, <&clock 355>, 169 clocks = <&clock CLK_FIMC_LITE0>,
169 <&clock 356>, <&clock 17>, <&clock 357>, 170 <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>,
170 <&clock 358>, <&clock 359>, <&clock 360>, 171 <&clock CLK_PPMUISPMX>,
171 <&clock 450>,<&clock 451>, <&clock 452>, 172 <&clock CLK_MOUT_MPLL_USER_T>,
172 <&clock 453>, <&clock 176>, <&clock 13>, 173 <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
173 <&clock 454>, <&clock 395>, <&clock 455>; 174 <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
175 <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>,
176 <&clock CLK_DIV_MCUISP0>,
177 <&clock CLK_DIV_MCUISP1>,
178 <&clock CLK_SCLK_UART_ISP>,
179 <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>,
180 <&clock CLK_ACLK400_MCUISP>,
181 <&clock CLK_DIV_ACLK400_MCUISP>;
174 clock-names = "lite0", "lite1", "ppmuispx", 182 clock-names = "lite0", "lite1", "ppmuispx",
175 "ppmuispmx", "mpll", "isp", 183 "ppmuispmx", "mpll", "isp",
176 "drc", "fd", "mcuisp", 184 "drc", "fd", "mcuisp",
@@ -190,7 +198,7 @@
190 i2c1_isp: i2c-isp@12140000 { 198 i2c1_isp: i2c-isp@12140000 {
191 compatible = "samsung,exynos4212-i2c-isp"; 199 compatible = "samsung,exynos4212-i2c-isp";
192 reg = <0x12140000 0x100>; 200 reg = <0x12140000 0x100>;
193 clocks = <&clock 370>; 201 clocks = <&clock CLK_I2C1_ISP>;
194 clock-names = "i2c_isp"; 202 clock-names = "i2c_isp";
195 #address-cells = <1>; 203 #address-cells = <1>;
196 #size-cells = <0>; 204 #size-cells = <0>;
@@ -205,7 +213,7 @@
205 #address-cells = <1>; 213 #address-cells = <1>;
206 #size-cells = <0>; 214 #size-cells = <0>;
207 fifo-depth = <0x80>; 215 fifo-depth = <0x80>;
208 clocks = <&clock 301>, <&clock 149>; 216 clocks = <&clock CLK_SDMMC4>, <&clock CLK_SCLK_MMC4>;
209 clock-names = "biu", "ciu"; 217 clock-names = "biu", "ciu";
210 status = "disabled"; 218 status = "disabled";
211 }; 219 };
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 258dca441f36..79d0608d6dcc 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -81,13 +81,6 @@
81 status = "disabled"; 81 status = "disabled";
82 }; 82 };
83 83
84 watchdog {
85 compatible = "samsung,s3c2410-wdt";
86 reg = <0x101D0000 0x100>;
87 interrupts = <0 42 0>;
88 status = "disabled";
89 };
90
91 fimd@14400000 { 84 fimd@14400000 {
92 compatible = "samsung,exynos5250-fimd"; 85 compatible = "samsung,exynos5250-fimd";
93 interrupt-parent = <&combiner>; 86 interrupt-parent = <&combiner>;
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index b42e658876e5..56c40783c3eb 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -25,6 +25,10 @@
25 bootargs = "console=ttySAC2,115200"; 25 bootargs = "console=ttySAC2,115200";
26 }; 26 };
27 27
28 rtc@101E0000 {
29 status = "okay";
30 };
31
28 codec@11000000 { 32 codec@11000000 {
29 samsung,mfc-r = <0x43000000 0x800000>; 33 samsung,mfc-r = <0x43000000 0x800000>;
30 samsung,mfc-l = <0x51000000 0x800000>; 34 samsung,mfc-l = <0x51000000 0x800000>;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 3e69837c435c..f76946e97e6a 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -27,6 +27,10 @@
27 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; 27 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
28 }; 28 };
29 29
30 rtc@101E0000 {
31 status = "okay";
32 };
33
30 i2c@12C60000 { 34 i2c@12C60000 {
31 samsung,i2c-sda-delay = <100>; 35 samsung,i2c-sda-delay = <100>;
32 samsung,i2c-max-bus-freq = <20000>; 36 samsung,i2c-max-bus-freq = <20000>;
@@ -36,6 +40,148 @@
36 compatible = "samsung,s524ad0xd1"; 40 compatible = "samsung,s524ad0xd1";
37 reg = <0x50>; 41 reg = <0x50>;
38 }; 42 };
43
44 max77686@09 {
45 compatible = "maxim,max77686";
46 reg = <0x09>;
47
48 voltage-regulators {
49 ldo1_reg: LDO1 {
50 regulator-name = "P1.0V_LDO_OUT1";
51 regulator-min-microvolt = <1000000>;
52 regulator-max-microvolt = <1000000>;
53 regulator-always-on;
54 };
55
56 ldo2_reg: LDO2 {
57 regulator-name = "P1.2V_LDO_OUT2";
58 regulator-min-microvolt = <1200000>;
59 regulator-max-microvolt = <1200000>;
60 regulator-always-on;
61 };
62
63 ldo3_reg: LDO3 {
64 regulator-name = "P1.8V_LDO_OUT3";
65 regulator-min-microvolt = <1800000>;
66 regulator-max-microvolt = <1800000>;
67 regulator-always-on;
68 };
69
70 ldo4_reg: LDO4 {
71 regulator-name = "P2.8V_LDO_OUT4";
72 regulator-min-microvolt = <2800000>;
73 regulator-max-microvolt = <2800000>;
74 };
75
76 ldo5_reg: LDO5 {
77 regulator-name = "P1.8V_LDO_OUT5";
78 regulator-min-microvolt = <1800000>;
79 regulator-max-microvolt = <1800000>;
80 };
81
82 ldo6_reg: LDO6 {
83 regulator-name = "P1.1V_LDO_OUT6";
84 regulator-min-microvolt = <1100000>;
85 regulator-max-microvolt = <1100000>;
86 regulator-always-on;
87 };
88
89 ldo7_reg: LDO7 {
90 regulator-name = "P1.1V_LDO_OUT7";
91 regulator-min-microvolt = <1100000>;
92 regulator-max-microvolt = <1100000>;
93 regulator-always-on;
94 };
95
96 ldo8_reg: LDO8 {
97 regulator-name = "P1.0V_LDO_OUT8";
98 regulator-min-microvolt = <1000000>;
99 regulator-max-microvolt = <1000000>;
100 };
101
102 ldo10_reg: LDO10 {
103 regulator-name = "P1.8V_LDO_OUT10";
104 regulator-min-microvolt = <1800000>;
105 regulator-max-microvolt = <1800000>;
106 };
107
108 ldo11_reg: LDO11 {
109 regulator-name = "P1.8V_LDO_OUT11";
110 regulator-min-microvolt = <1800000>;
111 regulator-max-microvolt = <1800000>;
112 };
113
114 ldo12_reg: LDO12 {
115 regulator-name = "P3.0V_LDO_OUT12";
116 regulator-min-microvolt = <3000000>;
117 regulator-max-microvolt = <3000000>;
118 };
119
120 ldo13_reg: LDO13 {
121 regulator-name = "P1.8V_LDO_OUT13";
122 regulator-min-microvolt = <1800000>;
123 regulator-max-microvolt = <1800000>;
124 };
125
126 ldo14_reg: LDO14 {
127 regulator-name = "P1.8V_LDO_OUT14";
128 regulator-min-microvolt = <1800000>;
129 regulator-max-microvolt = <1800000>;
130 };
131
132 ldo15_reg: LDO15 {
133 regulator-name = "P1.0V_LDO_OUT15";
134 regulator-min-microvolt = <1000000>;
135 regulator-max-microvolt = <1000000>;
136 };
137
138 ldo16_reg: LDO16 {
139 regulator-name = "P1.8V_LDO_OUT16";
140 regulator-min-microvolt = <1800000>;
141 regulator-max-microvolt = <1800000>;
142 };
143
144 buck1_reg: BUCK1 {
145 regulator-name = "vdd_mif";
146 regulator-min-microvolt = <950000>;
147 regulator-max-microvolt = <1300000>;
148 regulator-always-on;
149 regulator-boot-on;
150 };
151
152 buck2_reg: BUCK2 {
153 regulator-name = "vdd_arm";
154 regulator-min-microvolt = <850000>;
155 regulator-max-microvolt = <1350000>;
156 regulator-always-on;
157 regulator-boot-on;
158 };
159
160 buck3_reg: BUCK3 {
161 regulator-name = "vdd_int";
162 regulator-min-microvolt = <900000>;
163 regulator-max-microvolt = <1200000>;
164 regulator-always-on;
165 regulator-boot-on;
166 };
167
168 buck4_reg: BUCK4 {
169 regulator-name = "vdd_g3d";
170 regulator-min-microvolt = <850000>;
171 regulator-max-microvolt = <1300000>;
172 regulator-always-on;
173 regulator-boot-on;
174 };
175
176 buck5_reg: BUCK5 {
177 regulator-name = "P1.8V_BUCK_OUT5";
178 regulator-min-microvolt = <1800000>;
179 regulator-max-microvolt = <1800000>;
180 regulator-always-on;
181 regulator-boot-on;
182 };
183 };
184 };
39 }; 185 };
40 186
41 vdd: fixed-regulator@0 { 187 vdd: fixed-regulator@0 {
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index 7e45eea2d78f..b13bf499f5e2 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -20,6 +20,10 @@
20 i2c104 = &i2c_104; 20 i2c104 = &i2c_104;
21 }; 21 };
22 22
23 rtc@101E0000 {
24 status = "okay";
25 };
26
23 pinctrl@11400000 { 27 pinctrl@11400000 {
24 sd3_clk: sd3-clk { 28 sd3_clk: sd3-clk {
25 samsung,pin-drv = <0>; 29 samsung,pin-drv = <0>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b7dec41e32af..987cfbe9634b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -17,6 +17,7 @@
17 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
18*/ 18*/
19 19
20#include <dt-bindings/clock/exynos5250.h>
20#include "exynos5.dtsi" 21#include "exynos5.dtsi"
21#include "exynos5250-pinctrl.dtsi" 22#include "exynos5250-pinctrl.dtsi"
22 23
@@ -90,7 +91,8 @@
90 compatible = "samsung,exynos5250-audss-clock"; 91 compatible = "samsung,exynos5250-audss-clock";
91 reg = <0x03810000 0x0C>; 92 reg = <0x03810000 0x0C>;
92 #clock-cells = <1>; 93 #clock-cells = <1>;
93 clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>; 94 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
95 <&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>;
94 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 96 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
95 }; 97 };
96 98
@@ -115,7 +117,7 @@
115 interrupt-parent = <&mct_map>; 117 interrupt-parent = <&mct_map>;
116 interrupts = <0 0>, <1 0>, <2 0>, <3 0>, 118 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
117 <4 0>, <5 0>; 119 <4 0>, <5 0>;
118 clocks = <&clock 1>, <&clock 335>; 120 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
119 clock-names = "fin_pll", "mct"; 121 clock-names = "fin_pll", "mct";
120 122
121 mct_map: mct-map { 123 mct_map: mct-map {
@@ -167,16 +169,25 @@
167 interrupts = <0 47 0>; 169 interrupts = <0 47 0>;
168 }; 170 };
169 171
170 watchdog { 172 pmu_system_controller: system-controller@10040000 {
171 clocks = <&clock 336>; 173 compatible = "samsung,exynos5250-pmu", "syscon";
174 reg = <0x10040000 0x5000>;
175 };
176
177 watchdog@101D0000 {
178 compatible = "samsung,exynos5250-wdt";
179 reg = <0x101D0000 0x100>;
180 interrupts = <0 42 0>;
181 clocks = <&clock CLK_WDT>;
172 clock-names = "watchdog"; 182 clock-names = "watchdog";
183 samsung,syscon-phandle = <&pmu_system_controller>;
173 }; 184 };
174 185
175 g2d@10850000 { 186 g2d@10850000 {
176 compatible = "samsung,exynos5250-g2d"; 187 compatible = "samsung,exynos5250-g2d";
177 reg = <0x10850000 0x1000>; 188 reg = <0x10850000 0x1000>;
178 interrupts = <0 91 0>; 189 interrupts = <0 91 0>;
179 clocks = <&clock 345>; 190 clocks = <&clock CLK_G2D>;
180 clock-names = "fimg2d"; 191 clock-names = "fimg2d";
181 }; 192 };
182 193
@@ -185,41 +196,41 @@
185 reg = <0x11000000 0x10000>; 196 reg = <0x11000000 0x10000>;
186 interrupts = <0 96 0>; 197 interrupts = <0 96 0>;
187 samsung,power-domain = <&pd_mfc>; 198 samsung,power-domain = <&pd_mfc>;
188 clocks = <&clock 266>; 199 clocks = <&clock CLK_MFC>;
189 clock-names = "mfc"; 200 clock-names = "mfc";
190 }; 201 };
191 202
192 rtc@101E0000 { 203 rtc@101E0000 {
193 clocks = <&clock 337>; 204 clocks = <&clock CLK_RTC>;
194 clock-names = "rtc"; 205 clock-names = "rtc";
195 status = "okay"; 206 status = "disabled";
196 }; 207 };
197 208
198 tmu@10060000 { 209 tmu@10060000 {
199 compatible = "samsung,exynos5250-tmu"; 210 compatible = "samsung,exynos5250-tmu";
200 reg = <0x10060000 0x100>; 211 reg = <0x10060000 0x100>;
201 interrupts = <0 65 0>; 212 interrupts = <0 65 0>;
202 clocks = <&clock 338>; 213 clocks = <&clock CLK_TMU>;
203 clock-names = "tmu_apbif"; 214 clock-names = "tmu_apbif";
204 }; 215 };
205 216
206 serial@12C00000 { 217 serial@12C00000 {
207 clocks = <&clock 289>, <&clock 146>; 218 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
208 clock-names = "uart", "clk_uart_baud0"; 219 clock-names = "uart", "clk_uart_baud0";
209 }; 220 };
210 221
211 serial@12C10000 { 222 serial@12C10000 {
212 clocks = <&clock 290>, <&clock 147>; 223 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
213 clock-names = "uart", "clk_uart_baud0"; 224 clock-names = "uart", "clk_uart_baud0";
214 }; 225 };
215 226
216 serial@12C20000 { 227 serial@12C20000 {
217 clocks = <&clock 291>, <&clock 148>; 228 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
218 clock-names = "uart", "clk_uart_baud0"; 229 clock-names = "uart", "clk_uart_baud0";
219 }; 230 };
220 231
221 serial@12C30000 { 232 serial@12C30000 {
222 clocks = <&clock 292>, <&clock 149>; 233 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
223 clock-names = "uart", "clk_uart_baud0"; 234 clock-names = "uart", "clk_uart_baud0";
224 }; 235 };
225 236
@@ -227,7 +238,7 @@
227 compatible = "samsung,exynos5-sata-ahci"; 238 compatible = "samsung,exynos5-sata-ahci";
228 reg = <0x122F0000 0x1ff>; 239 reg = <0x122F0000 0x1ff>;
229 interrupts = <0 115 0>; 240 interrupts = <0 115 0>;
230 clocks = <&clock 277>, <&clock 143>; 241 clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
231 clock-names = "sata", "sclk_sata"; 242 clock-names = "sata", "sclk_sata";
232 }; 243 };
233 244
@@ -242,7 +253,7 @@
242 interrupts = <0 56 0>; 253 interrupts = <0 56 0>;
243 #address-cells = <1>; 254 #address-cells = <1>;
244 #size-cells = <0>; 255 #size-cells = <0>;
245 clocks = <&clock 294>; 256 clocks = <&clock CLK_I2C0>;
246 clock-names = "i2c"; 257 clock-names = "i2c";
247 pinctrl-names = "default"; 258 pinctrl-names = "default";
248 pinctrl-0 = <&i2c0_bus>; 259 pinctrl-0 = <&i2c0_bus>;
@@ -255,7 +266,7 @@
255 interrupts = <0 57 0>; 266 interrupts = <0 57 0>;
256 #address-cells = <1>; 267 #address-cells = <1>;
257 #size-cells = <0>; 268 #size-cells = <0>;
258 clocks = <&clock 295>; 269 clocks = <&clock CLK_I2C1>;
259 clock-names = "i2c"; 270 clock-names = "i2c";
260 pinctrl-names = "default"; 271 pinctrl-names = "default";
261 pinctrl-0 = <&i2c1_bus>; 272 pinctrl-0 = <&i2c1_bus>;
@@ -268,7 +279,7 @@
268 interrupts = <0 58 0>; 279 interrupts = <0 58 0>;
269 #address-cells = <1>; 280 #address-cells = <1>;
270 #size-cells = <0>; 281 #size-cells = <0>;
271 clocks = <&clock 296>; 282 clocks = <&clock CLK_I2C2>;
272 clock-names = "i2c"; 283 clock-names = "i2c";
273 pinctrl-names = "default"; 284 pinctrl-names = "default";
274 pinctrl-0 = <&i2c2_bus>; 285 pinctrl-0 = <&i2c2_bus>;
@@ -281,7 +292,7 @@
281 interrupts = <0 59 0>; 292 interrupts = <0 59 0>;
282 #address-cells = <1>; 293 #address-cells = <1>;
283 #size-cells = <0>; 294 #size-cells = <0>;
284 clocks = <&clock 297>; 295 clocks = <&clock CLK_I2C3>;
285 clock-names = "i2c"; 296 clock-names = "i2c";
286 pinctrl-names = "default"; 297 pinctrl-names = "default";
287 pinctrl-0 = <&i2c3_bus>; 298 pinctrl-0 = <&i2c3_bus>;
@@ -294,7 +305,7 @@
294 interrupts = <0 60 0>; 305 interrupts = <0 60 0>;
295 #address-cells = <1>; 306 #address-cells = <1>;
296 #size-cells = <0>; 307 #size-cells = <0>;
297 clocks = <&clock 298>; 308 clocks = <&clock CLK_I2C4>;
298 clock-names = "i2c"; 309 clock-names = "i2c";
299 pinctrl-names = "default"; 310 pinctrl-names = "default";
300 pinctrl-0 = <&i2c4_bus>; 311 pinctrl-0 = <&i2c4_bus>;
@@ -307,7 +318,7 @@
307 interrupts = <0 61 0>; 318 interrupts = <0 61 0>;
308 #address-cells = <1>; 319 #address-cells = <1>;
309 #size-cells = <0>; 320 #size-cells = <0>;
310 clocks = <&clock 299>; 321 clocks = <&clock CLK_I2C5>;
311 clock-names = "i2c"; 322 clock-names = "i2c";
312 pinctrl-names = "default"; 323 pinctrl-names = "default";
313 pinctrl-0 = <&i2c5_bus>; 324 pinctrl-0 = <&i2c5_bus>;
@@ -320,7 +331,7 @@
320 interrupts = <0 62 0>; 331 interrupts = <0 62 0>;
321 #address-cells = <1>; 332 #address-cells = <1>;
322 #size-cells = <0>; 333 #size-cells = <0>;
323 clocks = <&clock 300>; 334 clocks = <&clock CLK_I2C6>;
324 clock-names = "i2c"; 335 clock-names = "i2c";
325 pinctrl-names = "default"; 336 pinctrl-names = "default";
326 pinctrl-0 = <&i2c6_bus>; 337 pinctrl-0 = <&i2c6_bus>;
@@ -333,7 +344,7 @@
333 interrupts = <0 63 0>; 344 interrupts = <0 63 0>;
334 #address-cells = <1>; 345 #address-cells = <1>;
335 #size-cells = <0>; 346 #size-cells = <0>;
336 clocks = <&clock 301>; 347 clocks = <&clock CLK_I2C7>;
337 clock-names = "i2c"; 348 clock-names = "i2c";
338 pinctrl-names = "default"; 349 pinctrl-names = "default";
339 pinctrl-0 = <&i2c7_bus>; 350 pinctrl-0 = <&i2c7_bus>;
@@ -346,7 +357,7 @@
346 interrupts = <0 64 0>; 357 interrupts = <0 64 0>;
347 #address-cells = <1>; 358 #address-cells = <1>;
348 #size-cells = <0>; 359 #size-cells = <0>;
349 clocks = <&clock 302>; 360 clocks = <&clock CLK_I2C_HDMI>;
350 clock-names = "i2c"; 361 clock-names = "i2c";
351 status = "disabled"; 362 status = "disabled";
352 }; 363 };
@@ -356,7 +367,7 @@
356 reg = <0x121D0000 0x100>; 367 reg = <0x121D0000 0x100>;
357 #address-cells = <1>; 368 #address-cells = <1>;
358 #size-cells = <0>; 369 #size-cells = <0>;
359 clocks = <&clock 288>; 370 clocks = <&clock CLK_SATA_PHYI2C>;
360 clock-names = "i2c"; 371 clock-names = "i2c";
361 status = "disabled"; 372 status = "disabled";
362 }; 373 };
@@ -371,7 +382,7 @@
371 dma-names = "tx", "rx"; 382 dma-names = "tx", "rx";
372 #address-cells = <1>; 383 #address-cells = <1>;
373 #size-cells = <0>; 384 #size-cells = <0>;
374 clocks = <&clock 304>, <&clock 154>; 385 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
375 clock-names = "spi", "spi_busclk0"; 386 clock-names = "spi", "spi_busclk0";
376 pinctrl-names = "default"; 387 pinctrl-names = "default";
377 pinctrl-0 = <&spi0_bus>; 388 pinctrl-0 = <&spi0_bus>;
@@ -387,7 +398,7 @@
387 dma-names = "tx", "rx"; 398 dma-names = "tx", "rx";
388 #address-cells = <1>; 399 #address-cells = <1>;
389 #size-cells = <0>; 400 #size-cells = <0>;
390 clocks = <&clock 305>, <&clock 155>; 401 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
391 clock-names = "spi", "spi_busclk0"; 402 clock-names = "spi", "spi_busclk0";
392 pinctrl-names = "default"; 403 pinctrl-names = "default";
393 pinctrl-0 = <&spi1_bus>; 404 pinctrl-0 = <&spi1_bus>;
@@ -403,7 +414,7 @@
403 dma-names = "tx", "rx"; 414 dma-names = "tx", "rx";
404 #address-cells = <1>; 415 #address-cells = <1>;
405 #size-cells = <0>; 416 #size-cells = <0>;
406 clocks = <&clock 306>, <&clock 156>; 417 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
407 clock-names = "spi", "spi_busclk0"; 418 clock-names = "spi", "spi_busclk0";
408 pinctrl-names = "default"; 419 pinctrl-names = "default";
409 pinctrl-0 = <&spi2_bus>; 420 pinctrl-0 = <&spi2_bus>;
@@ -415,7 +426,7 @@
415 #address-cells = <1>; 426 #address-cells = <1>;
416 #size-cells = <0>; 427 #size-cells = <0>;
417 reg = <0x12200000 0x1000>; 428 reg = <0x12200000 0x1000>;
418 clocks = <&clock 280>, <&clock 139>; 429 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
419 clock-names = "biu", "ciu"; 430 clock-names = "biu", "ciu";
420 fifo-depth = <0x80>; 431 fifo-depth = <0x80>;
421 status = "disabled"; 432 status = "disabled";
@@ -427,7 +438,7 @@
427 #address-cells = <1>; 438 #address-cells = <1>;
428 #size-cells = <0>; 439 #size-cells = <0>;
429 reg = <0x12210000 0x1000>; 440 reg = <0x12210000 0x1000>;
430 clocks = <&clock 281>, <&clock 140>; 441 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
431 clock-names = "biu", "ciu"; 442 clock-names = "biu", "ciu";
432 fifo-depth = <0x80>; 443 fifo-depth = <0x80>;
433 status = "disabled"; 444 status = "disabled";
@@ -439,7 +450,7 @@
439 #address-cells = <1>; 450 #address-cells = <1>;
440 #size-cells = <0>; 451 #size-cells = <0>;
441 reg = <0x12220000 0x1000>; 452 reg = <0x12220000 0x1000>;
442 clocks = <&clock 282>, <&clock 141>; 453 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
443 clock-names = "biu", "ciu"; 454 clock-names = "biu", "ciu";
444 fifo-depth = <0x80>; 455 fifo-depth = <0x80>;
445 status = "disabled"; 456 status = "disabled";
@@ -451,7 +462,7 @@
451 interrupts = <0 78 0>; 462 interrupts = <0 78 0>;
452 #address-cells = <1>; 463 #address-cells = <1>;
453 #size-cells = <0>; 464 #size-cells = <0>;
454 clocks = <&clock 283>, <&clock 142>; 465 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
455 clock-names = "biu", "ciu"; 466 clock-names = "biu", "ciu";
456 fifo-depth = <0x80>; 467 fifo-depth = <0x80>;
457 status = "disabled"; 468 status = "disabled";
@@ -481,7 +492,7 @@
481 dmas = <&pdma1 12 492 dmas = <&pdma1 12
482 &pdma1 11>; 493 &pdma1 11>;
483 dma-names = "tx", "rx"; 494 dma-names = "tx", "rx";
484 clocks = <&clock 307>, <&clock 157>; 495 clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>;
485 clock-names = "iis", "i2s_opclk0"; 496 clock-names = "iis", "i2s_opclk0";
486 pinctrl-names = "default"; 497 pinctrl-names = "default";
487 pinctrl-0 = <&i2s1_bus>; 498 pinctrl-0 = <&i2s1_bus>;
@@ -494,7 +505,7 @@
494 dmas = <&pdma0 12 505 dmas = <&pdma0 12
495 &pdma0 11>; 506 &pdma0 11>;
496 dma-names = "tx", "rx"; 507 dma-names = "tx", "rx";
497 clocks = <&clock 308>, <&clock 158>; 508 clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>;
498 clock-names = "iis", "i2s_opclk0"; 509 clock-names = "iis", "i2s_opclk0";
499 pinctrl-names = "default"; 510 pinctrl-names = "default";
500 pinctrl-0 = <&i2s2_bus>; 511 pinctrl-0 = <&i2s2_bus>;
@@ -502,7 +513,7 @@
502 513
503 usb@12000000 { 514 usb@12000000 {
504 compatible = "samsung,exynos5250-dwusb3"; 515 compatible = "samsung,exynos5250-dwusb3";
505 clocks = <&clock 286>; 516 clocks = <&clock CLK_USB3>;
506 clock-names = "usbdrd30"; 517 clock-names = "usbdrd30";
507 #address-cells = <1>; 518 #address-cells = <1>;
508 #size-cells = <1>; 519 #size-cells = <1>;
@@ -519,7 +530,7 @@
519 usb3_phy: usbphy@12100000 { 530 usb3_phy: usbphy@12100000 {
520 compatible = "samsung,exynos5250-usb3phy"; 531 compatible = "samsung,exynos5250-usb3phy";
521 reg = <0x12100000 0x100>; 532 reg = <0x12100000 0x100>;
522 clocks = <&clock 1>, <&clock 286>; 533 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB3>;
523 clock-names = "ext_xtal", "usbdrd30"; 534 clock-names = "ext_xtal", "usbdrd30";
524 #address-cells = <1>; 535 #address-cells = <1>;
525 #size-cells = <1>; 536 #size-cells = <1>;
@@ -535,7 +546,7 @@
535 reg = <0x12110000 0x100>; 546 reg = <0x12110000 0x100>;
536 interrupts = <0 71 0>; 547 interrupts = <0 71 0>;
537 548
538 clocks = <&clock 285>; 549 clocks = <&clock CLK_USB2>;
539 clock-names = "usbhost"; 550 clock-names = "usbhost";
540 }; 551 };
541 552
@@ -544,14 +555,14 @@
544 reg = <0x12120000 0x100>; 555 reg = <0x12120000 0x100>;
545 interrupts = <0 71 0>; 556 interrupts = <0 71 0>;
546 557
547 clocks = <&clock 285>; 558 clocks = <&clock CLK_USB2>;
548 clock-names = "usbhost"; 559 clock-names = "usbhost";
549 }; 560 };
550 561
551 usb2_phy: usbphy@12130000 { 562 usb2_phy: usbphy@12130000 {
552 compatible = "samsung,exynos5250-usb2phy"; 563 compatible = "samsung,exynos5250-usb2phy";
553 reg = <0x12130000 0x100>; 564 reg = <0x12130000 0x100>;
554 clocks = <&clock 1>, <&clock 285>; 565 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB2>;
555 clock-names = "ext_xtal", "usbhost"; 566 clock-names = "ext_xtal", "usbhost";
556 #address-cells = <1>; 567 #address-cells = <1>;
557 #size-cells = <1>; 568 #size-cells = <1>;
@@ -568,7 +579,7 @@
568 reg = <0x12dd0000 0x100>; 579 reg = <0x12dd0000 0x100>;
569 samsung,pwm-outputs = <0>, <1>, <2>, <3>; 580 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
570 #pwm-cells = <3>; 581 #pwm-cells = <3>;
571 clocks = <&clock 311>; 582 clocks = <&clock CLK_PWM>;
572 clock-names = "timers"; 583 clock-names = "timers";
573 }; 584 };
574 585
@@ -583,7 +594,7 @@
583 compatible = "arm,pl330", "arm,primecell"; 594 compatible = "arm,pl330", "arm,primecell";
584 reg = <0x121A0000 0x1000>; 595 reg = <0x121A0000 0x1000>;
585 interrupts = <0 34 0>; 596 interrupts = <0 34 0>;
586 clocks = <&clock 275>; 597 clocks = <&clock CLK_PDMA0>;
587 clock-names = "apb_pclk"; 598 clock-names = "apb_pclk";
588 #dma-cells = <1>; 599 #dma-cells = <1>;
589 #dma-channels = <8>; 600 #dma-channels = <8>;
@@ -594,7 +605,7 @@
594 compatible = "arm,pl330", "arm,primecell"; 605 compatible = "arm,pl330", "arm,primecell";
595 reg = <0x121B0000 0x1000>; 606 reg = <0x121B0000 0x1000>;
596 interrupts = <0 35 0>; 607 interrupts = <0 35 0>;
597 clocks = <&clock 276>; 608 clocks = <&clock CLK_PDMA1>;
598 clock-names = "apb_pclk"; 609 clock-names = "apb_pclk";
599 #dma-cells = <1>; 610 #dma-cells = <1>;
600 #dma-channels = <8>; 611 #dma-channels = <8>;
@@ -605,7 +616,7 @@
605 compatible = "arm,pl330", "arm,primecell"; 616 compatible = "arm,pl330", "arm,primecell";
606 reg = <0x10800000 0x1000>; 617 reg = <0x10800000 0x1000>;
607 interrupts = <0 33 0>; 618 interrupts = <0 33 0>;
608 clocks = <&clock 346>; 619 clocks = <&clock CLK_MDMA0>;
609 clock-names = "apb_pclk"; 620 clock-names = "apb_pclk";
610 #dma-cells = <1>; 621 #dma-cells = <1>;
611 #dma-channels = <8>; 622 #dma-channels = <8>;
@@ -616,7 +627,7 @@
616 compatible = "arm,pl330", "arm,primecell"; 627 compatible = "arm,pl330", "arm,primecell";
617 reg = <0x11C10000 0x1000>; 628 reg = <0x11C10000 0x1000>;
618 interrupts = <0 124 0>; 629 interrupts = <0 124 0>;
619 clocks = <&clock 271>; 630 clocks = <&clock CLK_MDMA1>;
620 clock-names = "apb_pclk"; 631 clock-names = "apb_pclk";
621 #dma-cells = <1>; 632 #dma-cells = <1>;
622 #dma-channels = <8>; 633 #dma-channels = <8>;
@@ -629,7 +640,7 @@
629 reg = <0x13e00000 0x1000>; 640 reg = <0x13e00000 0x1000>;
630 interrupts = <0 85 0>; 641 interrupts = <0 85 0>;
631 samsung,power-domain = <&pd_gsc>; 642 samsung,power-domain = <&pd_gsc>;
632 clocks = <&clock 256>; 643 clocks = <&clock CLK_GSCL0>;
633 clock-names = "gscl"; 644 clock-names = "gscl";
634 }; 645 };
635 646
@@ -638,7 +649,7 @@
638 reg = <0x13e10000 0x1000>; 649 reg = <0x13e10000 0x1000>;
639 interrupts = <0 86 0>; 650 interrupts = <0 86 0>;
640 samsung,power-domain = <&pd_gsc>; 651 samsung,power-domain = <&pd_gsc>;
641 clocks = <&clock 257>; 652 clocks = <&clock CLK_GSCL1>;
642 clock-names = "gscl"; 653 clock-names = "gscl";
643 }; 654 };
644 655
@@ -647,7 +658,7 @@
647 reg = <0x13e20000 0x1000>; 658 reg = <0x13e20000 0x1000>;
648 interrupts = <0 87 0>; 659 interrupts = <0 87 0>;
649 samsung,power-domain = <&pd_gsc>; 660 samsung,power-domain = <&pd_gsc>;
650 clocks = <&clock 258>; 661 clocks = <&clock CLK_GSCL2>;
651 clock-names = "gscl"; 662 clock-names = "gscl";
652 }; 663 };
653 664
@@ -656,7 +667,7 @@
656 reg = <0x13e30000 0x1000>; 667 reg = <0x13e30000 0x1000>;
657 interrupts = <0 88 0>; 668 interrupts = <0 88 0>;
658 samsung,power-domain = <&pd_gsc>; 669 samsung,power-domain = <&pd_gsc>;
659 clocks = <&clock 259>; 670 clocks = <&clock CLK_GSCL3>;
660 clock-names = "gscl"; 671 clock-names = "gscl";
661 }; 672 };
662 673
@@ -664,8 +675,9 @@
664 compatible = "samsung,exynos4212-hdmi"; 675 compatible = "samsung,exynos4212-hdmi";
665 reg = <0x14530000 0x70000>; 676 reg = <0x14530000 0x70000>;
666 interrupts = <0 95 0>; 677 interrupts = <0 95 0>;
667 clocks = <&clock 344>, <&clock 136>, <&clock 137>, 678 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
668 <&clock 159>, <&clock 1024>; 679 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
680 <&clock CLK_MOUT_HDMI>;
669 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", 681 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
670 "sclk_hdmiphy", "mout_hdmi"; 682 "sclk_hdmiphy", "mout_hdmi";
671 }; 683 };
@@ -674,7 +686,7 @@
674 compatible = "samsung,exynos5250-mixer"; 686 compatible = "samsung,exynos5250-mixer";
675 reg = <0x14450000 0x10000>; 687 reg = <0x14450000 0x10000>;
676 interrupts = <0 94 0>; 688 interrupts = <0 94 0>;
677 clocks = <&clock 343>, <&clock 136>; 689 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
678 clock-names = "mixer", "sclk_hdmi"; 690 clock-names = "mixer", "sclk_hdmi";
679 }; 691 };
680 692
@@ -685,14 +697,14 @@
685 }; 697 };
686 698
687 dp-controller@145B0000 { 699 dp-controller@145B0000 {
688 clocks = <&clock 342>; 700 clocks = <&clock CLK_DP>;
689 clock-names = "dp"; 701 clock-names = "dp";
690 phys = <&dp_phy>; 702 phys = <&dp_phy>;
691 phy-names = "dp"; 703 phy-names = "dp";
692 }; 704 };
693 705
694 fimd@14400000 { 706 fimd@14400000 {
695 clocks = <&clock 133>, <&clock 339>; 707 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
696 clock-names = "sclk_fimd", "fimd"; 708 clock-names = "sclk_fimd", "fimd";
697 }; 709 };
698 710
@@ -700,7 +712,7 @@
700 compatible = "samsung,exynos-adc-v1"; 712 compatible = "samsung,exynos-adc-v1";
701 reg = <0x12D10000 0x100>, <0x10040718 0x4>; 713 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
702 interrupts = <0 106 0>; 714 interrupts = <0 106 0>;
703 clocks = <&clock 303>; 715 clocks = <&clock CLK_ADC>;
704 clock-names = "adc"; 716 clock-names = "adc";
705 #io-channel-cells = <1>; 717 #io-channel-cells = <1>;
706 io-channel-ranges; 718 io-channel-ranges;
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index 7340745ff979..f509e8fc290f 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -11,6 +11,8 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "exynos5420.dtsi" 13#include "exynos5420.dtsi"
14#include <dt-bindings/interrupt-controller/irq.h>
15#include <dt-bindings/input/input.h>
14 16
15/ { 17/ {
16 model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; 18 model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
@@ -31,6 +33,10 @@
31 }; 33 };
32 }; 34 };
33 35
36 rtc@101E0000 {
37 status = "okay";
38 };
39
34 mmc@12200000 { 40 mmc@12200000 {
35 status = "okay"; 41 status = "okay";
36 broken-cd; 42 broken-cd;
@@ -41,6 +47,7 @@
41 samsung,dw-mshc-ddr-timing = <0 2>; 47 samsung,dw-mshc-ddr-timing = <0 2>;
42 pinctrl-names = "default"; 48 pinctrl-names = "default";
43 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; 49 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
50 vmmc-supply = <&ldo10_reg>;
44 51
45 slot@0 { 52 slot@0 {
46 reg = <0>; 53 reg = <0>;
@@ -57,10 +64,301 @@
57 samsung,dw-mshc-ddr-timing = <1 2>; 64 samsung,dw-mshc-ddr-timing = <1 2>;
58 pinctrl-names = "default"; 65 pinctrl-names = "default";
59 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; 66 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
67 vmmc-supply = <&ldo10_reg>;
60 68
61 slot@0 { 69 slot@0 {
62 reg = <0>; 70 reg = <0>;
63 bus-width = <4>; 71 bus-width = <4>;
64 }; 72 };
65 }; 73 };
74
75 hsi2c_4: i2c@12CA0000 {
76 status = "okay";
77
78 s2mps11_pmic@66 {
79 compatible = "samsung,s2mps11-pmic";
80 reg = <0x66>;
81 s2mps11,buck2-ramp-delay = <12>;
82 s2mps11,buck34-ramp-delay = <12>;
83 s2mps11,buck16-ramp-delay = <12>;
84 s2mps11,buck6-ramp-enable = <1>;
85 s2mps11,buck2-ramp-enable = <1>;
86 s2mps11,buck3-ramp-enable = <1>;
87 s2mps11,buck4-ramp-enable = <1>;
88
89 interrupt-parent = <&gpx3>;
90 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
91
92 s2mps11_osc: clocks {
93 #clock-cells = <1>;
94 clock-output-names = "s2mps11_ap",
95 "s2mps11_cp", "s2mps11_bt";
96 };
97
98 regulators {
99 ldo1_reg: LDO1 {
100 regulator-name = "PVDD_ALIVE_1V0";
101 regulator-min-microvolt = <1000000>;
102 regulator-max-microvolt = <1000000>;
103 regulator-always-on;
104 };
105
106 ldo2_reg: LDO2 {
107 regulator-name = "PVDD_APIO_1V8";
108 regulator-min-microvolt = <1800000>;
109 regulator-max-microvolt = <1800000>;
110 };
111
112 ldo3_reg: LDO3 {
113 regulator-name = "PVDD_APIO_MMCON_1V8";
114 regulator-min-microvolt = <1800000>;
115 regulator-max-microvolt = <1800000>;
116 };
117
118 ldo4_reg: LDO4 {
119 regulator-name = "PVDD_ADC_1V8";
120 regulator-min-microvolt = <1800000>;
121 regulator-max-microvolt = <1800000>;
122 };
123
124 ldo5_reg: LDO5 {
125 regulator-name = "PVDD_PLL_1V8";
126 regulator-min-microvolt = <1800000>;
127 regulator-max-microvolt = <1800000>;
128 regulator-always-on;
129 };
130
131 ldo6_reg: LDO6 {
132 regulator-name = "PVDD_ANAIP_1V0";
133 regulator-min-microvolt = <1000000>;
134 regulator-max-microvolt = <1000000>;
135 };
136
137 ldo7_reg: LDO7 {
138 regulator-name = "PVDD_ANAIP_1V8";
139 regulator-min-microvolt = <1800000>;
140 regulator-max-microvolt = <1800000>;
141 };
142
143 ldo8_reg: LDO8 {
144 regulator-name = "PVDD_ABB_1V8";
145 regulator-min-microvolt = <1800000>;
146 regulator-max-microvolt = <1800000>;
147 };
148
149 ldo9_reg: LDO9 {
150 regulator-name = "PVDD_USB_3V3";
151 regulator-min-microvolt = <3000000>;
152 regulator-max-microvolt = <3000000>;
153 };
154
155 ldo10_reg: LDO10 {
156 regulator-name = "PVDD_PRE_1V8";
157 regulator-min-microvolt = <1800000>;
158 regulator-max-microvolt = <1800000>;
159 regulator-always-on;
160 };
161
162 ldo11_reg: LDO11 {
163 regulator-name = "PVDD_USB_1V0";
164 regulator-min-microvolt = <1000000>;
165 regulator-max-microvolt = <1000000>;
166 regulator-always-on;
167 };
168
169 ldo12_reg: LDO12 {
170 regulator-name = "PVDD_HSIC_1V8";
171 regulator-min-microvolt = <1800000>;
172 regulator-max-microvolt = <1800000>;
173 };
174
175 ldo13_reg: LDO13 {
176 regulator-name = "PVDD_APIO_MMCOFF_2V8";
177 regulator-min-microvolt = <2800000>;
178 regulator-max-microvolt = <2800000>;
179 };
180
181 ldo15_reg: LDO15 {
182 regulator-name = "PVDD_PERI_2V8";
183 regulator-min-microvolt = <3300000>;
184 regulator-max-microvolt = <3300000>;
185 };
186
187 ldo16_reg: LDO16 {
188 regulator-name = "PVDD_PERI_3V3";
189 regulator-min-microvolt = <2200000>;
190 regulator-max-microvolt = <2200000>;
191 };
192
193 ldo18_reg: LDO18 {
194 regulator-name = "PVDD_EMMC_1V8";
195 regulator-min-microvolt = <1800000>;
196 regulator-max-microvolt = <1800000>;
197 };
198
199 ldo19_reg: LDO19 {
200 regulator-name = "PVDD_TFLASH_2V8";
201 regulator-min-microvolt = <2800000>;
202 regulator-max-microvolt = <2800000>;
203 };
204
205 ldo20_reg: LDO20 {
206 regulator-name = "PVDD_BTWIFI_1V8";
207 regulator-min-microvolt = <1800000>;
208 regulator-max-microvolt = <1800000>;
209 };
210
211 ldo21_reg: LDO21 {
212 regulator-name = "PVDD_CAM1IO_1V8";
213 regulator-min-microvolt = <1800000>;
214 regulator-max-microvolt = <1800000>;
215 };
216
217 ldo23_reg: LDO23 {
218 regulator-name = "PVDD_MIFS_1V1";
219 regulator-min-microvolt = <1200000>;
220 regulator-max-microvolt = <1200000>;
221 };
222
223 ldo24_reg: LDO24 {
224 regulator-name = "PVDD_CAM1_AVDD_2V8";
225 regulator-min-microvolt = <2800000>;
226 regulator-max-microvolt = <2800000>;
227 };
228
229 ldo26_reg: LDO26 {
230 regulator-name = "PVDD_CAM0_AF_2V8";
231 regulator-min-microvolt = <3000000>;
232 regulator-max-microvolt = <3000000>;
233 };
234
235 ldo27_reg: LDO27 {
236 regulator-name = "PVDD_G3DS_1V0";
237 regulator-min-microvolt = <1200000>;
238 regulator-max-microvolt = <1200000>;
239 };
240
241 ldo28_reg: LDO28 {
242 regulator-name = "PVDD_TSP_3V3";
243 regulator-min-microvolt = <3300000>;
244 regulator-max-microvolt = <3300000>;
245 };
246
247 ldo29_reg: LDO29 {
248 regulator-name = "PVDD_AUDIO_1V8";
249 regulator-min-microvolt = <1800000>;
250 regulator-max-microvolt = <1800000>;
251 };
252
253 ldo31_reg: LDO31 {
254 regulator-name = "PVDD_PERI_1V8";
255 regulator-min-microvolt = <1800000>;
256 regulator-max-microvolt = <1800000>;
257 };
258
259 ldo32_reg: LDO32 {
260 regulator-name = "PVDD_LCD_1V8";
261 regulator-min-microvolt = <1800000>;
262 regulator-max-microvolt = <1800000>;
263 };
264
265 ldo33_reg: LDO33 {
266 regulator-name = "PVDD_CAM0IO_1V8";
267 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <1800000>;
269 };
270
271 ldo35_reg: LDO35 {
272 regulator-name = "PVDD_CAM0_DVDD_1V2";
273 regulator-min-microvolt = <1200000>;
274 regulator-max-microvolt = <1200000>;
275 };
276
277 ldo38_reg: LDO38 {
278 regulator-name = "PVDD_CAM0_AVDD_2V8";
279 regulator-min-microvolt = <2800000>;
280 regulator-max-microvolt = <2800000>;
281 };
282
283 buck1_reg: BUCK1 {
284 regulator-name = "PVDD_MIF_1V1";
285 regulator-min-microvolt = <800000>;
286 regulator-max-microvolt = <1100000>;
287 regulator-always-on;
288 };
289
290 buck2_reg: BUCK2 {
291 regulator-name = "vdd_arm";
292 regulator-min-microvolt = <800000>;
293 regulator-max-microvolt = <1000000>;
294 regulator-always-on;
295 };
296
297 buck3_reg: BUCK3 {
298 regulator-name = "PVDD_INT_1V0";
299 regulator-min-microvolt = <800000>;
300 regulator-max-microvolt = <1000000>;
301 regulator-always-on;
302 };
303
304 buck4_reg: BUCK4 {
305 regulator-name = "PVDD_G3D_1V0";
306 regulator-min-microvolt = <800000>;
307 regulator-max-microvolt = <1000000>;
308 };
309
310 buck5_reg: BUCK5 {
311 regulator-name = "PVDD_LPDDR3_1V2";
312 regulator-min-microvolt = <800000>;
313 regulator-max-microvolt = <1200000>;
314 regulator-always-on;
315 };
316
317 buck6_reg: BUCK6 {
318 regulator-name = "PVDD_KFC_1V0";
319 regulator-min-microvolt = <800000>;
320 regulator-max-microvolt = <1000000>;
321 regulator-always-on;
322 };
323
324 buck7_reg: BUCK7 {
325 regulator-name = "VIN_LLDO_1V4";
326 regulator-min-microvolt = <800000>;
327 regulator-max-microvolt = <1400000>;
328 regulator-always-on;
329 };
330
331 buck8_reg: BUCK8 {
332 regulator-name = "VIN_MLDO_2V0";
333 regulator-min-microvolt = <800000>;
334 regulator-max-microvolt = <2000000>;
335 regulator-always-on;
336 };
337
338 buck9_reg: BUCK9 {
339 regulator-name = "VIN_HLDO_3V5";
340 regulator-min-microvolt = <3000000>;
341 regulator-max-microvolt = <3500000>;
342 regulator-always-on;
343 };
344
345 buck10_reg: BUCK10 {
346 regulator-name = "PVDD_EMMCF_2V8";
347 regulator-min-microvolt = <2800000>;
348 regulator-max-microvolt = <2800000>;
349 };
350 };
351 };
352 };
353
354 gpio_keys {
355 compatible = "gpio-keys";
356
357 wakeup {
358 label = "SW-TACT1";
359 gpios = <&gpx2 7 1>;
360 linux,code = <KEY_WAKEUP>;
361 gpio-key,wakeup;
362 };
363 };
66}; 364};
diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index fb5a1e25c632..ae1ee0470fca 100644
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -31,6 +31,43 @@
31 }; 31 };
32 }; 32 };
33 33
34 regulators {
35 compatible = "simple-bus";
36 #address-cells = <1>;
37 #size-cells = <0>;
38
39 vdd: fixed-regulator@0 {
40 compatible = "regulator-fixed";
41 reg = <0>;
42 regulator-name = "vdd-supply";
43 regulator-min-microvolt = <1800000>;
44 regulator-max-microvolt = <1800000>;
45 regulator-always-on;
46 };
47
48 dbvdd: fixed-regulator@1 {
49 compatible = "regulator-fixed";
50 reg = <1>;
51 regulator-name = "dbvdd-supply";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 regulator-always-on;
55 };
56
57 spkvdd: fixed-regulator@2 {
58 compatible = "regulator-fixed";
59 reg = <2>;
60 regulator-name = "spkvdd-supply";
61 regulator-min-microvolt = <5000000>;
62 regulator-max-microvolt = <5000000>;
63 regulator-always-on;
64 };
65 };
66
67 rtc@101E0000 {
68 status = "okay";
69 };
70
34 mmc@12200000 { 71 mmc@12200000 {
35 status = "okay"; 72 status = "okay";
36 broken-cd; 73 broken-cd;
@@ -120,4 +157,220 @@
120 reg = <0x50>; 157 reg = <0x50>;
121 }; 158 };
122 }; 159 };
160
161 hsi2c_4: i2c@12CA0000 {
162 status = "okay";
163
164 s2mps11_pmic@66 {
165 compatible = "samsung,s2mps11-pmic";
166 reg = <0x66>;
167 s2mps11,buck2-ramp-delay = <12>;
168 s2mps11,buck34-ramp-delay = <12>;
169 s2mps11,buck16-ramp-delay = <12>;
170 s2mps11,buck6-ramp-enable = <1>;
171 s2mps11,buck2-ramp-enable = <1>;
172 s2mps11,buck3-ramp-enable = <1>;
173 s2mps11,buck4-ramp-enable = <1>;
174
175 s2mps11_osc: clocks {
176 #clock-cells = <1>;
177 clock-output-names = "s2mps11_ap",
178 "s2mps11_cp", "s2mps11_bt";
179 };
180
181 regulators {
182 ldo1_reg: LDO1 {
183 regulator-name = "vdd_ldo1";
184 regulator-min-microvolt = <1000000>;
185 regulator-max-microvolt = <1000000>;
186 regulator-always-on;
187 };
188
189 ldo3_reg: LDO3 {
190 regulator-name = "vdd_ldo3";
191 regulator-min-microvolt = <1800000>;
192 regulator-max-microvolt = <1800000>;
193 regulator-always-on;
194 };
195
196 ldo5_reg: LDO5 {
197 regulator-name = "vdd_ldo5";
198 regulator-min-microvolt = <1800000>;
199 regulator-max-microvolt = <1800000>;
200 regulator-always-on;
201 };
202
203 ldo6_reg: LDO6 {
204 regulator-name = "vdd_ldo6";
205 regulator-min-microvolt = <1000000>;
206 regulator-max-microvolt = <1000000>;
207 regulator-always-on;
208 };
209
210 ldo7_reg: LDO7 {
211 regulator-name = "vdd_ldo7";
212 regulator-min-microvolt = <1800000>;
213 regulator-max-microvolt = <1800000>;
214 regulator-always-on;
215 };
216
217 ldo8_reg: LDO8 {
218 regulator-name = "vdd_ldo8";
219 regulator-min-microvolt = <1800000>;
220 regulator-max-microvolt = <1800000>;
221 regulator-always-on;
222 };
223
224 ldo9_reg: LDO9 {
225 regulator-name = "vdd_ldo9";
226 regulator-min-microvolt = <3000000>;
227 regulator-max-microvolt = <3000000>;
228 regulator-always-on;
229 };
230
231 ldo10_reg: LDO10 {
232 regulator-name = "vdd_ldo10";
233 regulator-min-microvolt = <1800000>;
234 regulator-max-microvolt = <1800000>;
235 regulator-always-on;
236 };
237
238 ldo11_reg: LDO11 {
239 regulator-name = "vdd_ldo11";
240 regulator-min-microvolt = <1000000>;
241 regulator-max-microvolt = <1000000>;
242 regulator-always-on;
243 };
244
245 ldo12_reg: LDO12 {
246 regulator-name = "vdd_ldo12";
247 regulator-min-microvolt = <1800000>;
248 regulator-max-microvolt = <1800000>;
249 regulator-always-on;
250 };
251
252 ldo13_reg: LDO13 {
253 regulator-name = "vdd_ldo13";
254 regulator-min-microvolt = <2800000>;
255 regulator-max-microvolt = <2800000>;
256 regulator-always-on;
257 };
258
259 ldo15_reg: LDO15 {
260 regulator-name = "vdd_ldo15";
261 regulator-min-microvolt = <3100000>;
262 regulator-max-microvolt = <3100000>;
263 regulator-always-on;
264 };
265
266 ldo16_reg: LDO16 {
267 regulator-name = "vdd_ldo16";
268 regulator-min-microvolt = <2200000>;
269 regulator-max-microvolt = <2200000>;
270 regulator-always-on;
271 };
272
273 ldo17_reg: LDO17 {
274 regulator-name = "tsp_avdd";
275 regulator-min-microvolt = <3300000>;
276 regulator-max-microvolt = <3300000>;
277 regulator-always-on;
278 };
279
280 ldo19_reg: LDO19 {
281 regulator-name = "vdd_sd";
282 regulator-min-microvolt = <2800000>;
283 regulator-max-microvolt = <2800000>;
284 regulator-always-on;
285 };
286
287 ldo24_reg: LDO24 {
288 regulator-name = "tsp_io";
289 regulator-min-microvolt = <2800000>;
290 regulator-max-microvolt = <2800000>;
291 regulator-always-on;
292 };
293
294 buck1_reg: BUCK1 {
295 regulator-name = "vdd_mif";
296 regulator-min-microvolt = <800000>;
297 regulator-max-microvolt = <1300000>;
298 regulator-always-on;
299 regulator-boot-on;
300 };
301
302 buck2_reg: BUCK2 {
303 regulator-name = "vdd_arm";
304 regulator-min-microvolt = <800000>;
305 regulator-max-microvolt = <1500000>;
306 regulator-always-on;
307 regulator-boot-on;
308 };
309
310 buck3_reg: BUCK3 {
311 regulator-name = "vdd_int";
312 regulator-min-microvolt = <800000>;
313 regulator-max-microvolt = <1400000>;
314 regulator-always-on;
315 regulator-boot-on;
316 };
317
318 buck4_reg: BUCK4 {
319 regulator-name = "vdd_g3d";
320 regulator-min-microvolt = <800000>;
321 regulator-max-microvolt = <1400000>;
322 regulator-always-on;
323 regulator-boot-on;
324 };
325
326 buck5_reg: BUCK5 {
327 regulator-name = "vdd_mem";
328 regulator-min-microvolt = <800000>;
329 regulator-max-microvolt = <1400000>;
330 regulator-always-on;
331 regulator-boot-on;
332 };
333
334 buck6_reg: BUCK6 {
335 regulator-name = "vdd_kfc";
336 regulator-min-microvolt = <800000>;
337 regulator-max-microvolt = <1500000>;
338 regulator-always-on;
339 regulator-boot-on;
340 };
341
342 buck7_reg: BUCK7 {
343 regulator-name = "vdd_1.0v_ldo";
344 regulator-min-microvolt = <800000>;
345 regulator-max-microvolt = <1500000>;
346 regulator-always-on;
347 regulator-boot-on;
348 };
349
350 buck8_reg: BUCK8 {
351 regulator-name = "vdd_1.8v_ldo";
352 regulator-min-microvolt = <800000>;
353 regulator-max-microvolt = <1500000>;
354 regulator-always-on;
355 regulator-boot-on;
356 };
357
358 buck9_reg: BUCK9 {
359 regulator-name = "vdd_2.8v_ldo";
360 regulator-min-microvolt = <3000000>;
361 regulator-max-microvolt = <3750000>;
362 regulator-always-on;
363 regulator-boot-on;
364 };
365
366 buck10_reg: BUCK10 {
367 regulator-name = "vdd_vmem";
368 regulator-min-microvolt = <2850000>;
369 regulator-max-microvolt = <2850000>;
370 regulator-always-on;
371 regulator-boot-on;
372 };
373 };
374 };
375 };
123}; 376};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 8db792b26f79..e3329afbd8c4 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -13,6 +13,7 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15 15
16#include <dt-bindings/clock/exynos5420.h>
16#include "exynos5.dtsi" 17#include "exynos5.dtsi"
17#include "exynos5420-pinctrl.dtsi" 18#include "exynos5420-pinctrl.dtsi"
18 19
@@ -119,7 +120,8 @@
119 compatible = "samsung,exynos5420-audss-clock"; 120 compatible = "samsung,exynos5420-audss-clock";
120 reg = <0x03810000 0x0C>; 121 reg = <0x03810000 0x0C>;
121 #clock-cells = <1>; 122 #clock-cells = <1>;
122 clocks = <&clock 1>, <&clock 5>, <&clock 148>, <&clock 149>; 123 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
124 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
123 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 125 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
124 }; 126 };
125 127
@@ -127,7 +129,7 @@
127 compatible = "samsung,mfc-v7"; 129 compatible = "samsung,mfc-v7";
128 reg = <0x11000000 0x10000>; 130 reg = <0x11000000 0x10000>;
129 interrupts = <0 96 0>; 131 interrupts = <0 96 0>;
130 clocks = <&clock 401>; 132 clocks = <&clock CLK_MFC>;
131 clock-names = "mfc"; 133 clock-names = "mfc";
132 }; 134 };
133 135
@@ -137,7 +139,7 @@
137 #address-cells = <1>; 139 #address-cells = <1>;
138 #size-cells = <0>; 140 #size-cells = <0>;
139 reg = <0x12200000 0x2000>; 141 reg = <0x12200000 0x2000>;
140 clocks = <&clock 351>, <&clock 132>; 142 clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>;
141 clock-names = "biu", "ciu"; 143 clock-names = "biu", "ciu";
142 fifo-depth = <0x40>; 144 fifo-depth = <0x40>;
143 status = "disabled"; 145 status = "disabled";
@@ -149,7 +151,7 @@
149 #address-cells = <1>; 151 #address-cells = <1>;
150 #size-cells = <0>; 152 #size-cells = <0>;
151 reg = <0x12210000 0x2000>; 153 reg = <0x12210000 0x2000>;
152 clocks = <&clock 352>, <&clock 133>; 154 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
153 clock-names = "biu", "ciu"; 155 clock-names = "biu", "ciu";
154 fifo-depth = <0x40>; 156 fifo-depth = <0x40>;
155 status = "disabled"; 157 status = "disabled";
@@ -161,7 +163,7 @@
161 #address-cells = <1>; 163 #address-cells = <1>;
162 #size-cells = <0>; 164 #size-cells = <0>;
163 reg = <0x12220000 0x1000>; 165 reg = <0x12220000 0x1000>;
164 clocks = <&clock 353>, <&clock 134>; 166 clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>;
165 clock-names = "biu", "ciu"; 167 clock-names = "biu", "ciu";
166 fifo-depth = <0x40>; 168 fifo-depth = <0x40>;
167 status = "disabled"; 169 status = "disabled";
@@ -175,7 +177,7 @@
175 interrupt-parent = <&mct_map>; 177 interrupt-parent = <&mct_map>;
176 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, 178 interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
177 <8>, <9>, <10>, <11>; 179 <8>, <9>, <10>, <11>;
178 clocks = <&clock 1>, <&clock 315>; 180 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
179 clock-names = "fin_pll", "mct"; 181 clock-names = "fin_pll", "mct";
180 182
181 mct_map: mct-map { 183 mct_map: mct-map {
@@ -269,9 +271,9 @@
269 }; 271 };
270 272
271 rtc@101E0000 { 273 rtc@101E0000 {
272 clocks = <&clock 317>; 274 clocks = <&clock CLK_RTC>;
273 clock-names = "rtc"; 275 clock-names = "rtc";
274 status = "okay"; 276 status = "disabled";
275 }; 277 };
276 278
277 amba { 279 amba {
@@ -281,11 +283,22 @@
281 interrupt-parent = <&gic>; 283 interrupt-parent = <&gic>;
282 ranges; 284 ranges;
283 285
286 adma: adma@03880000 {
287 compatible = "arm,pl330", "arm,primecell";
288 reg = <0x03880000 0x1000>;
289 interrupts = <0 110 0>;
290 clocks = <&clock_audss EXYNOS_ADMA>;
291 clock-names = "apb_pclk";
292 #dma-cells = <1>;
293 #dma-channels = <6>;
294 #dma-requests = <16>;
295 };
296
284 pdma0: pdma@121A0000 { 297 pdma0: pdma@121A0000 {
285 compatible = "arm,pl330", "arm,primecell"; 298 compatible = "arm,pl330", "arm,primecell";
286 reg = <0x121A0000 0x1000>; 299 reg = <0x121A0000 0x1000>;
287 interrupts = <0 34 0>; 300 interrupts = <0 34 0>;
288 clocks = <&clock 362>; 301 clocks = <&clock CLK_PDMA0>;
289 clock-names = "apb_pclk"; 302 clock-names = "apb_pclk";
290 #dma-cells = <1>; 303 #dma-cells = <1>;
291 #dma-channels = <8>; 304 #dma-channels = <8>;
@@ -296,7 +309,7 @@
296 compatible = "arm,pl330", "arm,primecell"; 309 compatible = "arm,pl330", "arm,primecell";
297 reg = <0x121B0000 0x1000>; 310 reg = <0x121B0000 0x1000>;
298 interrupts = <0 35 0>; 311 interrupts = <0 35 0>;
299 clocks = <&clock 363>; 312 clocks = <&clock CLK_PDMA1>;
300 clock-names = "apb_pclk"; 313 clock-names = "apb_pclk";
301 #dma-cells = <1>; 314 #dma-cells = <1>;
302 #dma-channels = <8>; 315 #dma-channels = <8>;
@@ -307,7 +320,7 @@
307 compatible = "arm,pl330", "arm,primecell"; 320 compatible = "arm,pl330", "arm,primecell";
308 reg = <0x10800000 0x1000>; 321 reg = <0x10800000 0x1000>;
309 interrupts = <0 33 0>; 322 interrupts = <0 33 0>;
310 clocks = <&clock 473>; 323 clocks = <&clock CLK_MDMA0>;
311 clock-names = "apb_pclk"; 324 clock-names = "apb_pclk";
312 #dma-cells = <1>; 325 #dma-cells = <1>;
313 #dma-channels = <8>; 326 #dma-channels = <8>;
@@ -318,7 +331,7 @@
318 compatible = "arm,pl330", "arm,primecell"; 331 compatible = "arm,pl330", "arm,primecell";
319 reg = <0x11C10000 0x1000>; 332 reg = <0x11C10000 0x1000>;
320 interrupts = <0 124 0>; 333 interrupts = <0 124 0>;
321 clocks = <&clock 442>; 334 clocks = <&clock CLK_MDMA1>;
322 clock-names = "apb_pclk"; 335 clock-names = "apb_pclk";
323 #dma-cells = <1>; 336 #dma-cells = <1>;
324 #dma-channels = <8>; 337 #dma-channels = <8>;
@@ -326,6 +339,49 @@
326 }; 339 };
327 }; 340 };
328 341
342 i2s0: i2s@03830000 {
343 compatible = "samsung,exynos5420-i2s";
344 reg = <0x03830000 0x100>;
345 dmas = <&adma 0
346 &adma 2
347 &adma 1>;
348 dma-names = "tx", "rx", "tx-sec";
349 clocks = <&clock_audss EXYNOS_I2S_BUS>,
350 <&clock_audss EXYNOS_I2S_BUS>,
351 <&clock_audss EXYNOS_SCLK_I2S>;
352 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
353 samsung,idma-addr = <0x03000000>;
354 pinctrl-names = "default";
355 pinctrl-0 = <&i2s0_bus>;
356 status = "disabled";
357 };
358
359 i2s1: i2s@12D60000 {
360 compatible = "samsung,exynos5420-i2s";
361 reg = <0x12D60000 0x100>;
362 dmas = <&pdma1 12
363 &pdma1 11>;
364 dma-names = "tx", "rx";
365 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
366 clock-names = "iis", "i2s_opclk0";
367 pinctrl-names = "default";
368 pinctrl-0 = <&i2s1_bus>;
369 status = "disabled";
370 };
371
372 i2s2: i2s@12D70000 {
373 compatible = "samsung,exynos5420-i2s";
374 reg = <0x12D70000 0x100>;
375 dmas = <&pdma0 12
376 &pdma0 11>;
377 dma-names = "tx", "rx";
378 clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>;
379 clock-names = "iis", "i2s_opclk0";
380 pinctrl-names = "default";
381 pinctrl-0 = <&i2s2_bus>;
382 status = "disabled";
383 };
384
329 spi_0: spi@12d20000 { 385 spi_0: spi@12d20000 {
330 compatible = "samsung,exynos4210-spi"; 386 compatible = "samsung,exynos4210-spi";
331 reg = <0x12d20000 0x100>; 387 reg = <0x12d20000 0x100>;
@@ -337,7 +393,7 @@
337 #size-cells = <0>; 393 #size-cells = <0>;
338 pinctrl-names = "default"; 394 pinctrl-names = "default";
339 pinctrl-0 = <&spi0_bus>; 395 pinctrl-0 = <&spi0_bus>;
340 clocks = <&clock 271>, <&clock 135>; 396 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
341 clock-names = "spi", "spi_busclk0"; 397 clock-names = "spi", "spi_busclk0";
342 status = "disabled"; 398 status = "disabled";
343 }; 399 };
@@ -353,7 +409,7 @@
353 #size-cells = <0>; 409 #size-cells = <0>;
354 pinctrl-names = "default"; 410 pinctrl-names = "default";
355 pinctrl-0 = <&spi1_bus>; 411 pinctrl-0 = <&spi1_bus>;
356 clocks = <&clock 272>, <&clock 136>; 412 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
357 clock-names = "spi", "spi_busclk0"; 413 clock-names = "spi", "spi_busclk0";
358 status = "disabled"; 414 status = "disabled";
359 }; 415 };
@@ -369,28 +425,28 @@
369 #size-cells = <0>; 425 #size-cells = <0>;
370 pinctrl-names = "default"; 426 pinctrl-names = "default";
371 pinctrl-0 = <&spi2_bus>; 427 pinctrl-0 = <&spi2_bus>;
372 clocks = <&clock 273>, <&clock 137>; 428 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
373 clock-names = "spi", "spi_busclk0"; 429 clock-names = "spi", "spi_busclk0";
374 status = "disabled"; 430 status = "disabled";
375 }; 431 };
376 432
377 serial@12C00000 { 433 serial@12C00000 {
378 clocks = <&clock 257>, <&clock 128>; 434 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
379 clock-names = "uart", "clk_uart_baud0"; 435 clock-names = "uart", "clk_uart_baud0";
380 }; 436 };
381 437
382 serial@12C10000 { 438 serial@12C10000 {
383 clocks = <&clock 258>, <&clock 129>; 439 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
384 clock-names = "uart", "clk_uart_baud0"; 440 clock-names = "uart", "clk_uart_baud0";
385 }; 441 };
386 442
387 serial@12C20000 { 443 serial@12C20000 {
388 clocks = <&clock 259>, <&clock 130>; 444 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
389 clock-names = "uart", "clk_uart_baud0"; 445 clock-names = "uart", "clk_uart_baud0";
390 }; 446 };
391 447
392 serial@12C30000 { 448 serial@12C30000 {
393 clocks = <&clock 260>, <&clock 131>; 449 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
394 clock-names = "uart", "clk_uart_baud0"; 450 clock-names = "uart", "clk_uart_baud0";
395 }; 451 };
396 452
@@ -399,7 +455,7 @@
399 reg = <0x12dd0000 0x100>; 455 reg = <0x12dd0000 0x100>;
400 samsung,pwm-outputs = <0>, <1>, <2>, <3>; 456 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
401 #pwm-cells = <3>; 457 #pwm-cells = <3>;
402 clocks = <&clock 279>; 458 clocks = <&clock CLK_PWM>;
403 clock-names = "timers"; 459 clock-names = "timers";
404 }; 460 };
405 461
@@ -410,7 +466,7 @@
410 }; 466 };
411 467
412 dp-controller@145B0000 { 468 dp-controller@145B0000 {
413 clocks = <&clock 412>; 469 clocks = <&clock CLK_DP1>;
414 clock-names = "dp"; 470 clock-names = "dp";
415 phys = <&dp_phy>; 471 phys = <&dp_phy>;
416 phy-names = "dp"; 472 phy-names = "dp";
@@ -418,7 +474,7 @@
418 474
419 fimd@14400000 { 475 fimd@14400000 {
420 samsung,power-domain = <&disp_pd>; 476 samsung,power-domain = <&disp_pd>;
421 clocks = <&clock 147>, <&clock 421>; 477 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
422 clock-names = "sclk_fimd", "fimd"; 478 clock-names = "sclk_fimd", "fimd";
423 }; 479 };
424 480
@@ -426,7 +482,7 @@
426 compatible = "samsung,exynos-adc-v2"; 482 compatible = "samsung,exynos-adc-v2";
427 reg = <0x12D10000 0x100>, <0x10040720 0x4>; 483 reg = <0x12D10000 0x100>, <0x10040720 0x4>;
428 interrupts = <0 106 0>; 484 interrupts = <0 106 0>;
429 clocks = <&clock 270>; 485 clocks = <&clock CLK_TSADC>;
430 clock-names = "adc"; 486 clock-names = "adc";
431 #io-channel-cells = <1>; 487 #io-channel-cells = <1>;
432 io-channel-ranges; 488 io-channel-ranges;
@@ -439,7 +495,7 @@
439 interrupts = <0 56 0>; 495 interrupts = <0 56 0>;
440 #address-cells = <1>; 496 #address-cells = <1>;
441 #size-cells = <0>; 497 #size-cells = <0>;
442 clocks = <&clock 261>; 498 clocks = <&clock CLK_I2C0>;
443 clock-names = "i2c"; 499 clock-names = "i2c";
444 pinctrl-names = "default"; 500 pinctrl-names = "default";
445 pinctrl-0 = <&i2c0_bus>; 501 pinctrl-0 = <&i2c0_bus>;
@@ -452,7 +508,7 @@
452 interrupts = <0 57 0>; 508 interrupts = <0 57 0>;
453 #address-cells = <1>; 509 #address-cells = <1>;
454 #size-cells = <0>; 510 #size-cells = <0>;
455 clocks = <&clock 262>; 511 clocks = <&clock CLK_I2C1>;
456 clock-names = "i2c"; 512 clock-names = "i2c";
457 pinctrl-names = "default"; 513 pinctrl-names = "default";
458 pinctrl-0 = <&i2c1_bus>; 514 pinctrl-0 = <&i2c1_bus>;
@@ -465,7 +521,7 @@
465 interrupts = <0 58 0>; 521 interrupts = <0 58 0>;
466 #address-cells = <1>; 522 #address-cells = <1>;
467 #size-cells = <0>; 523 #size-cells = <0>;
468 clocks = <&clock 263>; 524 clocks = <&clock CLK_I2C2>;
469 clock-names = "i2c"; 525 clock-names = "i2c";
470 pinctrl-names = "default"; 526 pinctrl-names = "default";
471 pinctrl-0 = <&i2c2_bus>; 527 pinctrl-0 = <&i2c2_bus>;
@@ -478,7 +534,7 @@
478 interrupts = <0 59 0>; 534 interrupts = <0 59 0>;
479 #address-cells = <1>; 535 #address-cells = <1>;
480 #size-cells = <0>; 536 #size-cells = <0>;
481 clocks = <&clock 264>; 537 clocks = <&clock CLK_I2C3>;
482 clock-names = "i2c"; 538 clock-names = "i2c";
483 pinctrl-names = "default"; 539 pinctrl-names = "default";
484 pinctrl-0 = <&i2c3_bus>; 540 pinctrl-0 = <&i2c3_bus>;
@@ -493,7 +549,7 @@
493 #size-cells = <0>; 549 #size-cells = <0>;
494 pinctrl-names = "default"; 550 pinctrl-names = "default";
495 pinctrl-0 = <&i2c4_hs_bus>; 551 pinctrl-0 = <&i2c4_hs_bus>;
496 clocks = <&clock 265>; 552 clocks = <&clock CLK_I2C4>;
497 clock-names = "hsi2c"; 553 clock-names = "hsi2c";
498 status = "disabled"; 554 status = "disabled";
499 }; 555 };
@@ -506,7 +562,7 @@
506 #size-cells = <0>; 562 #size-cells = <0>;
507 pinctrl-names = "default"; 563 pinctrl-names = "default";
508 pinctrl-0 = <&i2c5_hs_bus>; 564 pinctrl-0 = <&i2c5_hs_bus>;
509 clocks = <&clock 266>; 565 clocks = <&clock CLK_I2C5>;
510 clock-names = "hsi2c"; 566 clock-names = "hsi2c";
511 status = "disabled"; 567 status = "disabled";
512 }; 568 };
@@ -519,7 +575,7 @@
519 #size-cells = <0>; 575 #size-cells = <0>;
520 pinctrl-names = "default"; 576 pinctrl-names = "default";
521 pinctrl-0 = <&i2c6_hs_bus>; 577 pinctrl-0 = <&i2c6_hs_bus>;
522 clocks = <&clock 267>; 578 clocks = <&clock CLK_I2C6>;
523 clock-names = "hsi2c"; 579 clock-names = "hsi2c";
524 status = "disabled"; 580 status = "disabled";
525 }; 581 };
@@ -532,7 +588,7 @@
532 #size-cells = <0>; 588 #size-cells = <0>;
533 pinctrl-names = "default"; 589 pinctrl-names = "default";
534 pinctrl-0 = <&i2c7_hs_bus>; 590 pinctrl-0 = <&i2c7_hs_bus>;
535 clocks = <&clock 268>; 591 clocks = <&clock CLK_I2C7>;
536 clock-names = "hsi2c"; 592 clock-names = "hsi2c";
537 status = "disabled"; 593 status = "disabled";
538 }; 594 };
@@ -545,7 +601,7 @@
545 #size-cells = <0>; 601 #size-cells = <0>;
546 pinctrl-names = "default"; 602 pinctrl-names = "default";
547 pinctrl-0 = <&i2c8_hs_bus>; 603 pinctrl-0 = <&i2c8_hs_bus>;
548 clocks = <&clock 281>; 604 clocks = <&clock CLK_I2C8>;
549 clock-names = "hsi2c"; 605 clock-names = "hsi2c";
550 status = "disabled"; 606 status = "disabled";
551 }; 607 };
@@ -558,7 +614,7 @@
558 #size-cells = <0>; 614 #size-cells = <0>;
559 pinctrl-names = "default"; 615 pinctrl-names = "default";
560 pinctrl-0 = <&i2c9_hs_bus>; 616 pinctrl-0 = <&i2c9_hs_bus>;
561 clocks = <&clock 282>; 617 clocks = <&clock CLK_I2C9>;
562 clock-names = "hsi2c"; 618 clock-names = "hsi2c";
563 status = "disabled"; 619 status = "disabled";
564 }; 620 };
@@ -571,7 +627,7 @@
571 #size-cells = <0>; 627 #size-cells = <0>;
572 pinctrl-names = "default"; 628 pinctrl-names = "default";
573 pinctrl-0 = <&i2c10_hs_bus>; 629 pinctrl-0 = <&i2c10_hs_bus>;
574 clocks = <&clock 283>; 630 clocks = <&clock CLK_I2C10>;
575 clock-names = "hsi2c"; 631 clock-names = "hsi2c";
576 status = "disabled"; 632 status = "disabled";
577 }; 633 };
@@ -580,8 +636,9 @@
580 compatible = "samsung,exynos4212-hdmi"; 636 compatible = "samsung,exynos4212-hdmi";
581 reg = <0x14530000 0x70000>; 637 reg = <0x14530000 0x70000>;
582 interrupts = <0 95 0>; 638 interrupts = <0 95 0>;
583 clocks = <&clock 413>, <&clock 143>, <&clock 768>, 639 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
584 <&clock 158>, <&clock 640>; 640 <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
641 <&clock CLK_MOUT_HDMI>;
585 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", 642 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
586 "sclk_hdmiphy", "mout_hdmi"; 643 "sclk_hdmiphy", "mout_hdmi";
587 status = "disabled"; 644 status = "disabled";
@@ -591,7 +648,7 @@
591 compatible = "samsung,exynos5420-mixer"; 648 compatible = "samsung,exynos5420-mixer";
592 reg = <0x14450000 0x10000>; 649 reg = <0x14450000 0x10000>;
593 interrupts = <0 94 0>; 650 interrupts = <0 94 0>;
594 clocks = <&clock 431>, <&clock 143>; 651 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
595 clock-names = "mixer", "sclk_hdmi"; 652 clock-names = "mixer", "sclk_hdmi";
596 }; 653 };
597 654
@@ -599,7 +656,7 @@
599 compatible = "samsung,exynos5-gsc"; 656 compatible = "samsung,exynos5-gsc";
600 reg = <0x13e00000 0x1000>; 657 reg = <0x13e00000 0x1000>;
601 interrupts = <0 85 0>; 658 interrupts = <0 85 0>;
602 clocks = <&clock 465>; 659 clocks = <&clock CLK_GSCL0>;
603 clock-names = "gscl"; 660 clock-names = "gscl";
604 samsung,power-domain = <&gsc_pd>; 661 samsung,power-domain = <&gsc_pd>;
605 }; 662 };
@@ -608,16 +665,21 @@
608 compatible = "samsung,exynos5-gsc"; 665 compatible = "samsung,exynos5-gsc";
609 reg = <0x13e10000 0x1000>; 666 reg = <0x13e10000 0x1000>;
610 interrupts = <0 86 0>; 667 interrupts = <0 86 0>;
611 clocks = <&clock 466>; 668 clocks = <&clock CLK_GSCL1>;
612 clock-names = "gscl"; 669 clock-names = "gscl";
613 samsung,power-domain = <&gsc_pd>; 670 samsung,power-domain = <&gsc_pd>;
614 }; 671 };
615 672
673 pmu_system_controller: system-controller@10040000 {
674 compatible = "samsung,exynos5420-pmu", "syscon";
675 reg = <0x10040000 0x5000>;
676 };
677
616 tmu_cpu0: tmu@10060000 { 678 tmu_cpu0: tmu@10060000 {
617 compatible = "samsung,exynos5420-tmu"; 679 compatible = "samsung,exynos5420-tmu";
618 reg = <0x10060000 0x100>; 680 reg = <0x10060000 0x100>;
619 interrupts = <0 65 0>; 681 interrupts = <0 65 0>;
620 clocks = <&clock 318>; 682 clocks = <&clock CLK_TMU>;
621 clock-names = "tmu_apbif"; 683 clock-names = "tmu_apbif";
622 }; 684 };
623 685
@@ -625,7 +687,7 @@
625 compatible = "samsung,exynos5420-tmu"; 687 compatible = "samsung,exynos5420-tmu";
626 reg = <0x10064000 0x100>; 688 reg = <0x10064000 0x100>;
627 interrupts = <0 183 0>; 689 interrupts = <0 183 0>;
628 clocks = <&clock 318>; 690 clocks = <&clock CLK_TMU>;
629 clock-names = "tmu_apbif"; 691 clock-names = "tmu_apbif";
630 }; 692 };
631 693
@@ -633,7 +695,7 @@
633 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 695 compatible = "samsung,exynos5420-tmu-ext-triminfo";
634 reg = <0x10068000 0x100>, <0x1006c000 0x4>; 696 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
635 interrupts = <0 184 0>; 697 interrupts = <0 184 0>;
636 clocks = <&clock 318>, <&clock 318>; 698 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
637 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 699 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
638 }; 700 };
639 701
@@ -641,7 +703,7 @@
641 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 703 compatible = "samsung,exynos5420-tmu-ext-triminfo";
642 reg = <0x1006c000 0x100>, <0x100a0000 0x4>; 704 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
643 interrupts = <0 185 0>; 705 interrupts = <0 185 0>;
644 clocks = <&clock 318>, <&clock 319>; 706 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
645 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 707 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
646 }; 708 };
647 709
@@ -649,7 +711,16 @@
649 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 711 compatible = "samsung,exynos5420-tmu-ext-triminfo";
650 reg = <0x100a0000 0x100>, <0x10068000 0x4>; 712 reg = <0x100a0000 0x100>, <0x10068000 0x4>;
651 interrupts = <0 215 0>; 713 interrupts = <0 215 0>;
652 clocks = <&clock 319>, <&clock 318>; 714 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
653 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 715 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
654 }; 716 };
717
718 watchdog@101D0000 {
719 compatible = "samsung,exynos5420-wdt";
720 reg = <0x101D0000 0x100>;
721 interrupts = <0 42 0>;
722 clocks = <&clock CLK_WDT>;
723 clock-names = "watchdog";
724 samsung,syscon-phandle = <&pmu_system_controller>;
725 };
655}; 726};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 02a0a1226cef..75c7b89cec2f 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -9,6 +9,7 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10*/ 10*/
11 11
12#include <dt-bindings/clock/exynos5440.h>
12#include "skeleton.dtsi" 13#include "skeleton.dtsi"
13 14
14/ { 15/ {
@@ -105,7 +106,7 @@
105 compatible = "samsung,exynos4210-uart"; 106 compatible = "samsung,exynos4210-uart";
106 reg = <0xB0000 0x1000>; 107 reg = <0xB0000 0x1000>;
107 interrupts = <0 2 0>; 108 interrupts = <0 2 0>;
108 clocks = <&clock 21>, <&clock 21>; 109 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
109 clock-names = "uart", "clk_uart_baud0"; 110 clock-names = "uart", "clk_uart_baud0";
110 }; 111 };
111 112
@@ -113,7 +114,7 @@
113 compatible = "samsung,exynos4210-uart"; 114 compatible = "samsung,exynos4210-uart";
114 reg = <0xC0000 0x1000>; 115 reg = <0xC0000 0x1000>;
115 interrupts = <0 3 0>; 116 interrupts = <0 3 0>;
116 clocks = <&clock 21>, <&clock 21>; 117 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
117 clock-names = "uart", "clk_uart_baud0"; 118 clock-names = "uart", "clk_uart_baud0";
118 }; 119 };
119 120
@@ -125,7 +126,7 @@
125 #size-cells = <0>; 126 #size-cells = <0>;
126 samsung,spi-src-clk = <0>; 127 samsung,spi-src-clk = <0>;
127 num-cs = <1>; 128 num-cs = <1>;
128 clocks = <&clock 21>, <&clock 16>; 129 clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>;
129 clock-names = "spi", "spi_busclk0"; 130 clock-names = "spi", "spi_busclk0";
130 }; 131 };
131 132
@@ -161,7 +162,7 @@
161 interrupts = <0 5 0>; 162 interrupts = <0 5 0>;
162 #address-cells = <1>; 163 #address-cells = <1>;
163 #size-cells = <0>; 164 #size-cells = <0>;
164 clocks = <&clock 21>; 165 clocks = <&clock CLK_B_125>;
165 clock-names = "i2c"; 166 clock-names = "i2c";
166 }; 167 };
167 168
@@ -171,7 +172,7 @@
171 interrupts = <0 6 0>; 172 interrupts = <0 6 0>;
172 #address-cells = <1>; 173 #address-cells = <1>;
173 #size-cells = <0>; 174 #size-cells = <0>;
174 clocks = <&clock 21>; 175 clocks = <&clock CLK_B_125>;
175 clock-names = "i2c"; 176 clock-names = "i2c";
176 }; 177 };
177 178
@@ -179,7 +180,7 @@
179 compatible = "samsung,s3c2410-wdt"; 180 compatible = "samsung,s3c2410-wdt";
180 reg = <0x110000 0x1000>; 181 reg = <0x110000 0x1000>;
181 interrupts = <0 1 0>; 182 interrupts = <0 1 0>;
182 clocks = <&clock 21>; 183 clocks = <&clock CLK_B_125>;
183 clock-names = "watchdog"; 184 clock-names = "watchdog";
184 }; 185 };
185 186
@@ -190,7 +191,7 @@
190 interrupts = <0 31 4>; 191 interrupts = <0 31 4>;
191 interrupt-names = "macirq"; 192 interrupt-names = "macirq";
192 phy-mode = "sgmii"; 193 phy-mode = "sgmii";
193 clocks = <&clock 25>; 194 clocks = <&clock CLK_GMAC0>;
194 clock-names = "stmmaceth"; 195 clock-names = "stmmaceth";
195 }; 196 };
196 197
@@ -206,7 +207,7 @@
206 compatible = "samsung,s3c6410-rtc"; 207 compatible = "samsung,s3c6410-rtc";
207 reg = <0x130000 0x1000>; 208 reg = <0x130000 0x1000>;
208 interrupts = <0 17 0>, <0 16 0>; 209 interrupts = <0 17 0>, <0 16 0>;
209 clocks = <&clock 21>; 210 clocks = <&clock CLK_B_125>;
210 clock-names = "rtc"; 211 clock-names = "rtc";
211 }; 212 };
212 213
@@ -214,7 +215,7 @@
214 compatible = "samsung,exynos5440-tmu"; 215 compatible = "samsung,exynos5440-tmu";
215 reg = <0x160118 0x230>, <0x160368 0x10>; 216 reg = <0x160118 0x230>, <0x160368 0x10>;
216 interrupts = <0 58 0>; 217 interrupts = <0 58 0>;
217 clocks = <&clock 21>; 218 clocks = <&clock CLK_B_125>;
218 clock-names = "tmu_apbif"; 219 clock-names = "tmu_apbif";
219 }; 220 };
220 221
@@ -222,7 +223,7 @@
222 compatible = "samsung,exynos5440-tmu"; 223 compatible = "samsung,exynos5440-tmu";
223 reg = <0x16011C 0x230>, <0x160368 0x10>; 224 reg = <0x16011C 0x230>, <0x160368 0x10>;
224 interrupts = <0 58 0>; 225 interrupts = <0 58 0>;
225 clocks = <&clock 21>; 226 clocks = <&clock CLK_B_125>;
226 clock-names = "tmu_apbif"; 227 clock-names = "tmu_apbif";
227 }; 228 };
228 229
@@ -230,7 +231,7 @@
230 compatible = "samsung,exynos5440-tmu"; 231 compatible = "samsung,exynos5440-tmu";
231 reg = <0x160120 0x230>, <0x160368 0x10>; 232 reg = <0x160120 0x230>, <0x160368 0x10>;
232 interrupts = <0 58 0>; 233 interrupts = <0 58 0>;
233 clocks = <&clock 21>; 234 clocks = <&clock CLK_B_125>;
234 clock-names = "tmu_apbif"; 235 clock-names = "tmu_apbif";
235 }; 236 };
236 237
@@ -238,7 +239,7 @@
238 compatible = "snps,exynos5440-ahci"; 239 compatible = "snps,exynos5440-ahci";
239 reg = <0x210000 0x10000>; 240 reg = <0x210000 0x10000>;
240 interrupts = <0 30 0>; 241 interrupts = <0 30 0>;
241 clocks = <&clock 23>; 242 clocks = <&clock CLK_SATA>;
242 clock-names = "sata"; 243 clock-names = "sata";
243 }; 244 };
244 245
@@ -246,7 +247,7 @@
246 compatible = "samsung,exynos5440-ohci"; 247 compatible = "samsung,exynos5440-ohci";
247 reg = <0x220000 0x1000>; 248 reg = <0x220000 0x1000>;
248 interrupts = <0 29 0>; 249 interrupts = <0 29 0>;
249 clocks = <&clock 24>; 250 clocks = <&clock CLK_USB>;
250 clock-names = "usbhost"; 251 clock-names = "usbhost";
251 }; 252 };
252 253
@@ -254,7 +255,7 @@
254 compatible = "samsung,exynos5440-ehci"; 255 compatible = "samsung,exynos5440-ehci";
255 reg = <0x221000 0x1000>; 256 reg = <0x221000 0x1000>;
256 interrupts = <0 29 0>; 257 interrupts = <0 29 0>;
257 clocks = <&clock 24>; 258 clocks = <&clock CLK_USB>;
258 clock-names = "usbhost"; 259 clock-names = "usbhost";
259 }; 260 };
260 261
@@ -264,7 +265,7 @@
264 0x270000 0x1000 265 0x270000 0x1000
265 0x271000 0x40>; 266 0x271000 0x40>;
266 interrupts = <0 20 0>, <0 21 0>, <0 22 0>; 267 interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
267 clocks = <&clock 28>, <&clock 27>; 268 clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
268 clock-names = "pcie", "pcie_bus"; 269 clock-names = "pcie", "pcie_bus";
269 #address-cells = <3>; 270 #address-cells = <3>;
270 #size-cells = <2>; 271 #size-cells = <2>;
@@ -285,7 +286,7 @@
285 0x272000 0x1000 286 0x272000 0x1000
286 0x271040 0x40>; 287 0x271040 0x40>;
287 interrupts = <0 23 0>, <0 24 0>, <0 25 0>; 288 interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
288 clocks = <&clock 29>, <&clock 27>; 289 clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
289 clock-names = "pcie", "pcie_bus"; 290 clock-names = "pcie", "pcie_bus";
290 #address-cells = <3>; 291 #address-cells = <3>;
291 #size-cells = <2>; 292 #size-cells = <2>;
diff --git a/arch/arm/include/debug/samsung.S b/arch/arm/include/debug/samsung.S
index f3a9cff6d5d4..8d8d922e5e44 100644
--- a/arch/arm/include/debug/samsung.S
+++ b/arch/arm/include/debug/samsung.S
@@ -9,7 +9,7 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10*/ 10*/
11 11
12#include <plat/regs-serial.h> 12#include <linux/serial_s3c.h>
13 13
14/* The S5PV210/S5PC110 implementations are as belows. */ 14/* The S5PV210/S5PC110 implementations are as belows. */
15 15
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index f18be40e5b21..025fd8215ca3 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -20,6 +20,7 @@
20#include <clocksource/samsung_pwm.h> 20#include <clocksource/samsung_pwm.h>
21#include <linux/sched.h> 21#include <linux/sched.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/serial_s3c.h>
23#include <linux/of.h> 24#include <linux/of.h>
24#include <linux/of_fdt.h> 25#include <linux/of_fdt.h>
25#include <linux/of_irq.h> 26#include <linux/of_irq.h>
@@ -40,7 +41,6 @@
40 41
41#include <plat/cpu.h> 42#include <plat/cpu.h>
42#include <plat/pm.h> 43#include <plat/pm.h>
43#include <plat/regs-serial.h>
44 44
45#include "common.h" 45#include "common.h"
46#include "regs-pmu.h" 46#include "regs-pmu.h"
diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
deleted file mode 100644
index 5d7ce36be46f..000000000000
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - uncompress code
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifndef __ASM_ARCH_UNCOMPRESS_H
13#define __ASM_ARCH_UNCOMPRESS_H __FILE__
14
15#include <asm/mach-types.h>
16
17#include <mach/map.h>
18#include <plat/uncompress.h>
19
20static unsigned int __raw_readl(unsigned int ptr)
21{
22 return *((volatile unsigned int *)ptr);
23}
24
25static void arch_detect_cpu(void)
26{
27 u32 chip_id = __raw_readl(EXYNOS_PA_CHIPID);
28
29 /*
30 * product_id is bits 31:12
31 * bits 23:20 describe the exynosX family
32 * bits 27:24 describe the exynosX family in exynos5420
33 */
34 chip_id >>= 20;
35
36 if ((chip_id & 0x0f) == 0x5 || (chip_id & 0xf0) == 0x50)
37 uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
38 else
39 uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
40
41 /*
42 * For preventing FIFO overrun or infinite loop of UART console,
43 * fifo_max should be the minimum fifo size of all of the UART channels
44 */
45 fifo_mask = S5PV210_UFSTAT_TXMASK;
46 fifo_max = 15 << S5PV210_UFSTAT_TXSHIFT;
47}
48#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index e00025bbbe89..ba18214c9aca 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -35,56 +35,6 @@
35#include "common.h" 35#include "common.h"
36#include "regs-pmu.h" 36#include "regs-pmu.h"
37 37
38#define EXYNOS4_EPLL_LOCK (S5P_VA_CMU + 0x0C010)
39#define EXYNOS4_VPLL_LOCK (S5P_VA_CMU + 0x0C020)
40
41#define EXYNOS4_EPLL_CON0 (S5P_VA_CMU + 0x0C110)
42#define EXYNOS4_EPLL_CON1 (S5P_VA_CMU + 0x0C114)
43#define EXYNOS4_VPLL_CON0 (S5P_VA_CMU + 0x0C120)
44#define EXYNOS4_VPLL_CON1 (S5P_VA_CMU + 0x0C124)
45
46#define EXYNOS4_CLKSRC_MASK_TOP (S5P_VA_CMU + 0x0C310)
47#define EXYNOS4_CLKSRC_MASK_CAM (S5P_VA_CMU + 0x0C320)
48#define EXYNOS4_CLKSRC_MASK_TV (S5P_VA_CMU + 0x0C324)
49#define EXYNOS4_CLKSRC_MASK_LCD0 (S5P_VA_CMU + 0x0C334)
50#define EXYNOS4_CLKSRC_MASK_MAUDIO (S5P_VA_CMU + 0x0C33C)
51#define EXYNOS4_CLKSRC_MASK_FSYS (S5P_VA_CMU + 0x0C340)
52#define EXYNOS4_CLKSRC_MASK_PERIL0 (S5P_VA_CMU + 0x0C350)
53#define EXYNOS4_CLKSRC_MASK_PERIL1 (S5P_VA_CMU + 0x0C354)
54
55#define EXYNOS4_CLKSRC_MASK_DMC (S5P_VA_CMU + 0x10300)
56
57#define EXYNOS4_EPLLCON0_LOCKED_SHIFT (29)
58#define EXYNOS4_VPLLCON0_LOCKED_SHIFT (29)
59
60#define EXYNOS4210_CLKSRC_MASK_LCD1 (S5P_VA_CMU + 0x0C338)
61
62static const struct sleep_save exynos4_set_clksrc[] = {
63 { .reg = EXYNOS4_CLKSRC_MASK_TOP , .val = 0x00000001, },
64 { .reg = EXYNOS4_CLKSRC_MASK_CAM , .val = 0x11111111, },
65 { .reg = EXYNOS4_CLKSRC_MASK_TV , .val = 0x00000111, },
66 { .reg = EXYNOS4_CLKSRC_MASK_LCD0 , .val = 0x00001111, },
67 { .reg = EXYNOS4_CLKSRC_MASK_MAUDIO , .val = 0x00000001, },
68 { .reg = EXYNOS4_CLKSRC_MASK_FSYS , .val = 0x01011111, },
69 { .reg = EXYNOS4_CLKSRC_MASK_PERIL0 , .val = 0x01111111, },
70 { .reg = EXYNOS4_CLKSRC_MASK_PERIL1 , .val = 0x01110111, },
71 { .reg = EXYNOS4_CLKSRC_MASK_DMC , .val = 0x00010000, },
72};
73
74static const struct sleep_save exynos4210_set_clksrc[] = {
75 { .reg = EXYNOS4210_CLKSRC_MASK_LCD1 , .val = 0x00001111, },
76};
77
78static struct sleep_save exynos4_epll_save[] = {
79 SAVE_ITEM(EXYNOS4_EPLL_CON0),
80 SAVE_ITEM(EXYNOS4_EPLL_CON1),
81};
82
83static struct sleep_save exynos4_vpll_save[] = {
84 SAVE_ITEM(EXYNOS4_VPLL_CON0),
85 SAVE_ITEM(EXYNOS4_VPLL_CON1),
86};
87
88static struct sleep_save exynos5_sys_save[] = { 38static struct sleep_save exynos5_sys_save[] = {
89 SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), 39 SAVE_ITEM(EXYNOS5_SYS_I2C_CFG),
90}; 40};
@@ -124,10 +74,7 @@ static void exynos_pm_prepare(void)
124 74
125 s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 75 s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
126 76
127 if (!soc_is_exynos5250()) { 77 if (soc_is_exynos5250()) {
128 s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save));
129 s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save));
130 } else {
131 s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save)); 78 s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
132 /* Disable USE_RETENTION of JPEG_MEM_OPTION */ 79 /* Disable USE_RETENTION of JPEG_MEM_OPTION */
133 tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION); 80 tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
@@ -143,15 +90,6 @@ static void exynos_pm_prepare(void)
143 /* ensure at least INFORM0 has the resume address */ 90 /* ensure at least INFORM0 has the resume address */
144 91
145 __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0); 92 __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
146
147 /* Before enter central sequence mode, clock src register have to set */
148
149 if (!soc_is_exynos5250())
150 s3c_pm_do_restore_core(exynos4_set_clksrc, ARRAY_SIZE(exynos4_set_clksrc));
151
152 if (soc_is_exynos4210())
153 s3c_pm_do_restore_core(exynos4210_set_clksrc, ARRAY_SIZE(exynos4210_set_clksrc));
154
155} 93}
156 94
157static int exynos_pm_add(struct device *dev, struct subsys_interface *sif) 95static int exynos_pm_add(struct device *dev, struct subsys_interface *sif)
@@ -162,73 +100,6 @@ static int exynos_pm_add(struct device *dev, struct subsys_interface *sif)
162 return 0; 100 return 0;
163} 101}
164 102
165static unsigned long pll_base_rate;
166
167static void exynos4_restore_pll(void)
168{
169 unsigned long pll_con, locktime, lockcnt;
170 unsigned long pll_in_rate;
171 unsigned int p_div, epll_wait = 0, vpll_wait = 0;
172
173 if (pll_base_rate == 0)
174 return;
175
176 pll_in_rate = pll_base_rate;
177
178 /* EPLL */
179 pll_con = exynos4_epll_save[0].val;
180
181 if (pll_con & (1 << 31)) {
182 pll_con &= (PLL46XX_PDIV_MASK << PLL46XX_PDIV_SHIFT);
183 p_div = (pll_con >> PLL46XX_PDIV_SHIFT);
184
185 pll_in_rate /= 1000000;
186
187 locktime = (3000 / pll_in_rate) * p_div;
188 lockcnt = locktime * 10000 / (10000 / pll_in_rate);
189
190 __raw_writel(lockcnt, EXYNOS4_EPLL_LOCK);
191
192 s3c_pm_do_restore_core(exynos4_epll_save,
193 ARRAY_SIZE(exynos4_epll_save));
194 epll_wait = 1;
195 }
196
197 pll_in_rate = pll_base_rate;
198
199 /* VPLL */
200 pll_con = exynos4_vpll_save[0].val;
201
202 if (pll_con & (1 << 31)) {
203 pll_in_rate /= 1000000;
204 /* 750us */
205 locktime = 750;
206 lockcnt = locktime * 10000 / (10000 / pll_in_rate);
207
208 __raw_writel(lockcnt, EXYNOS4_VPLL_LOCK);
209
210 s3c_pm_do_restore_core(exynos4_vpll_save,
211 ARRAY_SIZE(exynos4_vpll_save));
212 vpll_wait = 1;
213 }
214
215 /* Wait PLL locking */
216
217 do {
218 if (epll_wait) {
219 pll_con = __raw_readl(EXYNOS4_EPLL_CON0);
220 if (pll_con & (1 << EXYNOS4_EPLLCON0_LOCKED_SHIFT))
221 epll_wait = 0;
222 }
223
224 if (vpll_wait) {
225 pll_con = __raw_readl(EXYNOS4_VPLL_CON0);
226 if (pll_con & (1 << EXYNOS4_VPLLCON0_LOCKED_SHIFT))
227 vpll_wait = 0;
228 }
229 } while (epll_wait || vpll_wait);
230}
231
232static struct subsys_interface exynos_pm_interface = { 103static struct subsys_interface exynos_pm_interface = {
233 .name = "exynos_pm", 104 .name = "exynos_pm",
234 .subsys = &exynos_subsys, 105 .subsys = &exynos_subsys,
@@ -237,7 +108,6 @@ static struct subsys_interface exynos_pm_interface = {
237 108
238static __init int exynos_pm_drvinit(void) 109static __init int exynos_pm_drvinit(void)
239{ 110{
240 struct clk *pll_base;
241 unsigned int tmp; 111 unsigned int tmp;
242 112
243 if (soc_is_exynos5440()) 113 if (soc_is_exynos5440())
@@ -251,15 +121,6 @@ static __init int exynos_pm_drvinit(void)
251 tmp |= ((0xFF << 8) | (0x1F << 1)); 121 tmp |= ((0xFF << 8) | (0x1F << 1));
252 __raw_writel(tmp, S5P_WAKEUP_MASK); 122 __raw_writel(tmp, S5P_WAKEUP_MASK);
253 123
254 if (!soc_is_exynos5250()) {
255 pll_base = clk_get(NULL, "xtal");
256
257 if (!IS_ERR(pll_base)) {
258 pll_base_rate = clk_get_rate(pll_base);
259 clk_put(pll_base);
260 }
261 }
262
263 return subsys_interface_register(&exynos_pm_interface); 124 return subsys_interface_register(&exynos_pm_interface);
264} 125}
265arch_initcall(exynos_pm_drvinit); 126arch_initcall(exynos_pm_drvinit);
@@ -343,13 +204,8 @@ static void exynos_pm_resume(void)
343 204
344 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 205 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
345 206
346 if (!soc_is_exynos5250()) { 207 if (IS_ENABLED(CONFIG_SMP) && !soc_is_exynos5250())
347 exynos4_restore_pll();
348
349#ifdef CONFIG_SMP
350 scu_enable(S5P_VA_SCU); 208 scu_enable(S5P_VA_SCU);
351#endif
352 }
353 209
354early_wakeup: 210early_wakeup:
355 211
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 8fd24882f0b1..fe6570ebbdde 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -22,8 +22,6 @@
22#include <linux/of_platform.h> 22#include <linux/of_platform.h>
23#include <linux/sched.h> 23#include <linux/sched.h>
24 24
25#include <plat/devs.h>
26
27#include "regs-pmu.h" 25#include "regs-pmu.h"
28 26
29/* 27/*
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index d876431d64c0..bb1fa6032179 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -521,7 +521,6 @@ config MACH_ANUBIS
521 select HAVE_PATA_PLATFORM 521 select HAVE_PATA_PLATFORM
522 select S3C2440_XTAL_12000000 522 select S3C2440_XTAL_12000000
523 select S3C24XX_DCLK 523 select S3C24XX_DCLK
524 select S3C24XX_GPIO_EXTRA64
525 select S3C24XX_SIMTEC_PM if PM 524 select S3C24XX_SIMTEC_PM if PM
526 select S3C_DEV_USB_HOST 525 select S3C_DEV_USB_HOST
527 help 526 help
@@ -562,7 +561,6 @@ config MACH_OSIRIS
562 select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ 561 select S3C2410_IOTIMING if ARM_S3C2440_CPUFREQ
563 select S3C2440_XTAL_12000000 562 select S3C2440_XTAL_12000000
564 select S3C24XX_DCLK 563 select S3C24XX_DCLK
565 select S3C24XX_GPIO_EXTRA128
566 select S3C24XX_SIMTEC_PM if PM 564 select S3C24XX_SIMTEC_PM if PM
567 select S3C_DEV_NAND 565 select S3C_DEV_NAND
568 select S3C_DEV_USB_HOST 566 select S3C_DEV_USB_HOST
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2410.c b/arch/arm/mach-s3c24xx/clock-s3c2410.c
index d39d3c787580..d1afcf9252d1 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2410.c
@@ -30,13 +30,12 @@
30#include <linux/mutex.h> 30#include <linux/mutex.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/serial_core.h> 32#include <linux/serial_core.h>
33#include <linux/serial_s3c.h>
33#include <linux/io.h> 34#include <linux/io.h>
34 35
35#include <asm/mach/map.h> 36#include <asm/mach/map.h>
36 37
37#include <mach/hardware.h> 38#include <mach/hardware.h>
38
39#include <plat/regs-serial.h>
40#include <mach/regs-clock.h> 39#include <mach/regs-clock.h>
41#include <mach/regs-gpio.h> 40#include <mach/regs-gpio.h>
42 41
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2412.c b/arch/arm/mach-s3c24xx/clock-s3c2412.c
index 11b3b28457bb..192a5b2550b0 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2412.c
@@ -31,13 +31,12 @@
31#include <linux/mutex.h> 31#include <linux/mutex.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/serial_core.h> 33#include <linux/serial_core.h>
34#include <linux/serial_s3c.h>
34#include <linux/io.h> 35#include <linux/io.h>
35 36
36#include <asm/mach/map.h> 37#include <asm/mach/map.h>
37 38
38#include <mach/hardware.h> 39#include <mach/hardware.h>
39
40#include <plat/regs-serial.h>
41#include <mach/regs-clock.h> 40#include <mach/regs-clock.h>
42#include <mach/regs-gpio.h> 41#include <mach/regs-gpio.h>
43 42
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index aaf006d1d6dc..5527226fd61f 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -34,6 +34,7 @@
34#include <linux/clk.h> 34#include <linux/clk.h>
35#include <linux/io.h> 35#include <linux/io.h>
36#include <linux/serial_core.h> 36#include <linux/serial_core.h>
37#include <linux/serial_s3c.h>
37 38
38#include <mach/hardware.h> 39#include <mach/hardware.h>
39#include <linux/atomic.h> 40#include <linux/atomic.h>
@@ -43,7 +44,6 @@
43 44
44#include <plat/clock.h> 45#include <plat/clock.h>
45#include <plat/cpu.h> 46#include <plat/cpu.h>
46#include <plat/regs-serial.h>
47 47
48/* S3C2440 extended clock support */ 48/* S3C2440 extended clock support */
49 49
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index 4adaa4b43ffe..64b6eda380a4 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -27,6 +27,7 @@
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/ioport.h> 28#include <linux/ioport.h>
29#include <linux/serial_core.h> 29#include <linux/serial_core.h>
30#include <linux/serial_s3c.h>
30#include <clocksource/samsung_pwm.h> 31#include <clocksource/samsung_pwm.h>
31#include <linux/platform_device.h> 32#include <linux/platform_device.h>
32#include <linux/delay.h> 33#include <linux/delay.h>
@@ -44,7 +45,6 @@
44#include <asm/mach/map.h> 45#include <asm/mach/map.h>
45 46
46#include <mach/regs-gpio.h> 47#include <mach/regs-gpio.h>
47#include <plat/regs-serial.h>
48#include <mach/dma.h> 48#include <mach/dma.h>
49 49
50#include <plat/cpu.h> 50#include <plat/cpu.h>
@@ -240,7 +240,6 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
240 } else { 240 } else {
241 samsung_cpu_id = s3c24xx_read_idcode_v4(); 241 samsung_cpu_id = s3c24xx_read_idcode_v4();
242 } 242 }
243 s3c24xx_init_cpu();
244 243
245 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 244 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
246 245
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2410.c b/arch/arm/mach-s3c24xx/dma-s3c2410.c
index 30aa53ff07a6..09aa12da1789 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2410.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19 20
20#include <mach/map.h> 21#include <mach/map.h>
21#include <mach/dma.h> 22#include <mach/dma.h>
@@ -23,7 +24,6 @@
23#include <plat/cpu.h> 24#include <plat/cpu.h>
24#include <plat/dma-s3c24xx.h> 25#include <plat/dma-s3c24xx.h>
25 26
26#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
28#include <plat/regs-dma.h> 28#include <plat/regs-dma.h>
29#include <mach/regs-lcd.h> 29#include <mach/regs-lcd.h>
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2412.c b/arch/arm/mach-s3c24xx/dma-s3c2412.c
index b7e094671522..0c0106d1a4d1 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2412.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19#include <linux/io.h> 20#include <linux/io.h>
20 21
21#include <mach/dma.h> 22#include <mach/dma.h>
@@ -23,7 +24,6 @@
23#include <plat/dma-s3c24xx.h> 24#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 25#include <plat/cpu.h>
25 26
26#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
28#include <plat/regs-dma.h> 28#include <plat/regs-dma.h>
29#include <mach/regs-lcd.h> 29#include <mach/regs-lcd.h>
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2440.c b/arch/arm/mach-s3c24xx/dma-s3c2440.c
index cd25de28804c..2f8e8a3017df 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2440.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19 20
20#include <mach/map.h> 21#include <mach/map.h>
21#include <mach/dma.h> 22#include <mach/dma.h>
@@ -23,7 +24,6 @@
23#include <plat/dma-s3c24xx.h> 24#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 25#include <plat/cpu.h>
25 26
26#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
28#include <plat/regs-dma.h> 28#include <plat/regs-dma.h>
29#include <mach/regs-lcd.h> 29#include <mach/regs-lcd.h>
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2443.c b/arch/arm/mach-s3c24xx/dma-s3c2443.c
index 95b9f759fe97..f4096ec0700a 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2443.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/device.h> 17#include <linux/device.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19#include <linux/io.h> 20#include <linux/io.h>
20 21
21#include <mach/dma.h> 22#include <mach/dma.h>
@@ -23,7 +24,6 @@
23#include <plat/dma-s3c24xx.h> 24#include <plat/dma-s3c24xx.h>
24#include <plat/cpu.h> 25#include <plat/cpu.h>
25 26
26#include <plat/regs-serial.h>
27#include <mach/regs-gpio.h> 27#include <mach/regs-gpio.h>
28#include <plat/regs-dma.h> 28#include <plat/regs-dma.h>
29#include <mach/regs-lcd.h> 29#include <mach/regs-lcd.h>
diff --git a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
index 2558952e3147..2f39737544c0 100644
--- a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S
@@ -14,7 +14,7 @@
14 14
15#include <mach/map.h> 15#include <mach/map.h>
16#include <mach/regs-gpio.h> 16#include <mach/regs-gpio.h>
17#include <plat/regs-serial.h> 17#include <linux/serial_s3c.h>
18 18
19#define S3C2410_UART1_OFF (0x4000) 19#define S3C2410_UART1_OFF (0x4000)
20#define SHIFT_2440TXF (14-9) 20#define SHIFT_2440TXF (14-9)
diff --git a/arch/arm/plat-samsung/include/plat/rtc-core.h b/arch/arm/mach-s3c24xx/include/mach/rtc-core.h
index 7b542f7b7938..4d5f5768f700 100644
--- a/arch/arm/plat-samsung/include/plat/rtc-core.h
+++ b/arch/arm/mach-s3c24xx/include/mach/rtc-core.h
@@ -1,5 +1,4 @@
1/* linux/arch/arm/plat-samsung/include/plat/rtc-core.h 1/*
2 *
3 * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de> 2 * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de>
4 * 3 *
5 * Samsung RTC Controller core functions 4 * Samsung RTC Controller core functions
@@ -9,19 +8,19 @@
9 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
10*/ 9*/
11 10
12#ifndef __ASM_PLAT_RTC_CORE_H 11#ifndef __RTC_CORE_H
13#define __ASM_PLAT_RTC_CORE_H __FILE__ 12#define __RTC_CORE_H __FILE__
14 13
15/* These functions are only for use with the core support code, such as 14/* These functions are only for use with the core support code, such as
16 * the cpu specific initialisation code 15 * the cpu specific initialisation code
17 */ 16 */
18 17
18extern struct platform_device s3c_device_rtc;
19
19/* re-define device name depending on support. */ 20/* re-define device name depending on support. */
20static inline void s3c_rtc_setname(char *name) 21static inline void s3c_rtc_setname(char *name)
21{ 22{
22#if defined(CONFIG_S3C_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX)
23 s3c_device_rtc.name = name; 23 s3c_device_rtc.name = name;
24#endif
25} 24}
26 25
27#endif /* __ASM_PLAT_RTC_CORE_H */ 26#endif /* __RTC_CORE_H */
diff --git a/arch/arm/mach-s3c24xx/include/mach/tick.h b/arch/arm/mach-s3c24xx/include/mach/tick.h
deleted file mode 100644
index 544da41979db..000000000000
--- a/arch/arm/mach-s3c24xx/include/mach/tick.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/* linux/arch/arm/mach-s3c2410/include/mach/tick.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * S3C2410 - timer tick support
8 */
9
10#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0))
11
12static inline int s3c24xx_ostimer_pending(void)
13{
14 return __raw_readl(S3C2410_SRCPND) & SRCPND_TIMER4;
15}
diff --git a/arch/arm/mach-s3c24xx/mach-amlm5900.c b/arch/arm/mach-s3c24xx/mach-amlm5900.c
index 284ea1f44205..8ac9554aa996 100644
--- a/arch/arm/mach-s3c24xx/mach-amlm5900.c
+++ b/arch/arm/mach-s3c24xx/mach-amlm5900.c
@@ -37,6 +37,7 @@
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/proc_fs.h> 38#include <linux/proc_fs.h>
39#include <linux/serial_core.h> 39#include <linux/serial_core.h>
40#include <linux/serial_s3c.h>
40#include <linux/io.h> 41#include <linux/io.h>
41 42
42#include <asm/mach/arch.h> 43#include <asm/mach/arch.h>
@@ -49,7 +50,6 @@
49#include <asm/mach-types.h> 50#include <asm/mach-types.h>
50#include <mach/fb.h> 51#include <mach/fb.h>
51 52
52#include <plat/regs-serial.h>
53#include <mach/regs-lcd.h> 53#include <mach/regs-lcd.h>
54#include <mach/regs-gpio.h> 54#include <mach/regs-gpio.h>
55#include <mach/gpio-samsung.h> 55#include <mach/gpio-samsung.h>
diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c24xx/mach-anubis.c
index 2a16f8fb3584..81a270af2336 100644
--- a/arch/arm/mach-s3c24xx/mach-anubis.c
+++ b/arch/arm/mach-s3c24xx/mach-anubis.c
@@ -17,6 +17,7 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/serial_core.h> 19#include <linux/serial_core.h>
20#include <linux/serial_s3c.h>
20#include <linux/platform_device.h> 21#include <linux/platform_device.h>
21#include <linux/ata_platform.h> 22#include <linux/ata_platform.h>
22#include <linux/i2c.h> 23#include <linux/i2c.h>
@@ -32,7 +33,6 @@
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34 35
35#include <plat/regs-serial.h>
36#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
37#include <mach/regs-lcd.h> 37#include <mach/regs-lcd.h>
38#include <mach/gpio-samsung.h> 38#include <mach/gpio-samsung.h>
diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c24xx/mach-at2440evb.c
index 6beab674c147..d8f6bb1096cb 100644
--- a/arch/arm/mach-s3c24xx/mach-at2440evb.c
+++ b/arch/arm/mach-s3c24xx/mach-at2440evb.c
@@ -21,6 +21,7 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/serial_core.h> 23#include <linux/serial_core.h>
24#include <linux/serial_s3c.h>
24#include <linux/dm9000.h> 25#include <linux/dm9000.h>
25#include <linux/platform_device.h> 26#include <linux/platform_device.h>
26 27
@@ -33,7 +34,6 @@
33#include <asm/irq.h> 34#include <asm/irq.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35 36
36#include <plat/regs-serial.h>
37#include <mach/regs-gpio.h> 37#include <mach/regs-gpio.h>
38#include <mach/regs-lcd.h> 38#include <mach/regs-lcd.h>
39#include <mach/gpio-samsung.h> 39#include <mach/gpio-samsung.h>
diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c24xx/mach-bast.c
index 981ba1eb9fdc..e371ff53a408 100644
--- a/arch/arm/mach-s3c24xx/mach-bast.c
+++ b/arch/arm/mach-s3c24xx/mach-bast.c
@@ -19,6 +19,7 @@
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/serial_s3c.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23#include <linux/dm9000.h> 24#include <linux/dm9000.h>
24#include <linux/ata_platform.h> 25#include <linux/ata_platform.h>
@@ -55,7 +56,6 @@
55#include <plat/cpu-freq.h> 56#include <plat/cpu-freq.h>
56#include <plat/devs.h> 57#include <plat/devs.h>
57#include <plat/gpio-cfg.h> 58#include <plat/gpio-cfg.h>
58#include <plat/regs-serial.h>
59#include <plat/samsung-time.h> 59#include <plat/samsung-time.h>
60 60
61#include "bast.h" 61#include "bast.h"
diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c24xx/mach-gta02.c
index d9170e9f8ccd..8e0581317f17 100644
--- a/arch/arm/mach-s3c24xx/mach-gta02.c
+++ b/arch/arm/mach-s3c24xx/mach-gta02.c
@@ -35,6 +35,7 @@
35#include <linux/workqueue.h> 35#include <linux/workqueue.h>
36#include <linux/platform_device.h> 36#include <linux/platform_device.h>
37#include <linux/serial_core.h> 37#include <linux/serial_core.h>
38#include <linux/serial_s3c.h>
38#include <linux/input.h> 39#include <linux/input.h>
39#include <linux/io.h> 40#include <linux/io.h>
40#include <linux/i2c.h> 41#include <linux/i2c.h>
@@ -81,7 +82,6 @@
81#include <plat/devs.h> 82#include <plat/devs.h>
82#include <plat/gpio-cfg.h> 83#include <plat/gpio-cfg.h>
83#include <plat/pm.h> 84#include <plat/pm.h>
84#include <plat/regs-serial.h>
85#include <plat/samsung-time.h> 85#include <plat/samsung-time.h>
86 86
87#include "common.h" 87#include "common.h"
diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c
index de0832181d8c..e453acd92cbf 100644
--- a/arch/arm/mach-s3c24xx/mach-h1940.c
+++ b/arch/arm/mach-s3c24xx/mach-h1940.c
@@ -19,6 +19,7 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/device.h> 20#include <linux/device.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/serial_s3c.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23#include <linux/io.h> 24#include <linux/io.h>
24#include <linux/gpio.h> 25#include <linux/gpio.h>
@@ -62,7 +63,6 @@
62#include <plat/gpio-cfg.h> 63#include <plat/gpio-cfg.h>
63#include <plat/pll.h> 64#include <plat/pll.h>
64#include <plat/pm.h> 65#include <plat/pm.h>
65#include <plat/regs-serial.h>
66#include <plat/samsung-time.h> 66#include <plat/samsung-time.h>
67 67
68#include "common.h" 68#include "common.h"
diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c24xx/mach-jive.c
index 67cb8e948b7e..5faa7239e7d6 100644
--- a/arch/arm/mach-s3c24xx/mach-jive.c
+++ b/arch/arm/mach-s3c24xx/mach-jive.c
@@ -19,6 +19,7 @@
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/serial_s3c.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23#include <linux/i2c.h> 24#include <linux/i2c.h>
24 25
@@ -31,7 +32,6 @@
31#include <asm/mach/map.h> 32#include <asm/mach/map.h>
32#include <asm/mach/irq.h> 33#include <asm/mach/irq.h>
33 34
34#include <plat/regs-serial.h>
35#include <linux/platform_data/mtd-nand-s3c2410.h> 35#include <linux/platform_data/mtd-nand-s3c2410.h>
36#include <linux/platform_data/i2c-s3c2410.h> 36#include <linux/platform_data/i2c-s3c2410.h>
37 37
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c24xx/mach-mini2440.c
index 1f1559713d8b..9e57fd9f4f3b 100644
--- a/arch/arm/mach-s3c24xx/mach-mini2440.c
+++ b/arch/arm/mach-s3c24xx/mach-mini2440.c
@@ -23,6 +23,7 @@
23#include <linux/input.h> 23#include <linux/input.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/serial_s3c.h>
26#include <linux/dm9000.h> 27#include <linux/dm9000.h>
27#include <linux/platform_data/at24.h> 28#include <linux/platform_data/at24.h>
28#include <linux/platform_device.h> 29#include <linux/platform_device.h>
@@ -37,7 +38,6 @@
37#include <mach/fb.h> 38#include <mach/fb.h>
38#include <asm/mach-types.h> 39#include <asm/mach-types.h>
39 40
40#include <plat/regs-serial.h>
41#include <mach/regs-gpio.h> 41#include <mach/regs-gpio.h>
42#include <linux/platform_data/leds-s3c24xx.h> 42#include <linux/platform_data/leds-s3c24xx.h>
43#include <mach/regs-lcd.h> 43#include <mach/regs-lcd.h>
diff --git a/arch/arm/mach-s3c24xx/mach-n30.c b/arch/arm/mach-s3c24xx/mach-n30.c
index 997684f17930..4cccaad34847 100644
--- a/arch/arm/mach-s3c24xx/mach-n30.c
+++ b/arch/arm/mach-s3c24xx/mach-n30.c
@@ -24,6 +24,7 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/serial_core.h> 26#include <linux/serial_core.h>
27#include <linux/serial_s3c.h>
27#include <linux/timer.h> 28#include <linux/timer.h>
28#include <linux/io.h> 29#include <linux/io.h>
29#include <linux/mmc/host.h> 30#include <linux/mmc/host.h>
@@ -43,7 +44,6 @@
43#include <asm/mach/map.h> 44#include <asm/mach/map.h>
44 45
45#include <linux/platform_data/i2c-s3c2410.h> 46#include <linux/platform_data/i2c-s3c2410.h>
46#include <plat/regs-serial.h>
47 47
48#include <plat/clock.h> 48#include <plat/clock.h>
49#include <plat/cpu.h> 49#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c24xx/mach-nexcoder.c
index 575d28c9e6c6..3066851f584d 100644
--- a/arch/arm/mach-s3c24xx/mach-nexcoder.c
+++ b/arch/arm/mach-s3c24xx/mach-nexcoder.c
@@ -21,6 +21,7 @@
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/string.h> 22#include <linux/string.h>
23#include <linux/serial_core.h> 23#include <linux/serial_core.h>
24#include <linux/serial_s3c.h>
24#include <linux/platform_device.h> 25#include <linux/platform_device.h>
25#include <linux/io.h> 26#include <linux/io.h>
26 27
@@ -38,7 +39,6 @@
38//#include <asm/debug-ll.h> 39//#include <asm/debug-ll.h>
39#include <mach/regs-gpio.h> 40#include <mach/regs-gpio.h>
40#include <mach/gpio-samsung.h> 41#include <mach/gpio-samsung.h>
41#include <plat/regs-serial.h>
42#include <linux/platform_data/i2c-s3c2410.h> 42#include <linux/platform_data/i2c-s3c2410.h>
43 43
44#include <plat/gpio-cfg.h> 44#include <plat/gpio-cfg.h>
diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c24xx/mach-osiris.c
index f84f2a4c0c6d..a4ae4bb3666d 100644
--- a/arch/arm/mach-s3c24xx/mach-osiris.c
+++ b/arch/arm/mach-s3c24xx/mach-osiris.c
@@ -18,6 +18,7 @@
18#include <linux/device.h> 18#include <linux/device.h>
19#include <linux/syscore_ops.h> 19#include <linux/syscore_ops.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/serial_s3c.h>
21#include <linux/clk.h> 22#include <linux/clk.h>
22#include <linux/i2c.h> 23#include <linux/i2c.h>
23#include <linux/io.h> 24#include <linux/io.h>
@@ -44,7 +45,6 @@
44#include <plat/cpu-freq.h> 45#include <plat/cpu-freq.h>
45#include <plat/devs.h> 46#include <plat/devs.h>
46#include <plat/gpio-cfg.h> 47#include <plat/gpio-cfg.h>
47#include <plat/regs-serial.h>
48#include <plat/samsung-time.h> 48#include <plat/samsung-time.h>
49 49
50#include <mach/hardware.h> 50#include <mach/hardware.h>
diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c24xx/mach-otom.c
index 7e16b0740ec1..bdb3faac2d9b 100644
--- a/arch/arm/mach-s3c24xx/mach-otom.c
+++ b/arch/arm/mach-s3c24xx/mach-otom.c
@@ -15,6 +15,7 @@
15#include <linux/timer.h> 15#include <linux/timer.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/serial_core.h> 17#include <linux/serial_core.h>
18#include <linux/serial_s3c.h>
18#include <linux/platform_device.h> 19#include <linux/platform_device.h>
19#include <linux/io.h> 20#include <linux/io.h>
20 21
@@ -32,7 +33,6 @@
32#include <plat/clock.h> 33#include <plat/clock.h>
33#include <plat/cpu.h> 34#include <plat/cpu.h>
34#include <plat/devs.h> 35#include <plat/devs.h>
35#include <plat/regs-serial.h>
36#include <plat/samsung-time.h> 36#include <plat/samsung-time.h>
37 37
38#include "common.h" 38#include "common.h"
diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c24xx/mach-qt2410.c
index b534b76812e3..8c12787a8fd3 100644
--- a/arch/arm/mach-s3c24xx/mach-qt2410.c
+++ b/arch/arm/mach-s3c24xx/mach-qt2410.c
@@ -31,6 +31,7 @@
31#include <linux/device.h> 31#include <linux/device.h>
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/serial_core.h> 33#include <linux/serial_core.h>
34#include <linux/serial_s3c.h>
34#include <linux/spi/spi.h> 35#include <linux/spi/spi.h>
35#include <linux/spi/spi_gpio.h> 36#include <linux/spi/spi_gpio.h>
36#include <linux/io.h> 37#include <linux/io.h>
@@ -49,7 +50,6 @@
49 50
50#include <linux/platform_data/leds-s3c24xx.h> 51#include <linux/platform_data/leds-s3c24xx.h>
51#include <mach/regs-lcd.h> 52#include <mach/regs-lcd.h>
52#include <plat/regs-serial.h>
53#include <mach/fb.h> 53#include <mach/fb.h>
54#include <linux/platform_data/mtd-nand-s3c2410.h> 54#include <linux/platform_data/mtd-nand-s3c2410.h>
55#include <linux/platform_data/usb-s3c2410_udc.h> 55#include <linux/platform_data/usb-s3c2410_udc.h>
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index 0a5456cda1bc..afb784e934c8 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -21,6 +21,7 @@
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/serial_core.h> 23#include <linux/serial_core.h>
24#include <linux/serial_s3c.h>
24#include <linux/input.h> 25#include <linux/input.h>
25#include <linux/gpio_keys.h> 26#include <linux/gpio_keys.h>
26#include <linux/device.h> 27#include <linux/device.h>
@@ -57,7 +58,6 @@
57#include <plat/cpu.h> 58#include <plat/cpu.h>
58#include <plat/devs.h> 59#include <plat/devs.h>
59#include <plat/pm.h> 60#include <plat/pm.h>
60#include <plat/regs-serial.h>
61#include <plat/samsung-time.h> 61#include <plat/samsung-time.h>
62#include <plat/gpio-cfg.h> 62#include <plat/gpio-cfg.h>
63 63
diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c24xx/mach-rx3715.c
index b36edce8b2b8..e6535ce1bc5c 100644
--- a/arch/arm/mach-s3c24xx/mach-rx3715.c
+++ b/arch/arm/mach-s3c24xx/mach-rx3715.c
@@ -23,6 +23,7 @@
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/serial_s3c.h>
26#include <linux/serial.h> 27#include <linux/serial.h>
27#include <linux/io.h> 28#include <linux/io.h>
28#include <linux/mtd/mtd.h> 29#include <linux/mtd/mtd.h>
@@ -49,7 +50,6 @@
49#include <plat/cpu.h> 50#include <plat/cpu.h>
50#include <plat/devs.h> 51#include <plat/devs.h>
51#include <plat/pm.h> 52#include <plat/pm.h>
52#include <plat/regs-serial.h>
53#include <plat/samsung-time.h> 53#include <plat/samsung-time.h>
54 54
55#include "common.h" 55#include "common.h"
diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
index f50454a34f72..70f0900d4bca 100644
--- a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
+++ b/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
@@ -19,13 +19,13 @@
19#include <linux/irqchip.h> 19#include <linux/irqchip.h>
20#include <linux/of_platform.h> 20#include <linux/of_platform.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/serial_s3c.h>
22 23
23#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
24#include <mach/map.h> 25#include <mach/map.h>
25 26
26#include <plat/cpu.h> 27#include <plat/cpu.h>
27#include <plat/pm.h> 28#include <plat/pm.h>
28#include <plat/regs-serial.h>
29 29
30#include "common.h" 30#include "common.h"
31 31
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2410.c b/arch/arm/mach-s3c24xx/mach-smdk2410.c
index a773789e4f38..f32924ee0e9f 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2410.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2410.c
@@ -35,6 +35,7 @@
35#include <linux/timer.h> 35#include <linux/timer.h>
36#include <linux/init.h> 36#include <linux/init.h>
37#include <linux/serial_core.h> 37#include <linux/serial_core.h>
38#include <linux/serial_s3c.h>
38#include <linux/platform_device.h> 39#include <linux/platform_device.h>
39#include <linux/io.h> 40#include <linux/io.h>
40 41
@@ -46,7 +47,6 @@
46#include <asm/irq.h> 47#include <asm/irq.h>
47#include <asm/mach-types.h> 48#include <asm/mach-types.h>
48 49
49#include <plat/regs-serial.h>
50#include <linux/platform_data/i2c-s3c2410.h> 50#include <linux/platform_data/i2c-s3c2410.h>
51 51
52#include <plat/devs.h> 52#include <plat/devs.h>
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c24xx/mach-smdk2413.c
index f5bc721217e3..233fe52d2015 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2413.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2413.c
@@ -19,6 +19,7 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/serial_s3c.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23#include <linux/io.h> 24#include <linux/io.h>
24 25
@@ -33,7 +34,6 @@
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34 35
35//#include <asm/debug-ll.h> 36//#include <asm/debug-ll.h>
36#include <plat/regs-serial.h>
37#include <mach/regs-gpio.h> 37#include <mach/regs-gpio.h>
38#include <mach/regs-lcd.h> 38#include <mach/regs-lcd.h>
39 39
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c
index 12023cae4378..b3b54d8e1410 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2416.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c
@@ -18,6 +18,7 @@
18#include <linux/timer.h> 18#include <linux/timer.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/serial_s3c.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/io.h> 23#include <linux/io.h>
23#include <linux/mtd/partitions.h> 24#include <linux/mtd/partitions.h>
@@ -34,7 +35,6 @@
34#include <asm/irq.h> 35#include <asm/irq.h>
35#include <asm/mach-types.h> 36#include <asm/mach-types.h>
36 37
37#include <plat/regs-serial.h>
38#include <mach/regs-gpio.h> 38#include <mach/regs-gpio.h>
39#include <mach/regs-lcd.h> 39#include <mach/regs-lcd.h>
40#include <mach/regs-s3c2443-clock.h> 40#include <mach/regs-s3c2443-clock.h>
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c24xx/mach-smdk2440.c
index de2e5d39a847..d071dcfea548 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2440.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2440.c
@@ -20,6 +20,7 @@
20#include <linux/timer.h> 20#include <linux/timer.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/serial_s3c.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24#include <linux/io.h> 25#include <linux/io.h>
25 26
@@ -31,7 +32,6 @@
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33 34
34#include <plat/regs-serial.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-lcd.h> 36#include <mach/regs-lcd.h>
37 37
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c24xx/mach-smdk2443.c
index d9933fcc6cc8..06c4d77de3a5 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2443.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2443.c
@@ -20,6 +20,7 @@
20#include <linux/timer.h> 20#include <linux/timer.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/serial_s3c.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24#include <linux/io.h> 25#include <linux/io.h>
25 26
@@ -31,7 +32,6 @@
31#include <asm/irq.h> 32#include <asm/irq.h>
32#include <asm/mach-types.h> 33#include <asm/mach-types.h>
33 34
34#include <plat/regs-serial.h>
35#include <mach/regs-gpio.h> 35#include <mach/regs-gpio.h>
36#include <mach/regs-lcd.h> 36#include <mach/regs-lcd.h>
37 37
diff --git a/arch/arm/mach-s3c24xx/mach-tct_hammer.c b/arch/arm/mach-s3c24xx/mach-tct_hammer.c
index 7fad8f055cab..4108b2f0cede 100644
--- a/arch/arm/mach-s3c24xx/mach-tct_hammer.c
+++ b/arch/arm/mach-s3c24xx/mach-tct_hammer.c
@@ -33,6 +33,7 @@
33#include <linux/device.h> 33#include <linux/device.h>
34#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/serial_core.h> 35#include <linux/serial_core.h>
36#include <linux/serial_s3c.h>
36#include <linux/io.h> 37#include <linux/io.h>
37 38
38#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
@@ -44,7 +45,6 @@
44#include <asm/irq.h> 45#include <asm/irq.h>
45#include <asm/mach-types.h> 46#include <asm/mach-types.h>
46 47
47#include <plat/regs-serial.h>
48#include <linux/platform_data/i2c-s3c2410.h> 48#include <linux/platform_data/i2c-s3c2410.h>
49#include <plat/devs.h> 49#include <plat/devs.h>
50#include <plat/cpu.h> 50#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c24xx/mach-vr1000.c
index 755df489a45f..1cc5b1bd51cd 100644
--- a/arch/arm/mach-s3c24xx/mach-vr1000.c
+++ b/arch/arm/mach-s3c24xx/mach-vr1000.c
@@ -25,6 +25,7 @@
25#include <linux/tty.h> 25#include <linux/tty.h>
26#include <linux/serial_8250.h> 26#include <linux/serial_8250.h>
27#include <linux/serial_reg.h> 27#include <linux/serial_reg.h>
28#include <linux/serial_s3c.h>
28#include <linux/io.h> 29#include <linux/io.h>
29 30
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -45,7 +46,6 @@
45#include <plat/clock.h> 46#include <plat/clock.h>
46#include <plat/cpu.h> 47#include <plat/cpu.h>
47#include <plat/devs.h> 48#include <plat/devs.h>
48#include <plat/regs-serial.h>
49#include <plat/samsung-time.h> 49#include <plat/samsung-time.h>
50 50
51#include "bast.h" 51#include "bast.h"
diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c24xx/mach-vstms.c
index f7ec9c550787..40868c0e0a68 100644
--- a/arch/arm/mach-s3c24xx/mach-vstms.c
+++ b/arch/arm/mach-s3c24xx/mach-vstms.c
@@ -16,6 +16,7 @@
16#include <linux/timer.h> 16#include <linux/timer.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/io.h> 21#include <linux/io.h>
21#include <linux/mtd/mtd.h> 22#include <linux/mtd/mtd.h>
@@ -32,7 +33,6 @@
32#include <asm/irq.h> 33#include <asm/irq.h>
33#include <asm/mach-types.h> 34#include <asm/mach-types.h>
34 35
35#include <plat/regs-serial.h>
36#include <mach/regs-gpio.h> 36#include <mach/regs-gpio.h>
37#include <mach/regs-lcd.h> 37#include <mach/regs-lcd.h>
38 38
diff --git a/arch/arm/mach-s3c24xx/pm.c b/arch/arm/mach-s3c24xx/pm.c
index 052ca23393a7..68ea5b7e5dc7 100644
--- a/arch/arm/mach-s3c24xx/pm.c
+++ b/arch/arm/mach-s3c24xx/pm.c
@@ -33,9 +33,9 @@
33#include <linux/gpio.h> 33#include <linux/gpio.h>
34#include <linux/interrupt.h> 34#include <linux/interrupt.h>
35#include <linux/serial_core.h> 35#include <linux/serial_core.h>
36#include <linux/serial_s3c.h>
36#include <linux/io.h> 37#include <linux/io.h>
37 38
38#include <plat/regs-serial.h>
39#include <mach/regs-clock.h> 39#include <mach/regs-clock.h>
40#include <mach/regs-gpio.h> 40#include <mach/regs-gpio.h>
41#include <mach/regs-irq.h> 41#include <mach/regs-irq.h>
diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c
index ffb92cbca08c..04b58cb49888 100644
--- a/arch/arm/mach-s3c24xx/s3c2410.c
+++ b/arch/arm/mach-s3c24xx/s3c2410.c
@@ -21,6 +21,7 @@
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/syscore_ops.h> 22#include <linux/syscore_ops.h>
23#include <linux/serial_core.h> 23#include <linux/serial_core.h>
24#include <linux/serial_s3c.h>
24#include <linux/platform_device.h> 25#include <linux/platform_device.h>
25#include <linux/reboot.h> 26#include <linux/reboot.h>
26#include <linux/io.h> 27#include <linux/io.h>
@@ -37,7 +38,6 @@
37#include <plat/cpu-freq.h> 38#include <plat/cpu-freq.h>
38 39
39#include <mach/regs-clock.h> 40#include <mach/regs-clock.h>
40#include <plat/regs-serial.h>
41 41
42#include <plat/cpu.h> 42#include <plat/cpu.h>
43#include <plat/devs.h> 43#include <plat/devs.h>
diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c24xx/s3c2412.c
index 0251650cbf80..657cbaca80ac 100644
--- a/arch/arm/mach-s3c24xx/s3c2412.c
+++ b/arch/arm/mach-s3c24xx/s3c2412.c
@@ -20,6 +20,7 @@
20#include <linux/device.h> 20#include <linux/device.h>
21#include <linux/syscore_ops.h> 21#include <linux/syscore_ops.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/serial_s3c.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24#include <linux/io.h> 25#include <linux/io.h>
25#include <linux/reboot.h> 26#include <linux/reboot.h>
@@ -43,7 +44,6 @@
43#include <plat/nand-core.h> 44#include <plat/nand-core.h>
44#include <plat/pll.h> 45#include <plat/pll.h>
45#include <plat/pm.h> 46#include <plat/pm.h>
46#include <plat/regs-serial.h>
47#include <plat/regs-spi.h> 47#include <plat/regs-spi.h>
48 48
49#include "common.h" 49#include "common.h"
diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c
index 8e01b4f2df35..9fe260ae11e1 100644
--- a/arch/arm/mach-s3c24xx/s3c2416.c
+++ b/arch/arm/mach-s3c24xx/s3c2416.c
@@ -48,6 +48,7 @@
48#include <asm/system_misc.h> 48#include <asm/system_misc.h>
49 49
50#include <mach/regs-s3c2443-clock.h> 50#include <mach/regs-s3c2443-clock.h>
51#include <mach/rtc-core.h>
51 52
52#include <plat/gpio-core.h> 53#include <plat/gpio-core.h>
53#include <plat/gpio-cfg.h> 54#include <plat/gpio-cfg.h>
@@ -61,7 +62,6 @@
61#include <plat/fb-core.h> 62#include <plat/fb-core.h>
62#include <plat/nand-core.h> 63#include <plat/nand-core.h>
63#include <plat/adc-core.h> 64#include <plat/adc-core.h>
64#include <plat/rtc-core.h>
65#include <plat/spi-core.h> 65#include <plat/spi-core.h>
66 66
67#include "common.h" 67#include "common.h"
diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c24xx/s3c2443.c
index 886c2147062b..c7a804d0348e 100644
--- a/arch/arm/mach-s3c24xx/s3c2443.c
+++ b/arch/arm/mach-s3c24xx/s3c2443.c
@@ -34,6 +34,7 @@
34#include <asm/system_misc.h> 34#include <asm/system_misc.h>
35 35
36#include <mach/regs-s3c2443-clock.h> 36#include <mach/regs-s3c2443-clock.h>
37#include <mach/rtc-core.h>
37 38
38#include <plat/gpio-core.h> 39#include <plat/gpio-core.h>
39#include <plat/gpio-cfg.h> 40#include <plat/gpio-cfg.h>
@@ -43,7 +44,6 @@
43#include <plat/fb-core.h> 44#include <plat/fb-core.h>
44#include <plat/nand-core.h> 45#include <plat/nand-core.h>
45#include <plat/adc-core.h> 46#include <plat/adc-core.h>
46#include <plat/rtc-core.h>
47#include <plat/spi-core.h> 47#include <plat/spi-core.h>
48 48
49static struct map_desc s3c2443_iodesc[] __initdata = { 49static struct map_desc s3c2443_iodesc[] __initdata = {
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index 911b555029fc..fe30ebb234d2 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -17,6 +17,7 @@
17#include <linux/timer.h> 17#include <linux/timer.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/serial_core.h> 19#include <linux/serial_core.h>
20#include <linux/serial_s3c.h>
20#include <linux/platform_device.h> 21#include <linux/platform_device.h>
21#include <linux/reboot.h> 22#include <linux/reboot.h>
22#include <linux/device.h> 23#include <linux/device.h>
@@ -35,7 +36,6 @@
35#include <plat/cpu-freq.h> 36#include <plat/cpu-freq.h>
36 37
37#include <mach/regs-clock.h> 38#include <mach/regs-clock.h>
38#include <plat/regs-serial.h>
39#include <mach/regs-gpio.h> 39#include <mach/regs-gpio.h>
40 40
41#include <plat/clock.h> 41#include <plat/clock.h>
diff --git a/arch/arm/mach-s3c24xx/sleep-s3c2410.S b/arch/arm/mach-s3c24xx/sleep-s3c2410.S
index dd47c8fa07fa..c9b91223697c 100644
--- a/arch/arm/mach-s3c24xx/sleep-s3c2410.S
+++ b/arch/arm/mach-s3c24xx/sleep-s3c2410.S
@@ -25,13 +25,13 @@
25*/ 25*/
26 26
27#include <linux/linkage.h> 27#include <linux/linkage.h>
28#include <linux/serial_s3c.h>
28#include <asm/assembler.h> 29#include <asm/assembler.h>
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <mach/map.h> 31#include <mach/map.h>
31 32
32#include <mach/regs-gpio.h> 33#include <mach/regs-gpio.h>
33#include <mach/regs-clock.h> 34#include <mach/regs-clock.h>
34#include <plat/regs-serial.h>
35 35
36#include "regs-mem.h" 36#include "regs-mem.h"
37 37
diff --git a/arch/arm/mach-s3c24xx/sleep.S b/arch/arm/mach-s3c24xx/sleep.S
index 7f378b662da6..d833d616bd2e 100644
--- a/arch/arm/mach-s3c24xx/sleep.S
+++ b/arch/arm/mach-s3c24xx/sleep.S
@@ -25,13 +25,13 @@
25*/ 25*/
26 26
27#include <linux/linkage.h> 27#include <linux/linkage.h>
28#include <linux/serial_s3c.h>
28#include <asm/assembler.h> 29#include <asm/assembler.h>
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <mach/map.h> 31#include <mach/map.h>
31 32
32#include <mach/regs-gpio.h> 33#include <mach/regs-gpio.h>
33#include <mach/regs-clock.h> 34#include <mach/regs-clock.h>
34#include <plat/regs-serial.h>
35 35
36/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not 36/* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not
37 * reset the UART configuration, only enable if you really need this! 37 * reset the UART configuration, only enable if you really need this!
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 76ab595d849b..5c45aae675b6 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -25,6 +25,7 @@
25#include <linux/interrupt.h> 25#include <linux/interrupt.h>
26#include <linux/ioport.h> 26#include <linux/ioport.h>
27#include <linux/serial_core.h> 27#include <linux/serial_core.h>
28#include <linux/serial_s3c.h>
28#include <linux/platform_device.h> 29#include <linux/platform_device.h>
29#include <linux/reboot.h> 30#include <linux/reboot.h>
30#include <linux/io.h> 31#include <linux/io.h>
@@ -50,7 +51,6 @@
50#include <plat/irq-uart.h> 51#include <plat/irq-uart.h>
51#include <plat/pwm-core.h> 52#include <plat/pwm-core.h>
52#include <plat/regs-irqtype.h> 53#include <plat/regs-irqtype.h>
53#include <plat/regs-serial.h>
54#include <plat/watchdog-reset.h> 54#include <plat/watchdog-reset.h>
55 55
56#include "common.h" 56#include "common.h"
diff --git a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
index dd9ccca5de1f..c9b95325b672 100644
--- a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S
@@ -12,8 +12,8 @@
12 12
13/* pull in the relevant register and map files. */ 13/* pull in the relevant register and map files. */
14 14
15#include <linux/serial_s3c.h>
15#include <mach/map.h> 16#include <mach/map.h>
16#include <plat/regs-serial.h>
17 17
18 /* note, for the boot process to work we have to keep the UART 18 /* note, for the boot process to work we have to keep the UART
19 * virtual address aligned to an 1MiB boundary for the L1 19 * virtual address aligned to an 1MiB boundary for the L1
diff --git a/arch/arm/mach-s3c64xx/include/mach/tick.h b/arch/arm/mach-s3c64xx/include/mach/tick.h
deleted file mode 100644
index db9c1b1d56a4..000000000000
--- a/arch/arm/mach-s3c64xx/include/mach/tick.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/arch/arm/mach-s3c6400/include/mach/tick.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - Timer tick support definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18#include <linux/irqchip/arm-vic.h>
19
20/* note, the timer interrutps turn up in 2 places, the vic and then
21 * the timer block. We take the VIC as the base at the moment.
22 */
23static inline u32 s3c24xx_ostimer_pending(void)
24{
25 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
26 return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0));
27}
28
29#define TICK_MAX (0xffffffff)
30
31#endif /* __ASM_ARCH_6400_TICK_H */
diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index 1649c0d1c1b8..a61247bb6e7a 100644
--- a/arch/arm/mach-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -20,13 +20,13 @@
20#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/serial_s3c.h>
23#include <linux/irq.h> 24#include <linux/irq.h>
24#include <linux/io.h> 25#include <linux/io.h>
25#include <linux/of.h> 26#include <linux/of.h>
26 27
27#include <mach/map.h> 28#include <mach/map.h>
28 29
29#include <plat/regs-serial.h>
30#include <mach/regs-gpio.h> 30#include <mach/regs-gpio.h>
31#include <plat/cpu.h> 31#include <plat/cpu.h>
32#include <plat/pm.h> 32#include <plat/pm.h>
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index ddeb0e51a962..55eb6a69655b 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -20,6 +20,7 @@
20#include <linux/timer.h> 20#include <linux/timer.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/serial_core.h> 22#include <linux/serial_core.h>
23#include <linux/serial_s3c.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24#include <linux/io.h> 25#include <linux/io.h>
25#include <linux/i2c.h> 26#include <linux/i2c.h>
@@ -41,7 +42,6 @@
41#include <asm/irq.h> 42#include <asm/irq.h>
42#include <asm/mach-types.h> 43#include <asm/mach-types.h>
43 44
44#include <plat/regs-serial.h>
45#include <linux/platform_data/i2c-s3c2410.h> 45#include <linux/platform_data/i2c-s3c2410.h>
46#include <plat/fb.h> 46#include <plat/fb.h>
47 47
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 3df3c372ee1f..4b0199fff9f5 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/list.h> 15#include <linux/list.h>
16#include <linux/serial_core.h> 16#include <linux/serial_core.h>
17#include <linux/serial_s3c.h>
17#include <linux/platform_device.h> 18#include <linux/platform_device.h>
18#include <linux/fb.h> 19#include <linux/fb.h>
19#include <linux/io.h> 20#include <linux/io.h>
@@ -51,7 +52,6 @@
51#include <mach/regs-gpio.h> 52#include <mach/regs-gpio.h>
52#include <mach/gpio-samsung.h> 53#include <mach/gpio-samsung.h>
53 54
54#include <plat/regs-serial.h>
55#include <plat/fb.h> 55#include <plat/fb.h>
56#include <plat/sdhci.h> 56#include <plat/sdhci.h>
57#include <plat/gpio-cfg.h> 57#include <plat/gpio-cfg.h>
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 0431016925b9..72cee08c8bf5 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -11,6 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/serial_core.h> 13#include <linux/serial_core.h>
14#include <linux/serial_s3c.h>
14#include <linux/platform_device.h> 15#include <linux/platform_device.h>
15#include <linux/io.h> 16#include <linux/io.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
@@ -33,7 +34,6 @@
33#include <asm/irq.h> 34#include <asm/irq.h>
34#include <asm/mach-types.h> 35#include <asm/mach-types.h>
35 36
36#include <plat/regs-serial.h>
37#include <linux/platform_data/i2c-s3c2410.h> 37#include <linux/platform_data/i2c-s3c2410.h>
38#include <mach/gpio-samsung.h> 38#include <mach/gpio-samsung.h>
39#include <plat/fb.h> 39#include <plat/fb.h>
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 8d553a418e1c..9cbc07602ef3 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -22,6 +22,7 @@
22#include <linux/mtd/mtd.h> 22#include <linux/mtd/mtd.h>
23#include <linux/mtd/partitions.h> 23#include <linux/mtd/partitions.h>
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/serial_s3c.h>
25#include <linux/types.h> 26#include <linux/types.h>
26 27
27#include <asm/mach-types.h> 28#include <asm/mach-types.h>
@@ -38,7 +39,6 @@
38#include <plat/fb.h> 39#include <plat/fb.h>
39#include <linux/platform_data/mtd-nand-s3c2410.h> 40#include <linux/platform_data/mtd-nand-s3c2410.h>
40#include <linux/platform_data/mmc-sdhci-s3c.h> 41#include <linux/platform_data/mmc-sdhci-s3c.h>
41#include <plat/regs-serial.h>
42#include <plat/sdhci.h> 42#include <plat/sdhci.h>
43#include <linux/platform_data/touchscreen-s3c2410.h> 43#include <linux/platform_data/touchscreen-s3c2410.h>
44 44
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 2067b0bf55b4..67f06a9ae656 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -16,6 +16,7 @@
16#include <linux/timer.h> 16#include <linux/timer.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/io.h> 21#include <linux/io.h>
21#include <linux/i2c.h> 22#include <linux/i2c.h>
@@ -36,7 +37,6 @@
36#include <asm/irq.h> 37#include <asm/irq.h>
37#include <asm/mach-types.h> 38#include <asm/mach-types.h>
38 39
39#include <plat/regs-serial.h>
40#include <linux/platform_data/i2c-s3c2410.h> 40#include <linux/platform_data/i2c-s3c2410.h>
41#include <plat/fb.h> 41#include <plat/fb.h>
42 42
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 5152026f0e19..fbad2af1ef16 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -23,6 +23,7 @@
23#include <linux/mtd/partitions.h> 23#include <linux/mtd/partitions.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/serial_s3c.h>
26#include <linux/types.h> 27#include <linux/types.h>
27 28
28#include <asm/mach-types.h> 29#include <asm/mach-types.h>
@@ -38,7 +39,6 @@
38#include <plat/devs.h> 39#include <plat/devs.h>
39#include <plat/fb.h> 40#include <plat/fb.h>
40#include <linux/platform_data/mtd-nand-s3c2410.h> 41#include <linux/platform_data/mtd-nand-s3c2410.h>
41#include <plat/regs-serial.h>
42#include <linux/platform_data/touchscreen-s3c2410.h> 42#include <linux/platform_data/touchscreen-s3c2410.h>
43 43
44#include <video/platform_lcd.h> 44#include <video/platform_lcd.h>
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index 6e72bd5c1d0c..78dd6f73c072 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -16,6 +16,7 @@
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/pwm_backlight.h> 17#include <linux/pwm_backlight.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19#include <linux/spi/spi_gpio.h> 20#include <linux/spi/spi_gpio.h>
20#include <linux/usb/gpio_vbus.h> 21#include <linux/usb/gpio_vbus.h>
21#include <linux/platform_data/s3c-hsotg.h> 22#include <linux/platform_data/s3c-hsotg.h>
@@ -33,7 +34,6 @@
33#include <linux/platform_data/i2c-s3c2410.h> 34#include <linux/platform_data/i2c-s3c2410.h>
34#include <plat/gpio-cfg.h> 35#include <plat/gpio-cfg.h>
35#include <linux/platform_data/hwmon-s3c.h> 36#include <linux/platform_data/hwmon-s3c.h>
36#include <plat/regs-serial.h>
37#include <linux/platform_data/usb-ohci-s3c2410.h> 37#include <linux/platform_data/usb-ohci-s3c2410.h>
38#include <plat/sdhci.h> 38#include <plat/sdhci.h>
39#include <linux/platform_data/touchscreen-s3c2410.h> 39#include <linux/platform_data/touchscreen-s3c2410.h>
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c64xx/mach-smdk6400.c
index 150f55fb9e33..c85d1cbe769f 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6400.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6400.c
@@ -16,6 +16,7 @@
16#include <linux/timer.h> 16#include <linux/timer.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/i2c.h> 21#include <linux/i2c.h>
21#include <linux/io.h> 22#include <linux/io.h>
@@ -29,8 +30,6 @@
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <mach/map.h> 31#include <mach/map.h>
31 32
32#include <plat/regs-serial.h>
33
34#include <plat/clock.h> 33#include <plat/clock.h>
35#include <plat/devs.h> 34#include <plat/devs.h>
36#include <plat/cpu.h> 35#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 43261d24a0a5..c6a8b2ab0240 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -19,6 +19,7 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/input.h> 20#include <linux/input.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/serial_s3c.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23#include <linux/io.h> 24#include <linux/io.h>
24#include <linux/i2c.h> 25#include <linux/i2c.h>
@@ -55,7 +56,6 @@
55#include <asm/irq.h> 56#include <asm/irq.h>
56#include <asm/mach-types.h> 57#include <asm/mach-types.h>
57 58
58#include <plat/regs-serial.h>
59#include <mach/regs-gpio.h> 59#include <mach/regs-gpio.h>
60#include <mach/gpio-samsung.h> 60#include <mach/gpio-samsung.h>
61#include <linux/platform_data/ata-samsung_cf.h> 61#include <linux/platform_data/ata-samsung_cf.h>
diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c64xx/s3c6400.c
index 3db0c98222f7..8c42807bf579 100644
--- a/arch/arm/mach-s3c64xx/s3c6400.c
+++ b/arch/arm/mach-s3c64xx/s3c6400.c
@@ -23,6 +23,7 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/device.h> 24#include <linux/device.h>
25#include <linux/serial_core.h> 25#include <linux/serial_core.h>
26#include <linux/serial_s3c.h>
26#include <linux/platform_device.h> 27#include <linux/platform_device.h>
27#include <linux/of.h> 28#include <linux/of.h>
28 29
@@ -34,7 +35,6 @@
34#include <asm/irq.h> 35#include <asm/irq.h>
35 36
36#include <plat/cpu-freq.h> 37#include <plat/cpu-freq.h>
37#include <plat/regs-serial.h>
38#include <mach/regs-clock.h> 38#include <mach/regs-clock.h>
39 39
40#include <plat/cpu.h> 40#include <plat/cpu.h>
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c
index 72b2278953a8..5be3f09bac92 100644
--- a/arch/arm/mach-s3c64xx/s3c6410.c
+++ b/arch/arm/mach-s3c64xx/s3c6410.c
@@ -24,6 +24,7 @@
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/device.h> 25#include <linux/device.h>
26#include <linux/serial_core.h> 26#include <linux/serial_core.h>
27#include <linux/serial_s3c.h>
27#include <linux/platform_device.h> 28#include <linux/platform_device.h>
28#include <linux/of.h> 29#include <linux/of.h>
29 30
@@ -35,7 +36,6 @@
35#include <asm/irq.h> 36#include <asm/irq.h>
36 37
37#include <plat/cpu-freq.h> 38#include <plat/cpu-freq.h>
38#include <plat/regs-serial.h>
39#include <mach/regs-clock.h> 39#include <mach/regs-clock.h>
40 40
41#include <plat/cpu.h> 41#include <plat/cpu.h>
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 42e14f2e7ca7..eb2ad14947f4 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -19,6 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/device.h> 20#include <linux/device.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <linux/serial_s3c.h>
22#include <clocksource/samsung_pwm.h> 23#include <clocksource/samsung_pwm.h>
23#include <linux/platform_device.h> 24#include <linux/platform_device.h>
24#include <linux/sched.h> 25#include <linux/sched.h>
@@ -50,7 +51,6 @@
50#include <plat/gpio-cfg.h> 51#include <plat/gpio-cfg.h>
51#include <plat/pwm-core.h> 52#include <plat/pwm-core.h>
52#include <plat/regs-irqtype.h> 53#include <plat/regs-irqtype.h>
53#include <plat/regs-serial.h>
54#include <plat/watchdog-reset.h> 54#include <plat/watchdog-reset.h>
55 55
56#include "common.h" 56#include "common.h"
diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
index 5e2916fb19a9..8759e7882bcb 100644
--- a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
@@ -10,11 +10,10 @@
10 10
11/* pull in the relevant register and map files. */ 11/* pull in the relevant register and map files. */
12 12
13#include <linux/serial_s3c.h>
13#include <plat/map-base.h> 14#include <plat/map-base.h>
14#include <plat/map-s5p.h> 15#include <plat/map-s5p.h>
15 16
16#include <plat/regs-serial.h>
17
18 .macro addruart, rp, rv, tmp 17 .macro addruart, rp, rv, tmp
19 mov \rp, #0xE0000000 18 mov \rp, #0xE0000000
20 orr \rp, \rp, #0x00100000 19 orr \rp, \rp, #0x00100000
diff --git a/arch/arm/mach-s5p64x0/irq-pm.c b/arch/arm/mach-s5p64x0/irq-pm.c
index 3e6f2456ee9d..1c83d2899625 100644
--- a/arch/arm/mach-s5p64x0/irq-pm.c
+++ b/arch/arm/mach-s5p64x0/irq-pm.c
@@ -14,9 +14,9 @@
14 14
15#include <linux/syscore_ops.h> 15#include <linux/syscore_ops.h>
16#include <linux/serial_core.h> 16#include <linux/serial_core.h>
17#include <linux/serial_s3c.h>
17#include <linux/io.h> 18#include <linux/io.h>
18 19
19#include <plat/regs-serial.h>
20#include <plat/pm.h> 20#include <plat/pm.h>
21 21
22#include <mach/regs-gpio.h> 22#include <mach/regs-gpio.h>
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 9efdcc03df3b..6840e197cb2d 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -17,6 +17,7 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/serial_core.h> 19#include <linux/serial_core.h>
20#include <linux/serial_s3c.h>
20#include <linux/platform_device.h> 21#include <linux/platform_device.h>
21#include <linux/io.h> 22#include <linux/io.h>
22#include <linux/module.h> 23#include <linux/module.h>
@@ -39,7 +40,6 @@
39#include <mach/regs-clock.h> 40#include <mach/regs-clock.h>
40#include <mach/regs-gpio.h> 41#include <mach/regs-gpio.h>
41 42
42#include <plat/regs-serial.h>
43#include <plat/gpio-cfg.h> 43#include <plat/gpio-cfg.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/devs.h> 45#include <plat/devs.h>
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index c3cacc067efe..fa1341c074ca 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -17,6 +17,7 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/i2c.h> 18#include <linux/i2c.h>
19#include <linux/serial_core.h> 19#include <linux/serial_core.h>
20#include <linux/serial_s3c.h>
20#include <linux/platform_device.h> 21#include <linux/platform_device.h>
21#include <linux/io.h> 22#include <linux/io.h>
22#include <linux/module.h> 23#include <linux/module.h>
@@ -39,7 +40,6 @@
39#include <mach/regs-clock.h> 40#include <mach/regs-clock.h>
40#include <mach/regs-gpio.h> 41#include <mach/regs-gpio.h>
41 42
42#include <plat/regs-serial.h>
43#include <plat/gpio-cfg.h> 43#include <plat/gpio-cfg.h>
44#include <plat/clock.h> 44#include <plat/clock.h>
45#include <plat/devs.h> 45#include <plat/devs.h>
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index c5a8eeacf81c..6a41bf7dacf6 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <linux/serial_s3c.h>
25#include <clocksource/samsung_pwm.h> 26#include <clocksource/samsung_pwm.h>
26#include <linux/platform_device.h> 27#include <linux/platform_device.h>
27#include <linux/sched.h> 28#include <linux/sched.h>
@@ -49,7 +50,6 @@
49#include <plat/onenand-core.h> 50#include <plat/onenand-core.h>
50#include <plat/pwm-core.h> 51#include <plat/pwm-core.h>
51#include <plat/spi-core.h> 52#include <plat/spi-core.h>
52#include <plat/regs-serial.h>
53#include <plat/watchdog-reset.h> 53#include <plat/watchdog-reset.h>
54 54
55#include "common.h" 55#include "common.h"
diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
index 66cb7f16bf2a..22c23859e45e 100644
--- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S
@@ -13,8 +13,8 @@
13 13
14/* pull in the relevant register and map files. */ 14/* pull in the relevant register and map files. */
15 15
16#include <linux/serial_s3c.h>
16#include <mach/map.h> 17#include <mach/map.h>
17#include <plat/regs-serial.h>
18 18
19 /* note, for the boot process to work we have to keep the UART 19 /* note, for the boot process to work we have to keep the UART
20 * virtual address aligned to an 1MiB boundary for the L1 20 * virtual address aligned to an 1MiB boundary for the L1
diff --git a/arch/arm/mach-s5pc100/include/mach/tick.h b/arch/arm/mach-s5pc100/include/mach/tick.h
deleted file mode 100644
index 0af8e41230ed..000000000000
--- a/arch/arm/mach-s5pc100/include/mach/tick.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/arch/arm/mach-s5pc100/include/mach/tick.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S3C64XX - Timer tick support definitions
7 *
8 * Based on mach-s3c6400/include/mach/tick.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_TICK_H
16#define __ASM_ARCH_TICK_H __FILE__
17
18#include <linux/irqchip/arm-vic.h>
19
20/* note, the timer interrutps turn up in 2 places, the vic and then
21 * the timer block. We take the VIC as the base at the moment.
22 */
23static inline u32 s3c24xx_ostimer_pending(void)
24{
25 u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS);
26 return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0)));
27}
28
29#define TICK_MAX (0xffffffff)
30
31#endif /* __ASM_ARCH_TICK_H */
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 9e256b9fc930..668af3ac31f3 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -16,6 +16,7 @@
16#include <linux/timer.h> 16#include <linux/timer.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/serial_core.h> 18#include <linux/serial_core.h>
19#include <linux/serial_s3c.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/io.h> 21#include <linux/io.h>
21#include <linux/gpio.h> 22#include <linux/gpio.h>
@@ -37,7 +38,6 @@
37#include <asm/irq.h> 38#include <asm/irq.h>
38#include <asm/mach-types.h> 39#include <asm/mach-types.h>
39 40
40#include <plat/regs-serial.h>
41#include <plat/gpio-cfg.h> 41#include <plat/gpio-cfg.h>
42 42
43#include <plat/clock.h> 43#include <plat/clock.h>
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 26027a29b8a1..7024dcd0e40a 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -24,6 +24,7 @@
24#include <linux/sched.h> 24#include <linux/sched.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/serial_core.h> 26#include <linux/serial_core.h>
27#include <linux/serial_s3c.h>
27 28
28#include <asm/proc-fns.h> 29#include <asm/proc-fns.h>
29#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
@@ -46,7 +47,6 @@
46#include <plat/pwm-core.h> 47#include <plat/pwm-core.h>
47#include <plat/tv-core.h> 48#include <plat/tv-core.h>
48#include <plat/spi-core.h> 49#include <plat/spi-core.h>
49#include <plat/regs-serial.h>
50 50
51#include "common.h" 51#include "common.h"
52 52
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
index 80c21996c943..30b511a580aa 100644
--- a/arch/arm/mach-s5pv210/include/mach/debug-macro.S
+++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S
@@ -12,8 +12,8 @@
12 12
13/* pull in the relevant register and map files. */ 13/* pull in the relevant register and map files. */
14 14
15#include <linux/serial_s3c.h>
15#include <mach/map.h> 16#include <mach/map.h>
16#include <plat/regs-serial.h>
17 17
18 /* note, for the boot process to work we have to keep the UART 18 /* note, for the boot process to work we have to keep the UART
19 * virtual address aligned to an 1MiB boundary for the L1 19 * virtual address aligned to an 1MiB boundary for the L1
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index ad40ab0f5dbd..cc37edacda26 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -12,6 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/serial_s3c.h>
15#include <linux/fb.h> 16#include <linux/fb.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
17#include <linux/i2c-gpio.h> 18#include <linux/i2c-gpio.h>
@@ -32,7 +33,6 @@
32#include <mach/regs-clock.h> 33#include <mach/regs-clock.h>
33 34
34#include <plat/gpio-cfg.h> 35#include <plat/gpio-cfg.h>
35#include <plat/regs-serial.h>
36#include <plat/devs.h> 36#include <plat/devs.h>
37#include <plat/cpu.h> 37#include <plat/cpu.h>
38#include <plat/fb.h> 38#include <plat/fb.h>
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index e5cd9fbf19e9..b41a38a75844 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -12,6 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/serial_s3c.h>
15#include <linux/fb.h> 16#include <linux/fb.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
17#include <linux/i2c-gpio.h> 18#include <linux/i2c-gpio.h>
@@ -39,7 +40,6 @@
39#include <mach/regs-clock.h> 40#include <mach/regs-clock.h>
40 41
41#include <plat/gpio-cfg.h> 42#include <plat/gpio-cfg.h>
42#include <plat/regs-serial.h>
43#include <plat/devs.h> 43#include <plat/devs.h>
44#include <plat/cpu.h> 44#include <plat/cpu.h>
45#include <plat/fb.h> 45#include <plat/fb.h>
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 7c0ed07a78a3..448e1d2eeed6 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -12,6 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/serial_s3c.h>
15#include <linux/i2c.h> 16#include <linux/i2c.h>
16#include <linux/device.h> 17#include <linux/device.h>
17 18
@@ -23,7 +24,6 @@
23#include <mach/map.h> 24#include <mach/map.h>
24#include <mach/regs-clock.h> 25#include <mach/regs-clock.h>
25 26
26#include <plat/regs-serial.h>
27#include <plat/devs.h> 27#include <plat/devs.h>
28#include <plat/cpu.h> 28#include <plat/cpu.h>
29#include <linux/platform_data/ata-samsung_cf.h> 29#include <linux/platform_data/ata-samsung_cf.h>
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index f52cc15c2d85..2a6655fb63e7 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -13,6 +13,7 @@
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16#include <linux/serial_s3c.h>
16#include <linux/device.h> 17#include <linux/device.h>
17#include <linux/dm9000.h> 18#include <linux/dm9000.h>
18#include <linux/fb.h> 19#include <linux/fb.h>
@@ -32,7 +33,6 @@
32#include <mach/map.h> 33#include <mach/map.h>
33#include <mach/regs-clock.h> 34#include <mach/regs-clock.h>
34 35
35#include <plat/regs-serial.h>
36#include <plat/regs-srom.h> 36#include <plat/regs-srom.h>
37#include <plat/gpio-cfg.h> 37#include <plat/gpio-cfg.h>
38#include <plat/devs.h> 38#include <plat/devs.h>
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c
index 579afe89842a..157805529f26 100644
--- a/arch/arm/mach-s5pv210/mach-torbreck.c
+++ b/arch/arm/mach-s5pv210/mach-torbreck.c
@@ -13,6 +13,7 @@
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16#include <linux/serial_s3c.h>
16 17
17#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
18#include <asm/mach/map.h> 19#include <asm/mach/map.h>
@@ -22,7 +23,6 @@
22#include <mach/map.h> 23#include <mach/map.h>
23#include <mach/regs-clock.h> 24#include <mach/regs-clock.h>
24 25
25#include <plat/regs-serial.h>
26#include <plat/devs.h> 26#include <plat/devs.h>
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <linux/platform_data/i2c-s3c2410.h> 28#include <linux/platform_data/i2c-s3c2410.h>
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 47c9fad43f00..ddfebddb4105 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -52,7 +52,7 @@
52#include <plat/cpu.h> 52#include <plat/cpu.h>
53 53
54#include <linux/serial_core.h> 54#include <linux/serial_core.h>
55#include <plat/regs-serial.h> /* for s3c24xx_uart_devs */ 55#include <linux/serial_s3c.h> /* for s3c24xx_uart_devs */
56 56
57/* clock information */ 57/* clock information */
58 58
diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c
index 46b426e8aff5..364963a0a344 100644
--- a/arch/arm/plat-samsung/cpu.c
+++ b/arch/arm/plat-samsung/cpu.c
@@ -28,13 +28,6 @@ unsigned int samsung_rev(void)
28} 28}
29EXPORT_SYMBOL(samsung_rev); 29EXPORT_SYMBOL(samsung_rev);
30 30
31void __init s3c24xx_init_cpu(void)
32{
33 /* nothing here yet */
34
35 samsung_cpu_rev = 0;
36}
37
38void __init s3c64xx_init_cpu(void) 31void __init s3c64xx_init_cpu(void)
39{ 32{
40 samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0x118); 33 samsung_cpu_id = __raw_readl(S3C_VA_SYS + 0x118);
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index ac07e871f6a7..c64a39ac1b04 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -18,6 +18,7 @@
18#include <linux/timer.h> 18#include <linux/timer.h>
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/serial_s3c.h>
21#include <linux/platform_device.h> 22#include <linux/platform_device.h>
22#include <linux/io.h> 23#include <linux/io.h>
23#include <linux/slab.h> 24#include <linux/slab.h>
@@ -64,7 +65,6 @@
64#include <linux/platform_data/usb-s3c2410_udc.h> 65#include <linux/platform_data/usb-s3c2410_udc.h>
65#include <linux/platform_data/usb-ohci-s3c2410.h> 66#include <linux/platform_data/usb-ohci-s3c2410.h>
66#include <plat/usb-phy.h> 67#include <plat/usb-phy.h>
67#include <plat/regs-serial.h>
68#include <plat/regs-spi.h> 68#include <plat/regs-spi.h>
69#include <linux/platform_data/spi-s3c64xx.h> 69#include <linux/platform_data/spi-s3c64xx.h>
70 70
@@ -744,10 +744,7 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
744 if (!pd) { 744 if (!pd) {
745 pd = &default_i2c_data; 745 pd = &default_i2c_data;
746 746
747 if (soc_is_exynos4210() || 747 if (soc_is_s5pv210())
748 soc_is_exynos4212() || soc_is_exynos4412())
749 pd->bus_num = 8;
750 else if (soc_is_s5pv210())
751 pd->bus_num = 3; 748 pd->bus_num = 3;
752 else 749 else
753 pd->bus_num = 0; 750 pd->bus_num = 0;
@@ -764,10 +761,7 @@ void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
764{ 761{
765 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata; 762 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
766 763
767 if (soc_is_exynos4210() || 764 if (soc_is_s5pv210())
768 soc_is_exynos4212() || soc_is_exynos4412())
769 pd->hdmiphy_bus = 8;
770 else if (soc_is_s5pv210())
771 pd->hdmiphy_bus = 3; 765 pd->hdmiphy_bus = 3;
772 else 766 else
773 pd->hdmiphy_bus = 0; 767 pd->hdmiphy_bus = 0;
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 335beb341355..31164b34d4c4 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -199,7 +199,6 @@ extern void s5p_init_irq(u32 *vic, u32 num_vic);
199 199
200extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); 200extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
201 201
202extern void s3c24xx_init_cpu(void);
203extern void s3c64xx_init_cpu(void); 202extern void s3c64xx_init_cpu(void);
204extern void s5p_init_cpu(void __iomem *cpuid_addr); 203extern void s5p_init_cpu(void __iomem *cpuid_addr);
205 204
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
deleted file mode 100644
index f05f2afa440d..000000000000
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <linux/serial_s3c.h>
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index f48dc0a4736c..61054fd88d43 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -29,7 +29,7 @@ static void arch_detect_cpu(void);
29 29
30/* defines for UART registers */ 30/* defines for UART registers */
31 31
32#include <plat/regs-serial.h> 32#include <linux/serial_s3c.h>
33 33
34/* working in physical space... */ 34/* working in physical space... */
35#define S3C_WDOGREG(x) ((S3C_PA_WDT + (x))) 35#define S3C_WDOGREG(x) ((S3C_PA_WDT + (x)))
diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c
index aa9511b6914a..0ffc84aaf60e 100644
--- a/arch/arm/plat-samsung/init.c
+++ b/arch/arm/plat-samsung/init.c
@@ -21,6 +21,7 @@
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/ioport.h> 22#include <linux/ioport.h>
23#include <linux/serial_core.h> 23#include <linux/serial_core.h>
24#include <linux/serial_s3c.h>
24#include <linux/platform_device.h> 25#include <linux/platform_device.h>
25#include <linux/of.h> 26#include <linux/of.h>
26 27
@@ -33,8 +34,6 @@
33#include <plat/devs.h> 34#include <plat/devs.h>
34#include <plat/clock.h> 35#include <plat/clock.h>
35 36
36#include <plat/regs-serial.h>
37
38static struct cpu_table *cpu; 37static struct cpu_table *cpu;
39 38
40static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode, 39static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode,
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index dd4c15d0d68f..da268813901b 100644
--- a/arch/arm/plat-samsung/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -196,8 +196,7 @@ struct samsung_gpio_pm samsung_gpio_pm_2bit = {
196 .resume = samsung_gpio_pm_2bit_resume, 196 .resume = samsung_gpio_pm_2bit_resume,
197}; 197};
198 198
199#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) \ 199#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P)
200 || defined(CONFIG_ARCH_EXYNOS)
201static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip) 200static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip)
202{ 201{
203 chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); 202 chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);
@@ -307,7 +306,7 @@ struct samsung_gpio_pm samsung_gpio_pm_4bit = {
307 .save = samsung_gpio_pm_4bit_save, 306 .save = samsung_gpio_pm_4bit_save,
308 .resume = samsung_gpio_pm_4bit_resume, 307 .resume = samsung_gpio_pm_4bit_resume,
309}; 308};
310#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P || CONFIG_ARCH_EXYNOS */ 309#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */
311 310
312/** 311/**
313 * samsung_pm_save_gpio() - save gpio chip data for suspend 312 * samsung_pm_save_gpio() - save gpio chip data for suspend
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index e5b0f2c2d884..ae9baa2d6381 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -18,13 +18,12 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/of.h> 19#include <linux/of.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/serial_s3c.h>
21#include <linux/io.h> 22#include <linux/io.h>
22 23
23#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
24#include <asm/suspend.h> 25#include <asm/suspend.h>
25 26
26#include <plat/regs-serial.h>
27
28#ifdef CONFIG_SAMSUNG_ATAGS 27#ifdef CONFIG_SAMSUNG_ATAGS
29#include <mach/hardware.h> 28#include <mach/hardware.h>
30#include <mach/map.h> 29#include <mach/map.h>
diff --git a/arch/arm/plat-samsung/s5p-irq-pm.c b/arch/arm/plat-samsung/s5p-irq-pm.c
index 591498035916..52b16943617e 100644
--- a/arch/arm/plat-samsung/s5p-irq-pm.c
+++ b/arch/arm/plat-samsung/s5p-irq-pm.c
@@ -22,10 +22,7 @@
22#include <mach/map.h> 22#include <mach/map.h>
23 23
24#include <mach/regs-gpio.h> 24#include <mach/regs-gpio.h>
25
26#ifndef CONFIG_ARCH_EXYNOS
27#include <mach/regs-irq.h> 25#include <mach/regs-irq.h>
28#endif
29 26
30/* state for IRQs over sleep */ 27/* state for IRQs over sleep */
31 28
@@ -43,18 +40,8 @@ int s3c_irq_wake(struct irq_data *data, unsigned int state)
43 unsigned long irqbit; 40 unsigned long irqbit;
44 unsigned int irq_rtc_tic, irq_rtc_alarm; 41 unsigned int irq_rtc_tic, irq_rtc_alarm;
45 42
46#ifdef CONFIG_ARCH_EXYNOS
47 if (soc_is_exynos5250()) {
48 irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
49 irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
50 } else {
51 irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
52 irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
53 }
54#else
55 irq_rtc_tic = IRQ_RTC_TIC; 43 irq_rtc_tic = IRQ_RTC_TIC;
56 irq_rtc_alarm = IRQ_RTC_ALARM; 44 irq_rtc_alarm = IRQ_RTC_ALARM;
57#endif
58 45
59 if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) { 46 if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
60 irqbit = 1 << (data->irq + 1 - irq_rtc_alarm); 47 irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 010f071af883..b4f967210175 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -16,6 +16,7 @@
16#include <linux/clk-provider.h> 16#include <linux/clk-provider.h>
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_address.h> 18#include <linux/of_address.h>
19#include <linux/syscore_ops.h>
19 20
20#include "clk.h" 21#include "clk.h"
21 22
@@ -130,6 +131,17 @@ enum exynos4_plls {
130 nr_plls /* number of PLLs */ 131 nr_plls /* number of PLLs */
131}; 132};
132 133
134static void __iomem *reg_base;
135static enum exynos4_soc exynos4_soc;
136
137/*
138 * Support for CMU save/restore across system suspends
139 */
140#ifdef CONFIG_PM_SLEEP
141static struct samsung_clk_reg_dump *exynos4_save_common;
142static struct samsung_clk_reg_dump *exynos4_save_soc;
143static struct samsung_clk_reg_dump *exynos4_save_pll;
144
133/* 145/*
134 * list of controller registers to be saved and restored during a 146 * list of controller registers to be saved and restored during a
135 * suspend/resume cycle. 147 * suspend/resume cycle.
@@ -154,6 +166,17 @@ static unsigned long exynos4x12_clk_save[] __initdata = {
154 E4X12_MPLL_CON0, 166 E4X12_MPLL_CON0,
155}; 167};
156 168
169static unsigned long exynos4_clk_pll_regs[] __initdata = {
170 EPLL_LOCK,
171 VPLL_LOCK,
172 EPLL_CON0,
173 EPLL_CON1,
174 EPLL_CON2,
175 VPLL_CON0,
176 VPLL_CON1,
177 VPLL_CON2,
178};
179
157static unsigned long exynos4_clk_regs[] __initdata = { 180static unsigned long exynos4_clk_regs[] __initdata = {
158 SRC_LEFTBUS, 181 SRC_LEFTBUS,
159 DIV_LEFTBUS, 182 DIV_LEFTBUS,
@@ -161,12 +184,6 @@ static unsigned long exynos4_clk_regs[] __initdata = {
161 SRC_RIGHTBUS, 184 SRC_RIGHTBUS,
162 DIV_RIGHTBUS, 185 DIV_RIGHTBUS,
163 GATE_IP_RIGHTBUS, 186 GATE_IP_RIGHTBUS,
164 EPLL_CON0,
165 EPLL_CON1,
166 EPLL_CON2,
167 VPLL_CON0,
168 VPLL_CON1,
169 VPLL_CON2,
170 SRC_TOP0, 187 SRC_TOP0,
171 SRC_TOP1, 188 SRC_TOP1,
172 SRC_CAM, 189 SRC_CAM,
@@ -227,6 +244,124 @@ static unsigned long exynos4_clk_regs[] __initdata = {
227 GATE_IP_CPU, 244 GATE_IP_CPU,
228}; 245};
229 246
247static const struct samsung_clk_reg_dump src_mask_suspend[] = {
248 { .offset = SRC_MASK_TOP, .value = 0x00000001, },
249 { .offset = SRC_MASK_CAM, .value = 0x11111111, },
250 { .offset = SRC_MASK_TV, .value = 0x00000111, },
251 { .offset = SRC_MASK_LCD0, .value = 0x00001111, },
252 { .offset = SRC_MASK_MAUDIO, .value = 0x00000001, },
253 { .offset = SRC_MASK_FSYS, .value = 0x01011111, },
254 { .offset = SRC_MASK_PERIL0, .value = 0x01111111, },
255 { .offset = SRC_MASK_PERIL1, .value = 0x01110111, },
256 { .offset = SRC_MASK_DMC, .value = 0x00010000, },
257};
258
259static const struct samsung_clk_reg_dump src_mask_suspend_e4210[] = {
260 { .offset = E4210_SRC_MASK_LCD1, .value = 0x00001111, },
261};
262
263#define PLL_ENABLED (1 << 31)
264#define PLL_LOCKED (1 << 29)
265
266static void exynos4_clk_wait_for_pll(u32 reg)
267{
268 u32 pll_con;
269
270 pll_con = readl(reg_base + reg);
271 if (!(pll_con & PLL_ENABLED))
272 return;
273
274 while (!(pll_con & PLL_LOCKED)) {
275 cpu_relax();
276 pll_con = readl(reg_base + reg);
277 }
278}
279
280static int exynos4_clk_suspend(void)
281{
282 samsung_clk_save(reg_base, exynos4_save_common,
283 ARRAY_SIZE(exynos4_clk_regs));
284 samsung_clk_save(reg_base, exynos4_save_pll,
285 ARRAY_SIZE(exynos4_clk_pll_regs));
286
287 if (exynos4_soc == EXYNOS4210) {
288 samsung_clk_save(reg_base, exynos4_save_soc,
289 ARRAY_SIZE(exynos4210_clk_save));
290 samsung_clk_restore(reg_base, src_mask_suspend_e4210,
291 ARRAY_SIZE(src_mask_suspend_e4210));
292 } else {
293 samsung_clk_save(reg_base, exynos4_save_soc,
294 ARRAY_SIZE(exynos4x12_clk_save));
295 }
296
297 samsung_clk_restore(reg_base, src_mask_suspend,
298 ARRAY_SIZE(src_mask_suspend));
299
300 return 0;
301}
302
303static void exynos4_clk_resume(void)
304{
305 samsung_clk_restore(reg_base, exynos4_save_pll,
306 ARRAY_SIZE(exynos4_clk_pll_regs));
307
308 exynos4_clk_wait_for_pll(EPLL_CON0);
309 exynos4_clk_wait_for_pll(VPLL_CON0);
310
311 samsung_clk_restore(reg_base, exynos4_save_common,
312 ARRAY_SIZE(exynos4_clk_regs));
313
314 if (exynos4_soc == EXYNOS4210)
315 samsung_clk_restore(reg_base, exynos4_save_soc,
316 ARRAY_SIZE(exynos4210_clk_save));
317 else
318 samsung_clk_restore(reg_base, exynos4_save_soc,
319 ARRAY_SIZE(exynos4x12_clk_save));
320}
321
322static struct syscore_ops exynos4_clk_syscore_ops = {
323 .suspend = exynos4_clk_suspend,
324 .resume = exynos4_clk_resume,
325};
326
327static void exynos4_clk_sleep_init(void)
328{
329 exynos4_save_common = samsung_clk_alloc_reg_dump(exynos4_clk_regs,
330 ARRAY_SIZE(exynos4_clk_regs));
331 if (!exynos4_save_common)
332 goto err_warn;
333
334 if (exynos4_soc == EXYNOS4210)
335 exynos4_save_soc = samsung_clk_alloc_reg_dump(
336 exynos4210_clk_save,
337 ARRAY_SIZE(exynos4210_clk_save));
338 else
339 exynos4_save_soc = samsung_clk_alloc_reg_dump(
340 exynos4x12_clk_save,
341 ARRAY_SIZE(exynos4x12_clk_save));
342 if (!exynos4_save_soc)
343 goto err_common;
344
345 exynos4_save_pll = samsung_clk_alloc_reg_dump(exynos4_clk_pll_regs,
346 ARRAY_SIZE(exynos4_clk_pll_regs));
347 if (!exynos4_save_pll)
348 goto err_soc;
349
350 register_syscore_ops(&exynos4_clk_syscore_ops);
351 return;
352
353err_soc:
354 kfree(exynos4_save_soc);
355err_common:
356 kfree(exynos4_save_common);
357err_warn:
358 pr_warn("%s: failed to allocate sleep save data, no sleep support!\n",
359 __func__);
360}
361#else
362static void exynos4_clk_sleep_init(void) {}
363#endif
364
230/* list of all parent clock list */ 365/* list of all parent clock list */
231PNAME(mout_apll_p) = { "fin_pll", "fout_apll", }; 366PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
232PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", }; 367PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", };
@@ -908,12 +1043,13 @@ static unsigned long exynos4_get_xom(void)
908 return xom; 1043 return xom;
909} 1044}
910 1045
911static void __init exynos4_clk_register_finpll(unsigned long xom) 1046static void __init exynos4_clk_register_finpll(void)
912{ 1047{
913 struct samsung_fixed_rate_clock fclk; 1048 struct samsung_fixed_rate_clock fclk;
914 struct clk *clk; 1049 struct clk *clk;
915 unsigned long finpll_f = 24000000; 1050 unsigned long finpll_f = 24000000;
916 char *parent_name; 1051 char *parent_name;
1052 unsigned int xom = exynos4_get_xom();
917 1053
918 parent_name = xom & 1 ? "xusbxti" : "xxti"; 1054 parent_name = xom & 1 ? "xusbxti" : "xxti";
919 clk = clk_get(NULL, parent_name); 1055 clk = clk_get(NULL, parent_name);
@@ -1038,27 +1174,21 @@ static struct samsung_pll_clock exynos4x12_plls[nr_plls] __initdata = {
1038 1174
1039/* register exynos4 clocks */ 1175/* register exynos4 clocks */
1040static void __init exynos4_clk_init(struct device_node *np, 1176static void __init exynos4_clk_init(struct device_node *np,
1041 enum exynos4_soc exynos4_soc, 1177 enum exynos4_soc soc)
1042 void __iomem *reg_base, unsigned long xom)
1043{ 1178{
1179 exynos4_soc = soc;
1180
1044 reg_base = of_iomap(np, 0); 1181 reg_base = of_iomap(np, 0);
1045 if (!reg_base) 1182 if (!reg_base)
1046 panic("%s: failed to map registers\n", __func__); 1183 panic("%s: failed to map registers\n", __func__);
1047 1184
1048 if (exynos4_soc == EXYNOS4210) 1185 samsung_clk_init(np, reg_base, CLK_NR_CLKS);
1049 samsung_clk_init(np, reg_base, CLK_NR_CLKS,
1050 exynos4_clk_regs, ARRAY_SIZE(exynos4_clk_regs),
1051 exynos4210_clk_save, ARRAY_SIZE(exynos4210_clk_save));
1052 else
1053 samsung_clk_init(np, reg_base, CLK_NR_CLKS,
1054 exynos4_clk_regs, ARRAY_SIZE(exynos4_clk_regs),
1055 exynos4x12_clk_save, ARRAY_SIZE(exynos4x12_clk_save));
1056 1186
1057 samsung_clk_of_register_fixed_ext(exynos4_fixed_rate_ext_clks, 1187 samsung_clk_of_register_fixed_ext(exynos4_fixed_rate_ext_clks,
1058 ARRAY_SIZE(exynos4_fixed_rate_ext_clks), 1188 ARRAY_SIZE(exynos4_fixed_rate_ext_clks),
1059 ext_clk_match); 1189 ext_clk_match);
1060 1190
1061 exynos4_clk_register_finpll(xom); 1191 exynos4_clk_register_finpll();
1062 1192
1063 if (exynos4_soc == EXYNOS4210) { 1193 if (exynos4_soc == EXYNOS4210) {
1064 samsung_clk_register_mux(exynos4210_mux_early, 1194 samsung_clk_register_mux(exynos4210_mux_early,
@@ -1125,6 +1255,8 @@ static void __init exynos4_clk_init(struct device_node *np,
1125 samsung_clk_register_alias(exynos4_aliases, 1255 samsung_clk_register_alias(exynos4_aliases,
1126 ARRAY_SIZE(exynos4_aliases)); 1256 ARRAY_SIZE(exynos4_aliases));
1127 1257
1258 exynos4_clk_sleep_init();
1259
1128 pr_info("%s clocks: sclk_apll = %ld, sclk_mpll = %ld\n" 1260 pr_info("%s clocks: sclk_apll = %ld, sclk_mpll = %ld\n"
1129 "\tsclk_epll = %ld, sclk_vpll = %ld, arm_clk = %ld\n", 1261 "\tsclk_epll = %ld, sclk_vpll = %ld, arm_clk = %ld\n",
1130 exynos4_soc == EXYNOS4210 ? "Exynos4210" : "Exynos4x12", 1262 exynos4_soc == EXYNOS4210 ? "Exynos4210" : "Exynos4x12",
@@ -1136,12 +1268,12 @@ static void __init exynos4_clk_init(struct device_node *np,
1136 1268
1137static void __init exynos4210_clk_init(struct device_node *np) 1269static void __init exynos4210_clk_init(struct device_node *np)
1138{ 1270{
1139 exynos4_clk_init(np, EXYNOS4210, NULL, exynos4_get_xom()); 1271 exynos4_clk_init(np, EXYNOS4210);
1140} 1272}
1141CLK_OF_DECLARE(exynos4210_clk, "samsung,exynos4210-clock", exynos4210_clk_init); 1273CLK_OF_DECLARE(exynos4210_clk, "samsung,exynos4210-clock", exynos4210_clk_init);
1142 1274
1143static void __init exynos4412_clk_init(struct device_node *np) 1275static void __init exynos4412_clk_init(struct device_node *np)
1144{ 1276{
1145 exynos4_clk_init(np, EXYNOS4X12, NULL, exynos4_get_xom()); 1277 exynos4_clk_init(np, EXYNOS4X12);
1146} 1278}
1147CLK_OF_DECLARE(exynos4412_clk, "samsung,exynos4412-clock", exynos4412_clk_init); 1279CLK_OF_DECLARE(exynos4412_clk, "samsung,exynos4412-clock", exynos4412_clk_init);
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index ff4beebe1f0b..e7ee4420da81 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -16,6 +16,7 @@
16#include <linux/clk-provider.h> 16#include <linux/clk-provider.h>
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_address.h> 18#include <linux/of_address.h>
19#include <linux/syscore_ops.h>
19 20
20#include "clk.h" 21#include "clk.h"
21 22
@@ -85,6 +86,11 @@ enum exynos5250_plls {
85 nr_plls /* number of PLLs */ 86 nr_plls /* number of PLLs */
86}; 87};
87 88
89static void __iomem *reg_base;
90
91#ifdef CONFIG_PM_SLEEP
92static struct samsung_clk_reg_dump *exynos5250_save;
93
88/* 94/*
89 * list of controller registers to be saved and restored during a 95 * list of controller registers to be saved and restored during a
90 * suspend/resume cycle. 96 * suspend/resume cycle.
@@ -137,6 +143,41 @@ static unsigned long exynos5250_clk_regs[] __initdata = {
137 GATE_IP_ACP, 143 GATE_IP_ACP,
138}; 144};
139 145
146static int exynos5250_clk_suspend(void)
147{
148 samsung_clk_save(reg_base, exynos5250_save,
149 ARRAY_SIZE(exynos5250_clk_regs));
150
151 return 0;
152}
153
154static void exynos5250_clk_resume(void)
155{
156 samsung_clk_restore(reg_base, exynos5250_save,
157 ARRAY_SIZE(exynos5250_clk_regs));
158}
159
160static struct syscore_ops exynos5250_clk_syscore_ops = {
161 .suspend = exynos5250_clk_suspend,
162 .resume = exynos5250_clk_resume,
163};
164
165static void exynos5250_clk_sleep_init(void)
166{
167 exynos5250_save = samsung_clk_alloc_reg_dump(exynos5250_clk_regs,
168 ARRAY_SIZE(exynos5250_clk_regs));
169 if (!exynos5250_save) {
170 pr_warn("%s: failed to allocate sleep save data, no sleep support!\n",
171 __func__);
172 return;
173 }
174
175 register_syscore_ops(&exynos5250_clk_syscore_ops);
176}
177#else
178static void exynos5250_clk_sleep_init(void) {}
179#endif
180
140/* list of all parent clock list */ 181/* list of all parent clock list */
141PNAME(mout_apll_p) = { "fin_pll", "fout_apll", }; 182PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
142PNAME(mout_cpu_p) = { "mout_apll", "mout_mpll", }; 183PNAME(mout_cpu_p) = { "mout_apll", "mout_mpll", };
@@ -645,8 +686,6 @@ static struct of_device_id ext_clk_match[] __initdata = {
645/* register exynox5250 clocks */ 686/* register exynox5250 clocks */
646static void __init exynos5250_clk_init(struct device_node *np) 687static void __init exynos5250_clk_init(struct device_node *np)
647{ 688{
648 void __iomem *reg_base;
649
650 if (np) { 689 if (np) {
651 reg_base = of_iomap(np, 0); 690 reg_base = of_iomap(np, 0);
652 if (!reg_base) 691 if (!reg_base)
@@ -655,9 +694,7 @@ static void __init exynos5250_clk_init(struct device_node *np)
655 panic("%s: unable to determine soc\n", __func__); 694 panic("%s: unable to determine soc\n", __func__);
656 } 695 }
657 696
658 samsung_clk_init(np, reg_base, CLK_NR_CLKS, 697 samsung_clk_init(np, reg_base, CLK_NR_CLKS);
659 exynos5250_clk_regs, ARRAY_SIZE(exynos5250_clk_regs),
660 NULL, 0);
661 samsung_clk_of_register_fixed_ext(exynos5250_fixed_rate_ext_clks, 698 samsung_clk_of_register_fixed_ext(exynos5250_fixed_rate_ext_clks,
662 ARRAY_SIZE(exynos5250_fixed_rate_ext_clks), 699 ARRAY_SIZE(exynos5250_fixed_rate_ext_clks),
663 ext_clk_match); 700 ext_clk_match);
@@ -685,6 +722,8 @@ static void __init exynos5250_clk_init(struct device_node *np)
685 samsung_clk_register_gate(exynos5250_gate_clks, 722 samsung_clk_register_gate(exynos5250_gate_clks,
686 ARRAY_SIZE(exynos5250_gate_clks)); 723 ARRAY_SIZE(exynos5250_gate_clks));
687 724
725 exynos5250_clk_sleep_init();
726
688 pr_info("Exynos5250: clock setup completed, armclk=%ld\n", 727 pr_info("Exynos5250: clock setup completed, armclk=%ld\n",
689 _get_rate("div_arm2")); 728 _get_rate("div_arm2"));
690} 729}
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index ab4f2f7d88ef..60b26819bed5 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -16,6 +16,7 @@
16#include <linux/clk-provider.h> 16#include <linux/clk-provider.h>
17#include <linux/of.h> 17#include <linux/of.h>
18#include <linux/of_address.h> 18#include <linux/of_address.h>
19#include <linux/syscore_ops.h>
19 20
20#include "clk.h" 21#include "clk.h"
21 22
@@ -108,6 +109,11 @@ enum exynos5420_plls {
108 nr_plls /* number of PLLs */ 109 nr_plls /* number of PLLs */
109}; 110};
110 111
112static void __iomem *reg_base;
113
114#ifdef CONFIG_PM_SLEEP
115static struct samsung_clk_reg_dump *exynos5420_save;
116
111/* 117/*
112 * list of controller registers to be saved and restored during a 118 * list of controller registers to be saved and restored during a
113 * suspend/resume cycle. 119 * suspend/resume cycle.
@@ -174,6 +180,41 @@ static unsigned long exynos5420_clk_regs[] __initdata = {
174 DIV_KFC0, 180 DIV_KFC0,
175}; 181};
176 182
183static int exynos5420_clk_suspend(void)
184{
185 samsung_clk_save(reg_base, exynos5420_save,
186 ARRAY_SIZE(exynos5420_clk_regs));
187
188 return 0;
189}
190
191static void exynos5420_clk_resume(void)
192{
193 samsung_clk_restore(reg_base, exynos5420_save,
194 ARRAY_SIZE(exynos5420_clk_regs));
195}
196
197static struct syscore_ops exynos5420_clk_syscore_ops = {
198 .suspend = exynos5420_clk_suspend,
199 .resume = exynos5420_clk_resume,
200};
201
202static void exynos5420_clk_sleep_init(void)
203{
204 exynos5420_save = samsung_clk_alloc_reg_dump(exynos5420_clk_regs,
205 ARRAY_SIZE(exynos5420_clk_regs));
206 if (!exynos5420_save) {
207 pr_warn("%s: failed to allocate sleep save data, no sleep support!\n",
208 __func__);
209 return;
210 }
211
212 register_syscore_ops(&exynos5420_clk_syscore_ops);
213}
214#else
215static void exynos5420_clk_sleep_init(void) {}
216#endif
217
177/* list of all parent clocks */ 218/* list of all parent clocks */
178PNAME(mspll_cpu_p) = { "sclk_cpll", "sclk_dpll", 219PNAME(mspll_cpu_p) = { "sclk_cpll", "sclk_dpll",
179 "sclk_mpll", "sclk_spll" }; 220 "sclk_mpll", "sclk_spll" };
@@ -737,8 +778,6 @@ static struct of_device_id ext_clk_match[] __initdata = {
737/* register exynos5420 clocks */ 778/* register exynos5420 clocks */
738static void __init exynos5420_clk_init(struct device_node *np) 779static void __init exynos5420_clk_init(struct device_node *np)
739{ 780{
740 void __iomem *reg_base;
741
742 if (np) { 781 if (np) {
743 reg_base = of_iomap(np, 0); 782 reg_base = of_iomap(np, 0);
744 if (!reg_base) 783 if (!reg_base)
@@ -747,9 +786,7 @@ static void __init exynos5420_clk_init(struct device_node *np)
747 panic("%s: unable to determine soc\n", __func__); 786 panic("%s: unable to determine soc\n", __func__);
748 } 787 }
749 788
750 samsung_clk_init(np, reg_base, CLK_NR_CLKS, 789 samsung_clk_init(np, reg_base, CLK_NR_CLKS);
751 exynos5420_clk_regs, ARRAY_SIZE(exynos5420_clk_regs),
752 NULL, 0);
753 samsung_clk_of_register_fixed_ext(exynos5420_fixed_rate_ext_clks, 790 samsung_clk_of_register_fixed_ext(exynos5420_fixed_rate_ext_clks,
754 ARRAY_SIZE(exynos5420_fixed_rate_ext_clks), 791 ARRAY_SIZE(exynos5420_fixed_rate_ext_clks),
755 ext_clk_match); 792 ext_clk_match);
@@ -765,5 +802,7 @@ static void __init exynos5420_clk_init(struct device_node *np)
765 ARRAY_SIZE(exynos5420_div_clks)); 802 ARRAY_SIZE(exynos5420_div_clks));
766 samsung_clk_register_gate(exynos5420_gate_clks, 803 samsung_clk_register_gate(exynos5420_gate_clks,
767 ARRAY_SIZE(exynos5420_gate_clks)); 804 ARRAY_SIZE(exynos5420_gate_clks));
805
806 exynos5420_clk_sleep_init();
768} 807}
769CLK_OF_DECLARE(exynos5420_clk, "samsung,exynos5420-clock", exynos5420_clk_init); 808CLK_OF_DECLARE(exynos5420_clk, "samsung,exynos5420-clock", exynos5420_clk_init);
diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c
index cbc15b56891d..2bfad5a993d0 100644
--- a/drivers/clk/samsung/clk-exynos5440.c
+++ b/drivers/clk/samsung/clk-exynos5440.c
@@ -101,7 +101,7 @@ static void __init exynos5440_clk_init(struct device_node *np)
101 return; 101 return;
102 } 102 }
103 103
104 samsung_clk_init(np, reg_base, CLK_NR_CLKS, NULL, 0, NULL, 0); 104 samsung_clk_init(np, reg_base, CLK_NR_CLKS);
105 samsung_clk_of_register_fixed_ext(exynos5440_fixed_rate_ext_clks, 105 samsung_clk_of_register_fixed_ext(exynos5440_fixed_rate_ext_clks,
106 ARRAY_SIZE(exynos5440_fixed_rate_ext_clks), ext_clk_match); 106 ARRAY_SIZE(exynos5440_fixed_rate_ext_clks), ext_clk_match);
107 107
diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c
index 8e27aee6887e..8bda658137a8 100644
--- a/drivers/clk/samsung/clk-s3c64xx.c
+++ b/drivers/clk/samsung/clk-s3c64xx.c
@@ -13,6 +13,7 @@
13#include <linux/clk-provider.h> 13#include <linux/clk-provider.h>
14#include <linux/of.h> 14#include <linux/of.h>
15#include <linux/of_address.h> 15#include <linux/of_address.h>
16#include <linux/syscore_ops.h>
16 17
17#include <dt-bindings/clock/samsung,s3c64xx-clock.h> 18#include <dt-bindings/clock/samsung,s3c64xx-clock.h>
18 19
@@ -61,6 +62,13 @@ enum s3c64xx_plls {
61 apll, mpll, epll, 62 apll, mpll, epll,
62}; 63};
63 64
65static void __iomem *reg_base;
66static bool is_s3c6400;
67
68#ifdef CONFIG_PM_SLEEP
69static struct samsung_clk_reg_dump *s3c64xx_save_common;
70static struct samsung_clk_reg_dump *s3c64xx_save_soc;
71
64/* 72/*
65 * List of controller registers to be saved and restored during 73 * List of controller registers to be saved and restored during
66 * a suspend/resume cycle. 74 * a suspend/resume cycle.
@@ -87,6 +95,60 @@ static unsigned long s3c6410_clk_regs[] __initdata = {
87 MEM0_GATE, 95 MEM0_GATE,
88}; 96};
89 97
98static int s3c64xx_clk_suspend(void)
99{
100 samsung_clk_save(reg_base, s3c64xx_save_common,
101 ARRAY_SIZE(s3c64xx_clk_regs));
102
103 if (!is_s3c6400)
104 samsung_clk_save(reg_base, s3c64xx_save_soc,
105 ARRAY_SIZE(s3c6410_clk_regs));
106
107 return 0;
108}
109
110static void s3c64xx_clk_resume(void)
111{
112 samsung_clk_restore(reg_base, s3c64xx_save_common,
113 ARRAY_SIZE(s3c64xx_clk_regs));
114
115 if (!is_s3c6400)
116 samsung_clk_restore(reg_base, s3c64xx_save_soc,
117 ARRAY_SIZE(s3c6410_clk_regs));
118}
119
120static struct syscore_ops s3c64xx_clk_syscore_ops = {
121 .suspend = s3c64xx_clk_suspend,
122 .resume = s3c64xx_clk_resume,
123};
124
125static void s3c64xx_clk_sleep_init(void)
126{
127 s3c64xx_save_common = samsung_clk_alloc_reg_dump(s3c64xx_clk_regs,
128 ARRAY_SIZE(s3c64xx_clk_regs));
129 if (!s3c64xx_save_common)
130 goto err_warn;
131
132 if (!is_s3c6400) {
133 s3c64xx_save_soc = samsung_clk_alloc_reg_dump(s3c6410_clk_regs,
134 ARRAY_SIZE(s3c6410_clk_regs));
135 if (!s3c64xx_save_soc)
136 goto err_soc;
137 }
138
139 register_syscore_ops(&s3c64xx_clk_syscore_ops);
140 return;
141
142err_soc:
143 kfree(s3c64xx_save_common);
144err_warn:
145 pr_warn("%s: failed to allocate sleep save data, no sleep support!\n",
146 __func__);
147}
148#else
149static void s3c64xx_clk_sleep_init(void) {}
150#endif
151
90/* List of parent clocks common for all S3C64xx SoCs. */ 152/* List of parent clocks common for all S3C64xx SoCs. */
91PNAME(spi_mmc_p) = { "mout_epll", "dout_mpll", "fin_pll", "clk27m" }; 153PNAME(spi_mmc_p) = { "mout_epll", "dout_mpll", "fin_pll", "clk27m" };
92PNAME(uart_p) = { "mout_epll", "dout_mpll" }; 154PNAME(uart_p) = { "mout_epll", "dout_mpll" };
@@ -391,11 +453,11 @@ static void __init s3c64xx_clk_register_fixed_ext(unsigned long fin_pll_f,
391 453
392/* Register s3c64xx clocks. */ 454/* Register s3c64xx clocks. */
393void __init s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f, 455void __init s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f,
394 unsigned long xusbxti_f, bool is_s3c6400, 456 unsigned long xusbxti_f, bool s3c6400,
395 void __iomem *reg_base) 457 void __iomem *base)
396{ 458{
397 unsigned long *soc_regs = NULL; 459 reg_base = base;
398 unsigned long nr_soc_regs = 0; 460 is_s3c6400 = s3c6400;
399 461
400 if (np) { 462 if (np) {
401 reg_base = of_iomap(np, 0); 463 reg_base = of_iomap(np, 0);
@@ -403,13 +465,7 @@ void __init s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f,
403 panic("%s: failed to map registers\n", __func__); 465 panic("%s: failed to map registers\n", __func__);
404 } 466 }
405 467
406 if (!is_s3c6400) { 468 samsung_clk_init(np, reg_base, NR_CLKS);
407 soc_regs = s3c6410_clk_regs;
408 nr_soc_regs = ARRAY_SIZE(s3c6410_clk_regs);
409 }
410
411 samsung_clk_init(np, reg_base, NR_CLKS, s3c64xx_clk_regs,
412 ARRAY_SIZE(s3c64xx_clk_regs), soc_regs, nr_soc_regs);
413 469
414 /* Register external clocks. */ 470 /* Register external clocks. */
415 if (!np) 471 if (!np)
@@ -452,6 +508,7 @@ void __init s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f,
452 508
453 samsung_clk_register_alias(s3c64xx_clock_aliases, 509 samsung_clk_register_alias(s3c64xx_clock_aliases,
454 ARRAY_SIZE(s3c64xx_clock_aliases)); 510 ARRAY_SIZE(s3c64xx_clock_aliases));
511 s3c64xx_clk_sleep_init();
455 512
456 pr_info("%s clocks: apll = %lu, mpll = %lu\n" 513 pr_info("%s clocks: apll = %lu, mpll = %lu\n"
457 "\tepll = %lu, arm_clk = %lu\n", 514 "\tepll = %lu, arm_clk = %lu\n",
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index f503f32e2f80..91bec3ebdc8f 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -21,64 +21,45 @@ static void __iomem *reg_base;
21static struct clk_onecell_data clk_data; 21static struct clk_onecell_data clk_data;
22#endif 22#endif
23 23
24#ifdef CONFIG_PM_SLEEP 24void samsung_clk_save(void __iomem *base,
25static struct samsung_clk_reg_dump *reg_dump; 25 struct samsung_clk_reg_dump *rd,
26static unsigned long nr_reg_dump; 26 unsigned int num_regs)
27
28static int samsung_clk_suspend(void)
29{ 27{
30 struct samsung_clk_reg_dump *rd = reg_dump; 28 for (; num_regs > 0; --num_regs, ++rd)
31 unsigned long i; 29 rd->value = readl(base + rd->offset);
32 30}
33 for (i = 0; i < nr_reg_dump; i++, rd++)
34 rd->value = __raw_readl(reg_base + rd->offset);
35 31
36 return 0; 32void samsung_clk_restore(void __iomem *base,
33 const struct samsung_clk_reg_dump *rd,
34 unsigned int num_regs)
35{
36 for (; num_regs > 0; --num_regs, ++rd)
37 writel(rd->value, base + rd->offset);
37} 38}
38 39
39static void samsung_clk_resume(void) 40struct samsung_clk_reg_dump *samsung_clk_alloc_reg_dump(
41 const unsigned long *rdump,
42 unsigned long nr_rdump)
40{ 43{
41 struct samsung_clk_reg_dump *rd = reg_dump; 44 struct samsung_clk_reg_dump *rd;
42 unsigned long i; 45 unsigned int i;
43 46
44 for (i = 0; i < nr_reg_dump; i++, rd++) 47 rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
45 __raw_writel(rd->value, reg_base + rd->offset); 48 if (!rd)
46} 49 return NULL;
50
51 for (i = 0; i < nr_rdump; ++i)
52 rd[i].offset = rdump[i];
47 53
48static struct syscore_ops samsung_clk_syscore_ops = { 54 return rd;
49 .suspend = samsung_clk_suspend, 55}
50 .resume = samsung_clk_resume,
51};
52#endif /* CONFIG_PM_SLEEP */
53 56
54/* setup the essentials required to support clock lookup using ccf */ 57/* setup the essentials required to support clock lookup using ccf */
55void __init samsung_clk_init(struct device_node *np, void __iomem *base, 58void __init samsung_clk_init(struct device_node *np, void __iomem *base,
56 unsigned long nr_clks, unsigned long *rdump, 59 unsigned long nr_clks)
57 unsigned long nr_rdump, unsigned long *soc_rdump,
58 unsigned long nr_soc_rdump)
59{ 60{
60 reg_base = base; 61 reg_base = base;
61 62
62#ifdef CONFIG_PM_SLEEP
63 if (rdump && nr_rdump) {
64 unsigned int idx;
65 reg_dump = kzalloc(sizeof(struct samsung_clk_reg_dump)
66 * (nr_rdump + nr_soc_rdump), GFP_KERNEL);
67 if (!reg_dump) {
68 pr_err("%s: memory alloc for register dump failed\n",
69 __func__);
70 return;
71 }
72
73 for (idx = 0; idx < nr_rdump; idx++)
74 reg_dump[idx].offset = rdump[idx];
75 for (idx = 0; idx < nr_soc_rdump; idx++)
76 reg_dump[nr_rdump + idx].offset = soc_rdump[idx];
77 nr_reg_dump = nr_rdump + nr_soc_rdump;
78 register_syscore_ops(&samsung_clk_syscore_ops);
79 }
80#endif
81
82 clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL); 63 clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL);
83 if (!clk_table) 64 if (!clk_table)
84 panic("could not allocate clock lookup table\n"); 65 panic("could not allocate clock lookup table\n");
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 31b4174e7a5b..c7141ba826e0 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -313,9 +313,7 @@ struct samsung_pll_clock {
313 _lock, _con, _rtable, _alias) 313 _lock, _con, _rtable, _alias)
314 314
315extern void __init samsung_clk_init(struct device_node *np, void __iomem *base, 315extern void __init samsung_clk_init(struct device_node *np, void __iomem *base,
316 unsigned long nr_clks, unsigned long *rdump, 316 unsigned long nr_clks);
317 unsigned long nr_rdump, unsigned long *soc_rdump,
318 unsigned long nr_soc_rdump);
319extern void __init samsung_clk_of_register_fixed_ext( 317extern void __init samsung_clk_of_register_fixed_ext(
320 struct samsung_fixed_rate_clock *fixed_rate_clk, 318 struct samsung_fixed_rate_clock *fixed_rate_clk,
321 unsigned int nr_fixed_rate_clk, 319 unsigned int nr_fixed_rate_clk,
@@ -340,4 +338,14 @@ extern void __init samsung_clk_register_pll(struct samsung_pll_clock *pll_list,
340 338
341extern unsigned long _get_rate(const char *clk_name); 339extern unsigned long _get_rate(const char *clk_name);
342 340
341extern void samsung_clk_save(void __iomem *base,
342 struct samsung_clk_reg_dump *rd,
343 unsigned int num_regs);
344extern void samsung_clk_restore(void __iomem *base,
345 const struct samsung_clk_reg_dump *rd,
346 unsigned int num_regs);
347extern struct samsung_clk_reg_dump *samsung_clk_alloc_reg_dump(
348 const unsigned long *rdump,
349 unsigned long nr_rdump);
350
343#endif /* __SAMSUNG_CLK_H */ 351#endif /* __SAMSUNG_CLK_H */