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-rw-r--r--Documentation/devicetree/bindings/ata/exynos-sata-phy.txt14
-rw-r--r--Documentation/devicetree/bindings/ata/exynos-sata.txt25
-rw-r--r--Documentation/devicetree/bindings/phy/samsung-phy.txt36
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi5
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi13
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts21
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi14
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi26
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts21
-rw-r--r--arch/arm/boot/dts/exynos5250-smdk5250.dts21
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi26
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi9
12 files changed, 175 insertions, 56 deletions
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
deleted file mode 100644
index 37824fac688e..000000000000
--- a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
+++ /dev/null
@@ -1,14 +0,0 @@
1* Samsung SATA PHY Controller
2
3SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
4Each SATA PHY controller should have its own node.
5
6Required properties:
7- compatible : compatible list, contains "samsung,exynos5-sata-phy"
8- reg : <registers mapping>
9
10Example:
11 sata@ffe07000 {
12 compatible = "samsung,exynos5-sata-phy";
13 reg = <0xffe07000 0x1000>;
14 };
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt b/Documentation/devicetree/bindings/ata/exynos-sata.txt
index 0849f1025e34..b2adb1f3090e 100644
--- a/Documentation/devicetree/bindings/ata/exynos-sata.txt
+++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt
@@ -4,14 +4,21 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
4Each SATA controller should have its own node. 4Each SATA controller should have its own node.
5 5
6Required properties: 6Required properties:
7- compatible : compatible list, contains "samsung,exynos5-sata" 7- compatible : compatible list, contains "samsung,exynos5-sata"
8- interrupts : <interrupt mapping for SATA IRQ> 8- interrupts : <interrupt mapping for SATA IRQ>
9- reg : <registers mapping> 9- reg : <registers mapping>
10- samsung,sata-freq : <frequency in MHz> 10- samsung,sata-freq : <frequency in MHz>
11- phys : as mentioned in phy-bindings.txt
12- phy-names : as mentioned in phy-bindings.txt
11 13
12Example: 14Example:
13 sata@ffe08000 { 15 sata@122f0000 {
14 compatible = "samsung,exynos5-sata"; 16 compatible = "snps,dwc-ahci";
15 reg = <0xffe08000 0x1000>; 17 samsung,sata-freq = <66>;
16 interrupts = <115>; 18 reg = <0x122f0000 0x1ff>;
17 }; 19 interrupts = <0 115 0>;
20 clocks = <&clock 277>, <&clock 143>;
21 clock-names = "sata", "sclk_sata";
22 phys = <&sata_phy>;
23 phy-names = "sata-phy";
24 };
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index c0fccaa1671e..a937f75d062c 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -20,3 +20,39 @@ Required properties:
20- compatible : should be "samsung,exynos5250-dp-video-phy"; 20- compatible : should be "samsung,exynos5250-dp-video-phy";
21- reg : offset and length of the Display Port PHY register set; 21- reg : offset and length of the Display Port PHY register set;
22- #phy-cells : from the generic PHY bindings, must be 0; 22- #phy-cells : from the generic PHY bindings, must be 0;
23
24Samsung SATA PHY Controller
25---------------------------
26
27SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
28Each SATA PHY controller should have its own node.
29
30Required properties:
31- compatible : compatible list, contains "samsung,exynos5250-sata-phy"
32- reg : offset and length of the SATA PHY register set;
33- #phy-cells : from the generic phy bindings;
34
35Example:
36 sata_phy: sata-phy@12170000 {
37 compatible = "samsung,exynos5250-sata-phy";
38 reg = <0x12170000 0x1ff>;
39 clocks = <&clock 287>;
40 clock-names = "sata_phyctrl";
41 #phy-cells = <0>;
42 samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
43 samsung,syscon-phandle = <&pmu_syscon>;
44 };
45
46Device-Tree bindings for sataphy i2c client driver
47--------------------------------------------------
48
49Required properties:
50compatible: Should be "samsung,exynos-sataphy-i2c"
51- reg: I2C address of the sataphy i2c device.
52
53Example:
54
55 sata_phy_i2c:sata-phy@38 {
56 compatible = "samsung,exynos-sataphy-i2c";
57 reg = <0x38>;
58 };
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 28b5ec79f339..0401f4dba2a2 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -86,6 +86,11 @@
86 reg = <0x10023CE0 0x20>; 86 reg = <0x10023CE0 0x20>;
87 }; 87 };
88 88
89 pd_gps_alive: gps-alive-power-domain@10023D00 {
90 compatible = "samsung,exynos4210-pd";
91 reg = <0x10023D00 0x20>;
92 };
93
89 gic: interrupt-controller@10490000 { 94 gic: interrupt-controller@10490000 {
90 compatible = "arm,cortex-a9-gic"; 95 compatible = "arm,cortex-a9-gic";
91 #interrupt-cells = <3>; 96 #interrupt-cells = <3>;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index 94a43f9a05e2..ceefc711793c 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -22,16 +22,11 @@
22/ { 22/ {
23 compatible = "samsung,exynos4212"; 23 compatible = "samsung,exynos4212";
24 24
25 gic: interrupt-controller@10490000 { 25 combiner: interrupt-controller@10440000 {
26 cpu-offset = <0x8000>; 26 samsung,combiner-nr = <18>;
27 }; 27 };
28 28
29 interrupt-controller@10440000 { 29 gic: interrupt-controller@10490000 {
30 samsung,combiner-nr = <18>; 30 cpu-offset = <0x8000>;
31 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
32 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
33 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
34 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
35 <0 107 0>, <0 108 0>;
36 }; 31 };
37}; 32};
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 4f851ccf40eb..322850640f43 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -106,6 +106,11 @@
106 }; 106 };
107 }; 107 };
108 108
109 adc: adc@126C0000 {
110 vdd-supply = <&ldo3_reg>;
111 status = "okay";
112 };
113
109 i2c@13890000 { 114 i2c@13890000 {
110 samsung,i2c-sda-delay = <100>; 115 samsung,i2c-sda-delay = <100>;
111 samsung,i2c-slave-addr = <0x10>; 116 samsung,i2c-slave-addr = <0x10>;
@@ -589,4 +594,20 @@
589 }; 594 };
590 }; 595 };
591 }; 596 };
597
598 thermistor-ap@0 {
599 compatible = "ntc,ncp15wb473";
600 pullup-uv = <1800000>; /* VCC_1.8V_AP */
601 pullup-ohm = <100000>; /* 100K */
602 pulldown-ohm = <100000>; /* 100K */
603 io-channels = <&adc 1>; /* AP temperature */
604 };
605
606 thermistor-battery@1 {
607 compatible = "ntc,ncp15wb473";
608 pullup-uv = <1800000>; /* VCC_1.8V_AP */
609 pullup-ohm = <100000>; /* 100K */
610 pulldown-ohm = <100000>; /* 100K */
611 io-channels = <&adc 2>; /* Battery temperature */
612 };
592}; 613};
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 87b339c739de..a40b6e20e92f 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -22,17 +22,11 @@
22/ { 22/ {
23 compatible = "samsung,exynos4412"; 23 compatible = "samsung,exynos4412";
24 24
25 gic: interrupt-controller@10490000 { 25 combiner: interrupt-controller@10440000 {
26 cpu-offset = <0x4000>;
27 };
28
29 interrupt-controller@10440000 {
30 samsung,combiner-nr = <20>; 26 samsung,combiner-nr = <20>;
31 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
32 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
33 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
34 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
35 <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
36 }; 27 };
37 28
29 gic: interrupt-controller@10490000 {
30 cpu-offset = <0x4000>;
31 };
38}; 32};
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index e0eb6bb64c34..c4a9306f8529 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -31,6 +31,12 @@
31 mshc0 = &mshc_0; 31 mshc0 = &mshc_0;
32 }; 32 };
33 33
34 pmu {
35 compatible = "arm,cortex-a9-pmu";
36 interrupt-parent = <&combiner>;
37 interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
38 };
39
34 pd_isp: isp-power-domain@10023CA0 { 40 pd_isp: isp-power-domain@10023CA0 {
35 compatible = "samsung,exynos4210-pd"; 41 compatible = "samsung,exynos4210-pd";
36 reg = <0x10023CA0 0x20>; 42 reg = <0x10023CA0 0x20>;
@@ -62,6 +68,14 @@
62 }; 68 };
63 }; 69 };
64 70
71 combiner: interrupt-controller@10440000 {
72 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
73 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
74 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
75 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
76 <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
77 };
78
65 pinctrl_0: pinctrl@11400000 { 79 pinctrl_0: pinctrl@11400000 {
66 compatible = "samsung,exynos4x12-pinctrl"; 80 compatible = "samsung,exynos4x12-pinctrl";
67 reg = <0x11400000 0x1000>; 81 reg = <0x11400000 0x1000>;
@@ -80,6 +94,18 @@
80 }; 94 };
81 }; 95 };
82 96
97 adc: adc@126C0000 {
98 compatible = "samsung,exynos-adc-v1";
99 reg = <0x126C0000 0x100>, <0x10020718 0x4>;
100 interrupt-parent = <&combiner>;
101 interrupts = <10 3>;
102 clocks = <&clock CLK_TSADC>;
103 clock-names = "adc";
104 #io-channel-cells = <1>;
105 io-channel-ranges;
106 status = "disabled";
107 };
108
83 pinctrl_2: pinctrl@03860000 { 109 pinctrl_2: pinctrl@03860000 {
84 compatible = "samsung,exynos4x12-pinctrl"; 110 compatible = "samsung,exynos4x12-pinctrl";
85 reg = <0x03860000 0x1000>; 111 reg = <0x03860000 0x1000>;
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 56c40783c3eb..9a78d96f8477 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -374,6 +374,27 @@
374 }; 374 };
375 }; 375 };
376 376
377 i2c@121D0000 {
378 status = "okay";
379 samsung,i2c-sda-delay = <100>;
380 samsung,i2c-max-bus-freq = <40000>;
381 samsung,i2c-slave-addr = <0x38>;
382
383 sata_phy_i2c:sata-phy@38 {
384 compatible = "samsung,exynos-sataphy-i2c";
385 reg = <0x38>;
386 };
387 };
388
389 sata@122F0000 {
390 status = "okay";
391 };
392
393 sata-phy@12170000 {
394 status = "okay";
395 samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
396 };
397
377 mmc_0: mmc@12200000 { 398 mmc_0: mmc@12200000 {
378 status = "okay"; 399 status = "okay";
379 num-slots = <1>; 400 num-slots = <1>;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index f76946e97e6a..140de8563e94 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -242,16 +242,12 @@
242 samsung,i2c-slave-addr = <0x38>; 242 samsung,i2c-slave-addr = <0x38>;
243 status = "okay"; 243 status = "okay";
244 244
245 sata-phy { 245 sata_phy_i2c:sata-phy@38 {
246 compatible = "samsung,sata-phy"; 246 compatible = "samsung,exynos-sataphy-i2c";
247 reg = <0x38>; 247 reg = <0x38>;
248 }; 248 };
249 }; 249 };
250 250
251 sata@122F0000 {
252 samsung,sata-freq = <66>;
253 };
254
255 i2c@12C80000 { 251 i2c@12C80000 {
256 samsung,i2c-sda-delay = <100>; 252 samsung,i2c-sda-delay = <100>;
257 samsung,i2c-max-bus-freq = <66000>; 253 samsung,i2c-max-bus-freq = <66000>;
@@ -274,6 +270,15 @@
274 }; 270 };
275 }; 271 };
276 272
273 sata@122F0000 {
274 status = "okay";
275 };
276
277 sata-phy@12170000 {
278 status = "okay";
279 samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
280 };
281
277 mmc@12200000 { 282 mmc@12200000 {
278 status = "okay"; 283 status = "okay";
279 num-slots = <1>; 284 num-slots = <1>;
@@ -310,10 +315,6 @@
310 }; 315 };
311 }; 316 };
312 317
313 spi_0: spi@12d20000 {
314 status = "disabled";
315 };
316
317 spi_1: spi@12d30000 { 318 spi_1: spi@12d30000 {
318 status = "okay"; 319 status = "okay";
319 320
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 987cfbe9634b..fdeed7c29ac9 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -47,6 +47,7 @@
47 i2c6 = &i2c_6; 47 i2c6 = &i2c_6;
48 i2c7 = &i2c_7; 48 i2c7 = &i2c_7;
49 i2c8 = &i2c_8; 49 i2c8 = &i2c_8;
50 i2c9 = &i2c_9;
50 pinctrl0 = &pinctrl_0; 51 pinctrl0 = &pinctrl_0;
51 pinctrl1 = &pinctrl_1; 52 pinctrl1 = &pinctrl_1;
52 pinctrl2 = &pinctrl_2; 53 pinctrl2 = &pinctrl_2;
@@ -235,16 +236,25 @@
235 }; 236 };
236 237
237 sata@122F0000 { 238 sata@122F0000 {
238 compatible = "samsung,exynos5-sata-ahci"; 239 compatible = "snps,dwc-ahci";
240 samsung,sata-freq = <66>;
239 reg = <0x122F0000 0x1ff>; 241 reg = <0x122F0000 0x1ff>;
240 interrupts = <0 115 0>; 242 interrupts = <0 115 0>;
241 clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>; 243 clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
242 clock-names = "sata", "sclk_sata"; 244 clock-names = "sata", "sclk_sata";
245 phys = <&sata_phy>;
246 phy-names = "sata-phy";
247 status = "disabled";
243 }; 248 };
244 249
245 sata-phy@12170000 { 250 sata_phy: sata-phy@12170000 {
246 compatible = "samsung,exynos5-sata-phy"; 251 compatible = "samsung,exynos5250-sata-phy";
247 reg = <0x12170000 0x1ff>; 252 reg = <0x12170000 0x1ff>;
253 clocks = <&clock 287>;
254 clock-names = "sata_phyctrl";
255 #phy-cells = <0>;
256 samsung,syscon-phandle = <&pmu_system_controller>;
257 status = "disabled";
248 }; 258 };
249 259
250 i2c_0: i2c@12C60000 { 260 i2c_0: i2c@12C60000 {
@@ -362,7 +372,7 @@
362 status = "disabled"; 372 status = "disabled";
363 }; 373 };
364 374
365 i2c@121D0000 { 375 i2c_9: i2c@121D0000 {
366 compatible = "samsung,exynos5-sata-phy-i2c"; 376 compatible = "samsung,exynos5-sata-phy-i2c";
367 reg = <0x121D0000 0x100>; 377 reg = <0x121D0000 0x100>;
368 #address-cells = <1>; 378 #address-cells = <1>;
@@ -718,4 +728,12 @@
718 io-channel-ranges; 728 io-channel-ranges;
719 status = "disabled"; 729 status = "disabled";
720 }; 730 };
731
732 sss@10830000 {
733 compatible = "samsung,exynos4210-secss";
734 reg = <0x10830000 0x10000>;
735 interrupts = <0 112 0>;
736 clocks = <&clock 348>;
737 clock-names = "secss";
738 };
721}; 739};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index e3329afbd8c4..82071154eb84 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -723,4 +723,13 @@
723 clock-names = "watchdog"; 723 clock-names = "watchdog";
724 samsung,syscon-phandle = <&pmu_system_controller>; 724 samsung,syscon-phandle = <&pmu_system_controller>;
725 }; 725 };
726
727 sss@10830000 {
728 compatible = "samsung,exynos4210-secss";
729 reg = <0x10830000 0x10000>;
730 interrupts = <0 112 0>;
731 clocks = <&clock 471>;
732 clock-names = "secss";
733 samsung,power-domain = <&g2d_pd>;
734 };
726}; 735};
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-03 08:03:39 -0500