diff options
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c | 20 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/disp/hdminve0.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_display.c | 11 |
5 files changed, 30 insertions, 22 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c b/drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c index 8b4e06abe533..fe9ef5894dd4 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c | |||
@@ -26,6 +26,8 @@ | |||
26 | #include <nvif/unpack.h> | 26 | #include <nvif/unpack.h> |
27 | #include <nvif/class.h> | 27 | #include <nvif/class.h> |
28 | 28 | ||
29 | #include <subdev/timer.h> | ||
30 | |||
29 | #include "nv50.h" | 31 | #include "nv50.h" |
30 | 32 | ||
31 | int | 33 | int |
@@ -46,16 +48,21 @@ nva3_hda_eld(NV50_DISP_MTHD_V1) | |||
46 | return ret; | 48 | return ret; |
47 | 49 | ||
48 | if (size && args->v0.data[0]) { | 50 | if (size && args->v0.data[0]) { |
51 | if (outp->info.type == DCB_OUTPUT_DP) { | ||
52 | nv_mask(priv, 0x61c1e0 + soff, 0x8000000d, 0x80000001); | ||
53 | nv_wait(priv, 0x61c1e0 + soff, 0x80000000, 0x00000000); | ||
54 | } | ||
49 | for (i = 0; i < size; i++) | 55 | for (i = 0; i < size; i++) |
50 | nv_wr32(priv, 0x61c440 + soff, (i << 8) | args->v0.data[0]); | 56 | nv_wr32(priv, 0x61c440 + soff, (i << 8) | args->v0.data[0]); |
51 | for (; i < 0x60; i++) | 57 | for (; i < 0x60; i++) |
52 | nv_wr32(priv, 0x61c440 + soff, (i << 8)); | 58 | nv_wr32(priv, 0x61c440 + soff, (i << 8)); |
53 | nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000003); | 59 | nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000003); |
54 | } else | ||
55 | if (size) { | ||
56 | nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000001); | ||
57 | } else { | 60 | } else { |
58 | nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000000); | 61 | if (outp->info.type == DCB_OUTPUT_DP) { |
62 | nv_mask(priv, 0x61c1e0 + soff, 0x80000001, 0x80000000); | ||
63 | nv_wait(priv, 0x61c1e0 + soff, 0x80000000, 0x00000000); | ||
64 | } | ||
65 | nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000000 | !!size); | ||
59 | } | 66 | } |
60 | 67 | ||
61 | return 0; | 68 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c b/drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c index baf558fc12fb..1d4e8432d857 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/hdanvd0.c | |||
@@ -26,10 +26,7 @@ | |||
26 | #include <nvif/unpack.h> | 26 | #include <nvif/unpack.h> |
27 | #include <nvif/class.h> | 27 | #include <nvif/class.h> |
28 | 28 | ||
29 | #include <subdev/bios.h> | 29 | #include <subdev/timer.h> |
30 | #include <subdev/bios/dcb.h> | ||
31 | #include <subdev/bios/dp.h> | ||
32 | #include <subdev/bios/init.h> | ||
33 | 30 | ||
34 | #include "nv50.h" | 31 | #include "nv50.h" |
35 | 32 | ||
@@ -40,6 +37,7 @@ nvd0_hda_eld(NV50_DISP_MTHD_V1) | |||
40 | struct nv50_disp_sor_hda_eld_v0 v0; | 37 | struct nv50_disp_sor_hda_eld_v0 v0; |
41 | } *args = data; | 38 | } *args = data; |
42 | const u32 soff = outp->or * 0x030; | 39 | const u32 soff = outp->or * 0x030; |
40 | const u32 hoff = head * 0x800; | ||
43 | int ret, i; | 41 | int ret, i; |
44 | 42 | ||
45 | nv_ioctl(object, "disp sor hda eld size %d\n", size); | 43 | nv_ioctl(object, "disp sor hda eld size %d\n", size); |
@@ -51,16 +49,22 @@ nvd0_hda_eld(NV50_DISP_MTHD_V1) | |||
51 | return ret; | 49 | return ret; |
52 | 50 | ||
53 | if (size && args->v0.data[0]) { | 51 | if (size && args->v0.data[0]) { |
52 | if (outp->info.type == DCB_OUTPUT_DP) { | ||
53 | nv_mask(priv, 0x616618 + hoff, 0x8000000c, 0x80000001); | ||
54 | nv_wait(priv, 0x616618 + hoff, 0x80000000, 0x00000000); | ||
55 | } | ||
56 | nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); | ||
54 | for (i = 0; i < size; i++) | 57 | for (i = 0; i < size; i++) |
55 | nv_wr32(priv, 0x10ec00 + soff, (i << 8) | args->v0.data[i]); | 58 | nv_wr32(priv, 0x10ec00 + soff, (i << 8) | args->v0.data[i]); |
56 | for (; i < 0x60; i++) | 59 | for (; i < 0x60; i++) |
57 | nv_wr32(priv, 0x10ec00 + soff, (i << 8)); | 60 | nv_wr32(priv, 0x10ec00 + soff, (i << 8)); |
58 | nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000003); | 61 | nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000003); |
59 | } else | ||
60 | if (size) { | ||
61 | nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000001); | ||
62 | } else { | 62 | } else { |
63 | nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000000); | 63 | if (outp->info.type == DCB_OUTPUT_DP) { |
64 | nv_mask(priv, 0x616618 + hoff, 0x80000001, 0x80000000); | ||
65 | nv_wait(priv, 0x616618 + hoff, 0x80000000, 0x00000000); | ||
66 | } | ||
67 | nv_mask(priv, 0x10ec10 + soff, 0x80000003, 0x80000000 | !!size); | ||
64 | } | 68 | } |
65 | 69 | ||
66 | return 0; | 70 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c b/drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c index 3106d295b48d..bac4fc4570f0 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/hdminvd0.c | |||
@@ -75,8 +75,5 @@ nvd0_hdmi_ctrl(NV50_DISP_MTHD_V1) | |||
75 | 75 | ||
76 | /* HDMI_CTRL */ | 76 | /* HDMI_CTRL */ |
77 | nv_mask(priv, 0x616798 + hoff, 0x401f007f, ctrl); | 77 | nv_mask(priv, 0x616798 + hoff, 0x401f007f, ctrl); |
78 | |||
79 | /* NFI, audio doesn't work without it though.. */ | ||
80 | nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); | ||
81 | return 0; | 78 | return 0; |
82 | } | 79 | } |
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/hdminve0.c b/drivers/gpu/drm/nouveau/core/engine/disp/hdminve0.c index 7bf632a3c825..528d14ec2f7f 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/hdminve0.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/hdminve0.c | |||
@@ -79,8 +79,5 @@ nve0_hdmi_ctrl(NV50_DISP_MTHD_V1) | |||
79 | 79 | ||
80 | /* HDMI_CTRL */ | 80 | /* HDMI_CTRL */ |
81 | nv_mask(priv, 0x616798 + hoff, 0x401f007f, ctrl); | 81 | nv_mask(priv, 0x616798 + hoff, 0x401f007f, ctrl); |
82 | |||
83 | /* NFI, audio doesn't work without it though.. */ | ||
84 | nv_mask(priv, 0x616548 + hoff, 0x00000070, 0x00000000); | ||
85 | return 0; | 82 | return 0; |
86 | } | 83 | } |
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index 8301a448933b..fdb3e1adea1e 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c | |||
@@ -1656,6 +1656,7 @@ static void | |||
1656 | nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) | 1656 | nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) |
1657 | { | 1657 | { |
1658 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); | 1658 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
1659 | struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); | ||
1659 | struct nouveau_connector *nv_connector; | 1660 | struct nouveau_connector *nv_connector; |
1660 | struct nv50_disp *disp = nv50_disp(encoder->dev); | 1661 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
1661 | struct __packed { | 1662 | struct __packed { |
@@ -1668,7 +1669,8 @@ nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) | |||
1668 | .base.mthd.version = 1, | 1669 | .base.mthd.version = 1, |
1669 | .base.mthd.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, | 1670 | .base.mthd.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, |
1670 | .base.mthd.hasht = nv_encoder->dcb->hasht, | 1671 | .base.mthd.hasht = nv_encoder->dcb->hasht, |
1671 | .base.mthd.hashm = nv_encoder->dcb->hashm, | 1672 | .base.mthd.hashm = (0xf0ff & nv_encoder->dcb->hashm) | |
1673 | (0x0100 << nv_crtc->index), | ||
1672 | }; | 1674 | }; |
1673 | 1675 | ||
1674 | nv_connector = nouveau_encoder_connector_get(nv_encoder); | 1676 | nv_connector = nouveau_encoder_connector_get(nv_encoder); |
@@ -1682,7 +1684,7 @@ nv50_audio_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode) | |||
1682 | } | 1684 | } |
1683 | 1685 | ||
1684 | static void | 1686 | static void |
1685 | nv50_audio_disconnect(struct drm_encoder *encoder) | 1687 | nv50_audio_disconnect(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc) |
1686 | { | 1688 | { |
1687 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); | 1689 | struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); |
1688 | struct nv50_disp *disp = nv50_disp(encoder->dev); | 1690 | struct nv50_disp *disp = nv50_disp(encoder->dev); |
@@ -1693,7 +1695,8 @@ nv50_audio_disconnect(struct drm_encoder *encoder) | |||
1693 | .base.version = 1, | 1695 | .base.version = 1, |
1694 | .base.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, | 1696 | .base.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, |
1695 | .base.hasht = nv_encoder->dcb->hasht, | 1697 | .base.hasht = nv_encoder->dcb->hasht, |
1696 | .base.hashm = nv_encoder->dcb->hashm, | 1698 | .base.hashm = (0xf0ff & nv_encoder->dcb->hashm) | |
1699 | (0x0100 << nv_crtc->index), | ||
1697 | }; | 1700 | }; |
1698 | 1701 | ||
1699 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); | 1702 | nvif_mthd(disp->disp, 0, &args, sizeof(args)); |
@@ -1860,7 +1863,7 @@ nv50_sor_disconnect(struct drm_encoder *encoder) | |||
1860 | if (nv_crtc) { | 1863 | if (nv_crtc) { |
1861 | nv50_crtc_prepare(&nv_crtc->base); | 1864 | nv50_crtc_prepare(&nv_crtc->base); |
1862 | nv50_sor_ctrl(nv_encoder, 1 << nv_crtc->index, 0); | 1865 | nv50_sor_ctrl(nv_encoder, 1 << nv_crtc->index, 0); |
1863 | nv50_audio_disconnect(encoder); | 1866 | nv50_audio_disconnect(encoder, nv_crtc); |
1864 | nv50_hdmi_disconnect(&nv_encoder->base.base, nv_crtc); | 1867 | nv50_hdmi_disconnect(&nv_encoder->base.base, nv_crtc); |
1865 | } | 1868 | } |
1866 | } | 1869 | } |