diff options
-rw-r--r-- | arch/arm/mach-s5pv310/mach-smdkc210.c | 61 | ||||
-rw-r--r-- | arch/arm/mach-s5pv310/mach-smdkv310.c | 61 |
2 files changed, 122 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-s5pv310/mach-smdkc210.c index 9f7f77d8a748..2b8d4fc52d7c 100644 --- a/arch/arm/mach-s5pv310/mach-smdkc210.c +++ b/arch/arm/mach-s5pv310/mach-smdkc210.c | |||
@@ -12,6 +12,8 @@ | |||
12 | #include <linux/gpio.h> | 12 | #include <linux/gpio.h> |
13 | #include <linux/mmc/host.h> | 13 | #include <linux/mmc/host.h> |
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/smsc911x.h> | ||
16 | #include <linux/io.h> | ||
15 | 17 | ||
16 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
17 | #include <asm/mach-types.h> | 19 | #include <asm/mach-types.h> |
@@ -23,6 +25,7 @@ | |||
23 | #include <plat/sdhci.h> | 25 | #include <plat/sdhci.h> |
24 | 26 | ||
25 | #include <mach/map.h> | 27 | #include <mach/map.h> |
28 | #include <mach/regs-srom.h> | ||
26 | 29 | ||
27 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 30 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
28 | #define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 31 | #define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
@@ -105,6 +108,37 @@ static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = { | |||
105 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | 108 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
106 | }; | 109 | }; |
107 | 110 | ||
111 | static struct resource smdkc210_smsc911x_resources[] = { | ||
112 | [0] = { | ||
113 | .start = S5PV310_PA_SROM_BANK(1), | ||
114 | .end = S5PV310_PA_SROM_BANK(1) + SZ_64K - 1, | ||
115 | .flags = IORESOURCE_MEM, | ||
116 | }, | ||
117 | [1] = { | ||
118 | .start = IRQ_EINT(5), | ||
119 | .end = IRQ_EINT(5), | ||
120 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
121 | }, | ||
122 | }; | ||
123 | |||
124 | static struct smsc911x_platform_config smsc9215_config = { | ||
125 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | ||
126 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
127 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | ||
128 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
129 | .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67}, | ||
130 | }; | ||
131 | |||
132 | static struct platform_device smdkc210_smsc911x = { | ||
133 | .name = "smsc911x", | ||
134 | .id = -1, | ||
135 | .num_resources = ARRAY_SIZE(smdkc210_smsc911x_resources), | ||
136 | .resource = smdkc210_smsc911x_resources, | ||
137 | .dev = { | ||
138 | .platform_data = &smsc9215_config, | ||
139 | }, | ||
140 | }; | ||
141 | |||
108 | static struct platform_device *smdkc210_devices[] __initdata = { | 142 | static struct platform_device *smdkc210_devices[] __initdata = { |
109 | &s3c_device_hsmmc0, | 143 | &s3c_device_hsmmc0, |
110 | &s3c_device_hsmmc1, | 144 | &s3c_device_hsmmc1, |
@@ -112,8 +146,33 @@ static struct platform_device *smdkc210_devices[] __initdata = { | |||
112 | &s3c_device_hsmmc3, | 146 | &s3c_device_hsmmc3, |
113 | &s3c_device_rtc, | 147 | &s3c_device_rtc, |
114 | &s3c_device_wdt, | 148 | &s3c_device_wdt, |
149 | &smdkc210_smsc911x, | ||
115 | }; | 150 | }; |
116 | 151 | ||
152 | static void __init smdkc210_smsc911x_init(void) | ||
153 | { | ||
154 | u32 cs1; | ||
155 | |||
156 | /* configure nCS1 width to 16 bits */ | ||
157 | cs1 = __raw_readl(S5PV310_SROM_BW) & | ||
158 | ~(S5PV310_SROM_BW__CS_MASK << | ||
159 | S5PV310_SROM_BW__NCS1__SHIFT); | ||
160 | cs1 |= ((1 << S5PV310_SROM_BW__DATAWIDTH__SHIFT) | | ||
161 | (1 << S5PV310_SROM_BW__WAITENABLE__SHIFT) | | ||
162 | (1 << S5PV310_SROM_BW__BYTEENABLE__SHIFT)) << | ||
163 | S5PV310_SROM_BW__NCS1__SHIFT; | ||
164 | __raw_writel(cs1, S5PV310_SROM_BW); | ||
165 | |||
166 | /* set timing for nCS1 suitable for ethernet chip */ | ||
167 | __raw_writel((0x1 << S5PV310_SROM_BCX__PMC__SHIFT) | | ||
168 | (0x9 << S5PV310_SROM_BCX__TACP__SHIFT) | | ||
169 | (0xc << S5PV310_SROM_BCX__TCAH__SHIFT) | | ||
170 | (0x1 << S5PV310_SROM_BCX__TCOH__SHIFT) | | ||
171 | (0x6 << S5PV310_SROM_BCX__TACC__SHIFT) | | ||
172 | (0x1 << S5PV310_SROM_BCX__TCOS__SHIFT) | | ||
173 | (0x1 << S5PV310_SROM_BCX__TACS__SHIFT), S5PV310_SROM_BC1); | ||
174 | } | ||
175 | |||
117 | static void __init smdkc210_map_io(void) | 176 | static void __init smdkc210_map_io(void) |
118 | { | 177 | { |
119 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 178 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
@@ -123,6 +182,8 @@ static void __init smdkc210_map_io(void) | |||
123 | 182 | ||
124 | static void __init smdkc210_machine_init(void) | 183 | static void __init smdkc210_machine_init(void) |
125 | { | 184 | { |
185 | smdkc210_smsc911x_init(); | ||
186 | |||
126 | s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata); | 187 | s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata); |
127 | s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata); | 188 | s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata); |
128 | s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata); | 189 | s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata); |
diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c index e350a7582d08..2e625a3a27fd 100644 --- a/arch/arm/mach-s5pv310/mach-smdkv310.c +++ b/arch/arm/mach-s5pv310/mach-smdkv310.c | |||
@@ -12,6 +12,8 @@ | |||
12 | #include <linux/gpio.h> | 12 | #include <linux/gpio.h> |
13 | #include <linux/mmc/host.h> | 13 | #include <linux/mmc/host.h> |
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/smsc911x.h> | ||
16 | #include <linux/io.h> | ||
15 | 17 | ||
16 | #include <asm/mach/arch.h> | 18 | #include <asm/mach/arch.h> |
17 | #include <asm/mach-types.h> | 19 | #include <asm/mach-types.h> |
@@ -23,6 +25,7 @@ | |||
23 | #include <plat/sdhci.h> | 25 | #include <plat/sdhci.h> |
24 | 26 | ||
25 | #include <mach/map.h> | 27 | #include <mach/map.h> |
28 | #include <mach/regs-srom.h> | ||
26 | 29 | ||
27 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | 30 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
28 | #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 31 | #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
@@ -105,6 +108,37 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = { | |||
105 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | 108 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, |
106 | }; | 109 | }; |
107 | 110 | ||
111 | static struct resource smdkv310_smsc911x_resources[] = { | ||
112 | [0] = { | ||
113 | .start = S5PV310_PA_SROM_BANK(1), | ||
114 | .end = S5PV310_PA_SROM_BANK(1) + SZ_64K - 1, | ||
115 | .flags = IORESOURCE_MEM, | ||
116 | }, | ||
117 | [1] = { | ||
118 | .start = IRQ_EINT(5), | ||
119 | .end = IRQ_EINT(5), | ||
120 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
121 | }, | ||
122 | }; | ||
123 | |||
124 | static struct smsc911x_platform_config smsc9215_config = { | ||
125 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | ||
126 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
127 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | ||
128 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
129 | .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67}, | ||
130 | }; | ||
131 | |||
132 | static struct platform_device smdkv310_smsc911x = { | ||
133 | .name = "smsc911x", | ||
134 | .id = -1, | ||
135 | .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources), | ||
136 | .resource = smdkv310_smsc911x_resources, | ||
137 | .dev = { | ||
138 | .platform_data = &smsc9215_config, | ||
139 | }, | ||
140 | }; | ||
141 | |||
108 | static struct platform_device *smdkv310_devices[] __initdata = { | 142 | static struct platform_device *smdkv310_devices[] __initdata = { |
109 | &s3c_device_hsmmc0, | 143 | &s3c_device_hsmmc0, |
110 | &s3c_device_hsmmc1, | 144 | &s3c_device_hsmmc1, |
@@ -112,8 +146,33 @@ static struct platform_device *smdkv310_devices[] __initdata = { | |||
112 | &s3c_device_hsmmc3, | 146 | &s3c_device_hsmmc3, |
113 | &s3c_device_rtc, | 147 | &s3c_device_rtc, |
114 | &s3c_device_wdt, | 148 | &s3c_device_wdt, |
149 | &smdkv310_smsc911x, | ||
115 | }; | 150 | }; |
116 | 151 | ||
152 | static void __init smdkv310_smsc911x_init(void) | ||
153 | { | ||
154 | u32 cs1; | ||
155 | |||
156 | /* configure nCS1 width to 16 bits */ | ||
157 | cs1 = __raw_readl(S5PV310_SROM_BW) & | ||
158 | ~(S5PV310_SROM_BW__CS_MASK << | ||
159 | S5PV310_SROM_BW__NCS1__SHIFT); | ||
160 | cs1 |= ((1 << S5PV310_SROM_BW__DATAWIDTH__SHIFT) | | ||
161 | (1 << S5PV310_SROM_BW__WAITENABLE__SHIFT) | | ||
162 | (1 << S5PV310_SROM_BW__BYTEENABLE__SHIFT)) << | ||
163 | S5PV310_SROM_BW__NCS1__SHIFT; | ||
164 | __raw_writel(cs1, S5PV310_SROM_BW); | ||
165 | |||
166 | /* set timing for nCS1 suitable for ethernet chip */ | ||
167 | __raw_writel((0x1 << S5PV310_SROM_BCX__PMC__SHIFT) | | ||
168 | (0x9 << S5PV310_SROM_BCX__TACP__SHIFT) | | ||
169 | (0xc << S5PV310_SROM_BCX__TCAH__SHIFT) | | ||
170 | (0x1 << S5PV310_SROM_BCX__TCOH__SHIFT) | | ||
171 | (0x6 << S5PV310_SROM_BCX__TACC__SHIFT) | | ||
172 | (0x1 << S5PV310_SROM_BCX__TCOS__SHIFT) | | ||
173 | (0x1 << S5PV310_SROM_BCX__TACS__SHIFT), S5PV310_SROM_BC1); | ||
174 | } | ||
175 | |||
117 | static void __init smdkv310_map_io(void) | 176 | static void __init smdkv310_map_io(void) |
118 | { | 177 | { |
119 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | 178 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
@@ -123,6 +182,8 @@ static void __init smdkv310_map_io(void) | |||
123 | 182 | ||
124 | static void __init smdkv310_machine_init(void) | 183 | static void __init smdkv310_machine_init(void) |
125 | { | 184 | { |
185 | smdkv310_smsc911x_init(); | ||
186 | |||
126 | s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata); | 187 | s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata); |
127 | s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata); | 188 | s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata); |
128 | s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata); | 189 | s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata); |