diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/ni.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/ni_dma.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/nid.h | 24 |
3 files changed, 40 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index 360de9f1f491..aea48c89b241 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
| @@ -2516,6 +2516,16 @@ void cayman_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, | |||
| 2516 | radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0)); | 2516 | radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0)); |
| 2517 | radeon_ring_write(ring, 1 << vm_id); | 2517 | radeon_ring_write(ring, 1 << vm_id); |
| 2518 | 2518 | ||
| 2519 | /* wait for the invalidate to complete */ | ||
| 2520 | radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); | ||
| 2521 | radeon_ring_write(ring, (WAIT_REG_MEM_FUNCTION(0) | /* always */ | ||
| 2522 | WAIT_REG_MEM_ENGINE(0))); /* me */ | ||
| 2523 | radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); | ||
| 2524 | radeon_ring_write(ring, 0); | ||
| 2525 | radeon_ring_write(ring, 0); /* ref */ | ||
| 2526 | radeon_ring_write(ring, 0); /* mask */ | ||
| 2527 | radeon_ring_write(ring, 0x20); /* poll interval */ | ||
| 2528 | |||
| 2519 | /* sync PFP to ME, otherwise we might get invalid PFP reads */ | 2529 | /* sync PFP to ME, otherwise we might get invalid PFP reads */ |
| 2520 | radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); | 2530 | radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); |
| 2521 | radeon_ring_write(ring, 0x0); | 2531 | radeon_ring_write(ring, 0x0); |
diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c index 50f88611ff60..4be2bb7cbef3 100644 --- a/drivers/gpu/drm/radeon/ni_dma.c +++ b/drivers/gpu/drm/radeon/ni_dma.c | |||
| @@ -463,5 +463,11 @@ void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring, | |||
| 463 | radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0)); | 463 | radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0)); |
| 464 | radeon_ring_write(ring, (0xf << 16) | (VM_INVALIDATE_REQUEST >> 2)); | 464 | radeon_ring_write(ring, (0xf << 16) | (VM_INVALIDATE_REQUEST >> 2)); |
| 465 | radeon_ring_write(ring, 1 << vm_id); | 465 | radeon_ring_write(ring, 1 << vm_id); |
| 466 | |||
| 467 | /* wait for invalidate to complete */ | ||
| 468 | radeon_ring_write(ring, DMA_SRBM_READ_PACKET); | ||
| 469 | radeon_ring_write(ring, (0xff << 20) | (VM_INVALIDATE_REQUEST >> 2)); | ||
| 470 | radeon_ring_write(ring, 0); /* mask */ | ||
| 471 | radeon_ring_write(ring, 0); /* value */ | ||
| 466 | } | 472 | } |
| 467 | 473 | ||
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h index 2e12e4d69253..ad7125486894 100644 --- a/drivers/gpu/drm/radeon/nid.h +++ b/drivers/gpu/drm/radeon/nid.h | |||
| @@ -1133,6 +1133,23 @@ | |||
| 1133 | #define PACKET3_MEM_SEMAPHORE 0x39 | 1133 | #define PACKET3_MEM_SEMAPHORE 0x39 |
| 1134 | #define PACKET3_MPEG_INDEX 0x3A | 1134 | #define PACKET3_MPEG_INDEX 0x3A |
| 1135 | #define PACKET3_WAIT_REG_MEM 0x3C | 1135 | #define PACKET3_WAIT_REG_MEM 0x3C |
| 1136 | #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) | ||
| 1137 | /* 0 - always | ||
| 1138 | * 1 - < | ||
| 1139 | * 2 - <= | ||
| 1140 | * 3 - == | ||
| 1141 | * 4 - != | ||
| 1142 | * 5 - >= | ||
| 1143 | * 6 - > | ||
| 1144 | */ | ||
| 1145 | #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) | ||
| 1146 | /* 0 - reg | ||
| 1147 | * 1 - mem | ||
| 1148 | */ | ||
| 1149 | #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) | ||
| 1150 | /* 0 - me | ||
| 1151 | * 1 - pfp | ||
| 1152 | */ | ||
| 1136 | #define PACKET3_MEM_WRITE 0x3D | 1153 | #define PACKET3_MEM_WRITE 0x3D |
| 1137 | #define PACKET3_PFP_SYNC_ME 0x42 | 1154 | #define PACKET3_PFP_SYNC_ME 0x42 |
| 1138 | #define PACKET3_SURFACE_SYNC 0x43 | 1155 | #define PACKET3_SURFACE_SYNC 0x43 |
| @@ -1272,6 +1289,13 @@ | |||
| 1272 | (1 << 21) | \ | 1289 | (1 << 21) | \ |
| 1273 | (((n) & 0xFFFFF) << 0)) | 1290 | (((n) & 0xFFFFF) << 0)) |
| 1274 | 1291 | ||
| 1292 | #define DMA_SRBM_POLL_PACKET ((9 << 28) | \ | ||
| 1293 | (1 << 27) | \ | ||
| 1294 | (1 << 26)) | ||
| 1295 | |||
| 1296 | #define DMA_SRBM_READ_PACKET ((9 << 28) | \ | ||
| 1297 | (1 << 27)) | ||
| 1298 | |||
| 1275 | /* async DMA Packet types */ | 1299 | /* async DMA Packet types */ |
| 1276 | #define DMA_PACKET_WRITE 0x2 | 1300 | #define DMA_PACKET_WRITE 0x2 |
| 1277 | #define DMA_PACKET_COPY 0x3 | 1301 | #define DMA_PACKET_COPY 0x3 |
