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-rw-r--r--arch/arm/mach-exynos/Makefile7
-rw-r--r--arch/arm/mach-exynos/common.h3
-rw-r--r--arch/arm/mach-exynos/exynos.c (renamed from arch/arm/mach-exynos/common.c)130
-rw-r--r--arch/arm/mach-exynos/mach-exynos4-dt.c53
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c83
-rw-r--r--arch/arm/mach-exynos/regs-pmu.h1
6 files changed, 92 insertions, 185 deletions
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 8930b66b4abd..71df742fee25 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -12,7 +12,7 @@ obj- :=
12 12
13# Core 13# Core
14 14
15obj-$(CONFIG_ARCH_EXYNOS) += common.o 15obj-$(CONFIG_ARCH_EXYNOS) += exynos.o
16 16
17obj-$(CONFIG_S5P_PM) += pm.o 17obj-$(CONFIG_S5P_PM) += pm.o
18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o 18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
@@ -29,8 +29,3 @@ obj-$(CONFIG_ARCH_EXYNOS) += firmware.o
29 29
30plus_sec := $(call as-instr,.arch_extension sec,+sec) 30plus_sec := $(call as-instr,.arch_extension sec,+sec)
31AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) 31AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
32
33# machine support
34
35obj-$(CONFIG_ARCH_EXYNOS4) += mach-exynos4-dt.o
36obj-$(CONFIG_ARCH_EXYNOS5) += mach-exynos5-dt.o
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index f76967b1c551..a0c766953798 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -19,8 +19,7 @@ void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
19 19
20struct map_desc; 20struct map_desc;
21void exynos_init_io(void); 21void exynos_init_io(void);
22void exynos4_restart(enum reboot_mode mode, const char *cmd); 22void exynos_restart(enum reboot_mode mode, const char *cmd);
23void exynos5_restart(enum reboot_mode mode, const char *cmd);
24void exynos_cpuidle_init(void); 23void exynos_cpuidle_init(void);
25void exynos_cpufreq_init(void); 24void exynos_cpufreq_init(void);
26void exynos_init_late(void); 25void exynos_init_late(void);
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/exynos.c
index cd70d74c8eec..37030753f25a 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -1,55 +1,40 @@
1/* 1/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 2 * SAMSUNG EXYNOS Flattened Device Tree enabled machine
3 * http://www.samsung.com
4 * 3 *
5 * Common Codes for EXYNOS 4 * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#include <linux/kernel.h> 12#include <linux/init.h>
13#include <linux/bitops.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/irqchip.h>
17#include <linux/io.h> 13#include <linux/io.h>
18#include <linux/device.h> 14#include <linux/kernel.h>
19#include <linux/gpio.h>
20#include <clocksource/samsung_pwm.h>
21#include <linux/sched.h>
22#include <linux/serial_core.h>
23#include <linux/of.h> 15#include <linux/of.h>
24#include <linux/of_fdt.h>
25#include <linux/of_irq.h>
26#include <linux/pm_domain.h>
27#include <linux/export.h>
28#include <linux/irqdomain.h>
29#include <linux/of_address.h> 16#include <linux/of_address.h>
30#include <linux/irqchip/arm-gic.h> 17#include <linux/of_fdt.h>
31#include <linux/irqchip/chained_irq.h> 18#include <linux/of_platform.h>
32#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/pm_domain.h>
33 21
34#include <asm/proc-fns.h> 22#include <asm/cacheflush.h>
35#include <asm/exception.h>
36#include <asm/hardware/cache-l2x0.h> 23#include <asm/hardware/cache-l2x0.h>
24#include <asm/mach/arch.h>
37#include <asm/mach/map.h> 25#include <asm/mach/map.h>
38#include <asm/mach/irq.h> 26#include <asm/memory.h>
39#include <asm/cacheflush.h>
40 27
41#include <plat/cpu.h> 28#include <plat/cpu.h>
42#include <plat/pm.h>
43#include <plat/regs-serial.h> 29#include <plat/regs-serial.h>
44 30
45#include "common.h" 31#include "common.h"
32#include "mfc.h"
46#include "regs-pmu.h" 33#include "regs-pmu.h"
47 34
48#define L2_AUX_VAL 0x7C470001 35#define L2_AUX_VAL 0x7C470001
49#define L2_AUX_MASK 0xC200ffff 36#define L2_AUX_MASK 0xC200ffff
50 37
51/* Initial IO mappings */
52
53static struct map_desc exynos4_iodesc[] __initdata = { 38static struct map_desc exynos4_iodesc[] __initdata = {
54 { 39 {
55 .virtual = (unsigned long)S3C_VA_SYS, 40 .virtual = (unsigned long)S3C_VA_SYS,
@@ -213,19 +198,11 @@ static struct map_desc exynos5_iodesc[] __initdata = {
213 }, 198 },
214}; 199};
215 200
216void exynos4_restart(enum reboot_mode mode, const char *cmd) 201void exynos_restart(enum reboot_mode mode, const char *cmd)
217{
218 __raw_writel(0x1, S5P_SWRESET);
219}
220
221void exynos5_restart(enum reboot_mode mode, const char *cmd)
222{ 202{
223 struct device_node *np; 203 struct device_node *np;
224 u32 val; 204 u32 val = 0x1;
225 void __iomem *addr; 205 void __iomem *addr = EXYNOS_SWRESET;
226
227 val = 0x1;
228 addr = EXYNOS_SWRESET;
229 206
230 if (of_machine_is_compatible("samsung,exynos5440")) { 207 if (of_machine_is_compatible("samsung,exynos5440")) {
231 u32 status; 208 u32 status;
@@ -297,10 +274,10 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
297 */ 274 */
298static void __init exynos_map_io(void) 275static void __init exynos_map_io(void)
299{ 276{
300 if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412()) 277 if (soc_is_exynos4())
301 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); 278 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
302 279
303 if (soc_is_exynos5250() || soc_is_exynos5420()) 280 if (soc_is_exynos5())
304 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); 281 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
305 282
306 if (soc_is_exynos4210()) { 283 if (soc_is_exynos4210()) {
@@ -354,3 +331,76 @@ static int __init exynos4_l2x0_cache_init(void)
354 return 0; 331 return 0;
355} 332}
356early_initcall(exynos4_l2x0_cache_init); 333early_initcall(exynos4_l2x0_cache_init);
334
335static void __init exynos_dt_machine_init(void)
336{
337 struct device_node *i2c_np;
338 const char *i2c_compat = "samsung,s3c2440-i2c";
339 unsigned int tmp;
340 int id;
341
342 /*
343 * Exynos5's legacy i2c controller and new high speed i2c
344 * controller have muxed interrupt sources. By default the
345 * interrupts for 4-channel HS-I2C controller are enabled.
346 * If node for first four channels of legacy i2c controller
347 * are available then re-configure the interrupts via the
348 * system register.
349 */
350 if (soc_is_exynos5()) {
351 for_each_compatible_node(i2c_np, NULL, i2c_compat) {
352 if (of_device_is_available(i2c_np)) {
353 id = of_alias_get_id(i2c_np, "i2c");
354 if (id < 4) {
355 tmp = readl(EXYNOS5_SYS_I2C_CFG);
356 writel(tmp & ~(0x1 << id),
357 EXYNOS5_SYS_I2C_CFG);
358 }
359 }
360 }
361 }
362
363 exynos_cpuidle_init();
364 exynos_cpufreq_init();
365
366 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
367}
368
369static char const *exynos_dt_compat[] __initconst = {
370 "samsung,exynos4210",
371 "samsung,exynos4212",
372 "samsung,exynos4412",
373 "samsung,exynos5250",
374 "samsung,exynos5420",
375 "samsung,exynos5440",
376 NULL
377};
378
379static void __init exynos_reserve(void)
380{
381#ifdef CONFIG_S5P_DEV_MFC
382 int i;
383 char *mfc_mem[] = {
384 "samsung,mfc-v5",
385 "samsung,mfc-v6",
386 "samsung,mfc-v7",
387 };
388
389 for (i = 0; i < ARRAY_SIZE(mfc_mem); i++)
390 if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i]))
391 break;
392#endif
393}
394
395DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
396 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
397 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
398 .smp = smp_ops(exynos_smp_ops),
399 .map_io = exynos_init_io,
400 .init_early = exynos_firmware_init,
401 .init_machine = exynos_dt_machine_init,
402 .init_late = exynos_init_late,
403 .dt_compat = exynos_dt_compat,
404 .restart = exynos_restart,
405 .reserve = exynos_reserve,
406MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c
deleted file mode 100644
index fa019fd730bb..000000000000
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Samsung's EXYNOS4 flattened device tree enabled machine
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/of_platform.h>
15#include <linux/of_fdt.h>
16
17#include <asm/mach/arch.h>
18
19#include "common.h"
20#include "mfc.h"
21
22static void __init exynos4_dt_machine_init(void)
23{
24 exynos_cpuidle_init();
25 exynos_cpufreq_init();
26
27 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
28}
29
30static char const *exynos4_dt_compat[] __initdata = {
31 "samsung,exynos4210",
32 "samsung,exynos4212",
33 "samsung,exynos4412",
34 NULL
35};
36
37static void __init exynos4_reserve(void)
38{
39#ifdef CONFIG_S5P_DEV_MFC
40 of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, "samsung,mfc-v5");
41#endif
42}
43DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)")
44 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */
45 .smp = smp_ops(exynos_smp_ops),
46 .map_io = exynos_init_io,
47 .init_early = exynos_firmware_init,
48 .init_machine = exynos4_dt_machine_init,
49 .init_late = exynos_init_late,
50 .dt_compat = exynos4_dt_compat,
51 .restart = exynos4_restart,
52 .reserve = exynos4_reserve,
53MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
deleted file mode 100644
index 9a8a798d2ad0..000000000000
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/of_platform.h>
13#include <linux/of_fdt.h>
14#include <linux/io.h>
15
16#include <asm/mach/arch.h>
17
18#include "common.h"
19#include "mfc.h"
20#include "regs-pmu.h"
21
22static void __init exynos5_dt_machine_init(void)
23{
24 struct device_node *i2c_np;
25 const char *i2c_compat = "samsung,s3c2440-i2c";
26 unsigned int tmp;
27
28 /*
29 * Exynos5's legacy i2c controller and new high speed i2c
30 * controller have muxed interrupt sources. By default the
31 * interrupts for 4-channel HS-I2C controller are enabled.
32 * If node for first four channels of legacy i2c controller
33 * are available then re-configure the interrupts via the
34 * system register.
35 */
36 for_each_compatible_node(i2c_np, NULL, i2c_compat) {
37 if (of_device_is_available(i2c_np)) {
38 if (of_alias_get_id(i2c_np, "i2c") < 4) {
39 tmp = readl(EXYNOS5_SYS_I2C_CFG);
40 writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
41 EXYNOS5_SYS_I2C_CFG);
42 }
43 }
44 }
45
46 exynos_cpuidle_init();
47 exynos_cpufreq_init();
48
49 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
50}
51
52static char const *exynos5_dt_compat[] __initdata = {
53 "samsung,exynos5250",
54 "samsung,exynos5420",
55 "samsung,exynos5440",
56 NULL
57};
58
59static void __init exynos5_reserve(void)
60{
61#ifdef CONFIG_S5P_DEV_MFC
62 int i;
63 char *mfc_mem[] = {
64 "samsung,mfc-v6",
65 "samsung,mfc-v7",
66 };
67
68 for (i = 0; i < ARRAY_SIZE(mfc_mem); i++)
69 if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i]))
70 break;
71#endif
72}
73
74DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
75 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
76 .smp = smp_ops(exynos_smp_ops),
77 .map_io = exynos_init_io,
78 .init_machine = exynos5_dt_machine_init,
79 .init_late = exynos_init_late,
80 .dt_compat = exynos5_dt_compat,
81 .restart = exynos5_restart,
82 .reserve = exynos5_reserve,
83MACHINE_END
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 7c029ce27711..58e3fc4d6b5a 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -26,7 +26,6 @@
26#define S5P_USE_STANDBY_WFI0 (1 << 16) 26#define S5P_USE_STANDBY_WFI0 (1 << 16)
27#define S5P_USE_STANDBY_WFE0 (1 << 24) 27#define S5P_USE_STANDBY_WFE0 (1 << 24)
28 28
29#define S5P_SWRESET S5P_PMUREG(0x0400)
30#define EXYNOS_SWRESET S5P_PMUREG(0x0400) 29#define EXYNOS_SWRESET S5P_PMUREG(0x0400)
31#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4) 30#define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4)
32 31
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-28 05:26:30 -0400