diff options
-rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 23 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7790.c | 20 |
2 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 71b1251f79c7..67a6d968cebb 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi | |||
@@ -313,6 +313,29 @@ | |||
313 | clock-output-names = "extal"; | 313 | clock-output-names = "extal"; |
314 | }; | 314 | }; |
315 | 315 | ||
316 | /* | ||
317 | * The external audio clocks are configured as 0 Hz fixed frequency clocks by | ||
318 | * default. Boards that provide audio clocks should override them. | ||
319 | */ | ||
320 | audio_clk_a: audio_clk_a { | ||
321 | compatible = "fixed-clock"; | ||
322 | #clock-cells = <0>; | ||
323 | clock-frequency = <0>; | ||
324 | clock-output-names = "audio_clk_a"; | ||
325 | }; | ||
326 | audio_clk_b: audio_clk_b { | ||
327 | compatible = "fixed-clock"; | ||
328 | #clock-cells = <0>; | ||
329 | clock-frequency = <0>; | ||
330 | clock-output-names = "audio_clk_b"; | ||
331 | }; | ||
332 | audio_clk_c: audio_clk_c { | ||
333 | compatible = "fixed-clock"; | ||
334 | #clock-cells = <0>; | ||
335 | clock-frequency = <0>; | ||
336 | clock-output-names = "audio_clk_c"; | ||
337 | }; | ||
338 | |||
316 | /* Special CPG clocks */ | 339 | /* Special CPG clocks */ |
317 | cpg_clocks: cpg_clocks@e6150000 { | 340 | cpg_clocks: cpg_clocks@e6150000 { |
318 | compatible = "renesas,r8a7790-cpg-clocks", | 341 | compatible = "renesas,r8a7790-cpg-clocks", |
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index 507073e9d455..08a28034ca1d 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c | |||
@@ -91,6 +91,15 @@ static struct clk main_clk = { | |||
91 | .ops = &followparent_clk_ops, | 91 | .ops = &followparent_clk_ops, |
92 | }; | 92 | }; |
93 | 93 | ||
94 | static struct clk audio_clk_a = { | ||
95 | }; | ||
96 | |||
97 | static struct clk audio_clk_b = { | ||
98 | }; | ||
99 | |||
100 | static struct clk audio_clk_c = { | ||
101 | }; | ||
102 | |||
94 | /* | 103 | /* |
95 | * clock ratio of these clock will be updated | 104 | * clock ratio of these clock will be updated |
96 | * on r8a7790_clock_init() | 105 | * on r8a7790_clock_init() |
@@ -124,6 +133,9 @@ SH_FIXED_RATIO_CLK_SET(ddr_clk, pll3_clk, 1, 8); | |||
124 | SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15); | 133 | SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15); |
125 | 134 | ||
126 | static struct clk *main_clks[] = { | 135 | static struct clk *main_clks[] = { |
136 | &audio_clk_a, | ||
137 | &audio_clk_b, | ||
138 | &audio_clk_c, | ||
127 | &extal_clk, | 139 | &extal_clk, |
128 | &extal_div2_clk, | 140 | &extal_div2_clk, |
129 | &main_clk, | 141 | &main_clk, |
@@ -267,6 +279,10 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
267 | static struct clk_lookup lookups[] = { | 279 | static struct clk_lookup lookups[] = { |
268 | 280 | ||
269 | /* main clocks */ | 281 | /* main clocks */ |
282 | CLKDEV_CON_ID("audio_clk_a", &audio_clk_a), | ||
283 | CLKDEV_CON_ID("audio_clk_b", &audio_clk_b), | ||
284 | CLKDEV_CON_ID("audio_clk_c", &audio_clk_c), | ||
285 | CLKDEV_CON_ID("audio_clk_internal", &m2_clk), | ||
270 | CLKDEV_CON_ID("extal", &extal_clk), | 286 | CLKDEV_CON_ID("extal", &extal_clk), |
271 | CLKDEV_CON_ID("extal_div2", &extal_div2_clk), | 287 | CLKDEV_CON_ID("extal_div2", &extal_div2_clk), |
272 | CLKDEV_CON_ID("main", &main_clk), | 288 | CLKDEV_CON_ID("main", &main_clk), |
@@ -357,6 +373,10 @@ static struct clk_lookup lookups[] = { | |||
357 | CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]), | 373 | CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]), |
358 | CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]), | 374 | CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]), |
359 | CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]), | 375 | CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]), |
376 | CLKDEV_ICK_ID("clk_a", "rcar_sound", &audio_clk_a), | ||
377 | CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b), | ||
378 | CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c), | ||
379 | CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk), | ||
360 | CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]), | 380 | CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]), |
361 | CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]), | 381 | CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]), |
362 | CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]), | 382 | CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]), |