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-rw-r--r--arch/mips/lib-32/dump_tlb.c10
-rw-r--r--arch/mips/lib-32/r3k_dump_tlb.c10
-rw-r--r--arch/mips/lib-64/dump_tlb.c10
-rw-r--r--arch/mips/mm/c-r3k.c4
-rw-r--r--arch/mips/mm/c-r4k.c4
-rw-r--r--arch/mips/mm/c-tx39.c4
-rw-r--r--arch/mips/mm/fault.c10
-rw-r--r--arch/mips/mm/init.c28
-rw-r--r--arch/mips/mm/ioremap.c15
-rw-r--r--arch/mips/mm/pgtable-32.c4
-rw-r--r--arch/mips/mm/tlb-andes.c4
-rw-r--r--arch/mips/mm/tlb-r4k.c4
-rw-r--r--include/asm-mips/page.h42
-rw-r--r--include/asm-mips/pgalloc.h19
-rw-r--r--include/asm-mips/pgtable-32.h40
-rw-r--r--include/asm-mips/pgtable-64.h55
-rw-r--r--include/asm-mips/pgtable.h13
17 files changed, 177 insertions, 99 deletions
diff --git a/arch/mips/lib-32/dump_tlb.c b/arch/mips/lib-32/dump_tlb.c
index 019ac8f005d7..f6d134feb12a 100644
--- a/arch/mips/lib-32/dump_tlb.c
+++ b/arch/mips/lib-32/dump_tlb.c
@@ -139,6 +139,7 @@ void dump_tlb_nonwired(void)
139void dump_list_process(struct task_struct *t, void *address) 139void dump_list_process(struct task_struct *t, void *address)
140{ 140{
141 pgd_t *page_dir, *pgd; 141 pgd_t *page_dir, *pgd;
142 pud_t *pud;
142 pmd_t *pmd; 143 pmd_t *pmd;
143 pte_t *pte, page; 144 pte_t *pte, page;
144 unsigned long addr, val; 145 unsigned long addr, val;
@@ -162,7 +163,10 @@ void dump_list_process(struct task_struct *t, void *address)
162 pgd = pgd_offset(t->mm, addr); 163 pgd = pgd_offset(t->mm, addr);
163 printk("pgd == %08x, ", (unsigned int) pgd); 164 printk("pgd == %08x, ", (unsigned int) pgd);
164 165
165 pmd = pmd_offset(pgd, addr); 166 pud = pud_offset(pgd, addr);
167 printk("pud == %08x, ", (unsigned int) pud);
168
169 pmd = pmd_offset(pud, addr);
166 printk("pmd == %08x, ", (unsigned int) pmd); 170 printk("pmd == %08x, ", (unsigned int) pmd);
167 171
168 pte = pte_offset(pmd, addr); 172 pte = pte_offset(pmd, addr);
@@ -195,13 +199,15 @@ void dump_list_current(void *address)
195unsigned int vtop(void *address) 199unsigned int vtop(void *address)
196{ 200{
197 pgd_t *pgd; 201 pgd_t *pgd;
202 pud_t *pud;
198 pmd_t *pmd; 203 pmd_t *pmd;
199 pte_t *pte; 204 pte_t *pte;
200 unsigned int addr, paddr; 205 unsigned int addr, paddr;
201 206
202 addr = (unsigned long) address; 207 addr = (unsigned long) address;
203 pgd = pgd_offset(current->mm, addr); 208 pgd = pgd_offset(current->mm, addr);
204 pmd = pmd_offset(pgd, addr); 209 pud = pud_offset(pgd, addr);
210 pmd = pmd_offset(pud, addr);
205 pte = pte_offset(pmd, addr); 211 pte = pte_offset(pmd, addr);
206 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; 212 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
207 paddr |= (addr & ~PAGE_MASK); 213 paddr |= (addr & ~PAGE_MASK);
diff --git a/arch/mips/lib-32/r3k_dump_tlb.c b/arch/mips/lib-32/r3k_dump_tlb.c
index a878224004e5..4f2cb74f0766 100644
--- a/arch/mips/lib-32/r3k_dump_tlb.c
+++ b/arch/mips/lib-32/r3k_dump_tlb.c
@@ -105,6 +105,7 @@ void dump_tlb_nonwired(void)
105void dump_list_process(struct task_struct *t, void *address) 105void dump_list_process(struct task_struct *t, void *address)
106{ 106{
107 pgd_t *page_dir, *pgd; 107 pgd_t *page_dir, *pgd;
108 pud_t *pud;
108 pmd_t *pmd; 109 pmd_t *pmd;
109 pte_t *pte, page; 110 pte_t *pte, page;
110 unsigned int addr; 111 unsigned int addr;
@@ -121,7 +122,10 @@ void dump_list_process(struct task_struct *t, void *address)
121 pgd = pgd_offset(t->mm, addr); 122 pgd = pgd_offset(t->mm, addr);
122 printk("pgd == %08x, ", (unsigned int) pgd); 123 printk("pgd == %08x, ", (unsigned int) pgd);
123 124
124 pmd = pmd_offset(pgd, addr); 125 pud = pud_offset(pgd, addr);
126 printk("pud == %08x, ", (unsigned int) pud);
127
128 pmd = pmd_offset(pud, addr);
125 printk("pmd == %08x, ", (unsigned int) pmd); 129 printk("pmd == %08x, ", (unsigned int) pmd);
126 130
127 pte = pte_offset(pmd, addr); 131 pte = pte_offset(pmd, addr);
@@ -149,13 +153,15 @@ void dump_list_current(void *address)
149unsigned int vtop(void *address) 153unsigned int vtop(void *address)
150{ 154{
151 pgd_t *pgd; 155 pgd_t *pgd;
156 pud_t *pud;
152 pmd_t *pmd; 157 pmd_t *pmd;
153 pte_t *pte; 158 pte_t *pte;
154 unsigned int addr, paddr; 159 unsigned int addr, paddr;
155 160
156 addr = (unsigned long) address; 161 addr = (unsigned long) address;
157 pgd = pgd_offset(current->mm, addr); 162 pgd = pgd_offset(current->mm, addr);
158 pmd = pmd_offset(pgd, addr); 163 pud = pud_offset(pgd, addr);
164 pmd = pmd_offset(pud, addr);
159 pte = pte_offset(pmd, addr); 165 pte = pte_offset(pmd, addr);
160 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; 166 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
161 paddr |= (addr & ~PAGE_MASK); 167 paddr |= (addr & ~PAGE_MASK);
diff --git a/arch/mips/lib-64/dump_tlb.c b/arch/mips/lib-64/dump_tlb.c
index 42f88e055b4c..11a5f015f040 100644
--- a/arch/mips/lib-64/dump_tlb.c
+++ b/arch/mips/lib-64/dump_tlb.c
@@ -140,6 +140,7 @@ void dump_tlb_nonwired(void)
140void dump_list_process(struct task_struct *t, void *address) 140void dump_list_process(struct task_struct *t, void *address)
141{ 141{
142 pgd_t *page_dir, *pgd; 142 pgd_t *page_dir, *pgd;
143 pud_t *pud;
143 pmd_t *pmd; 144 pmd_t *pmd;
144 pte_t *pte, page; 145 pte_t *pte, page;
145 unsigned long addr, val; 146 unsigned long addr, val;
@@ -155,7 +156,10 @@ void dump_list_process(struct task_struct *t, void *address)
155 pgd = pgd_offset(t->mm, addr); 156 pgd = pgd_offset(t->mm, addr);
156 printk("pgd == %016lx\n", (unsigned long) pgd); 157 printk("pgd == %016lx\n", (unsigned long) pgd);
157 158
158 pmd = pmd_offset(pgd, addr); 159 pud = pud_offset(pgd, addr);
160 printk("pud == %016lx\n", (unsigned long) pud);
161
162 pmd = pmd_offset(pud, addr);
159 printk("pmd == %016lx\n", (unsigned long) pmd); 163 printk("pmd == %016lx\n", (unsigned long) pmd);
160 164
161 pte = pte_offset(pmd, addr); 165 pte = pte_offset(pmd, addr);
@@ -184,13 +188,15 @@ void dump_list_current(void *address)
184unsigned int vtop(void *address) 188unsigned int vtop(void *address)
185{ 189{
186 pgd_t *pgd; 190 pgd_t *pgd;
191 pud_t *pud;
187 pmd_t *pmd; 192 pmd_t *pmd;
188 pte_t *pte; 193 pte_t *pte;
189 unsigned int addr, paddr; 194 unsigned int addr, paddr;
190 195
191 addr = (unsigned long) address; 196 addr = (unsigned long) address;
192 pgd = pgd_offset(current->mm, addr); 197 pgd = pgd_offset(current->mm, addr);
193 pmd = pmd_offset(pgd, addr); 198 pud = pud_offset(pgd, addr);
199 pmd = pmd_offset(pud, addr);
194 pte = pte_offset(pmd, addr); 200 pte = pte_offset(pmd, addr);
195 paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK; 201 paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
196 paddr |= (addr & ~PAGE_MASK); 202 paddr |= (addr & ~PAGE_MASK);
diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c
index c659f99eb39a..03492a5c21f1 100644
--- a/arch/mips/mm/c-r3k.c
+++ b/arch/mips/mm/c-r3k.c
@@ -221,12 +221,14 @@ static inline unsigned long get_phys_page (unsigned long addr,
221 struct mm_struct *mm) 221 struct mm_struct *mm)
222{ 222{
223 pgd_t *pgd; 223 pgd_t *pgd;
224 pud_t *pud;
224 pmd_t *pmd; 225 pmd_t *pmd;
225 pte_t *pte; 226 pte_t *pte;
226 unsigned long physpage; 227 unsigned long physpage;
227 228
228 pgd = pgd_offset(mm, addr); 229 pgd = pgd_offset(mm, addr);
229 pmd = pmd_offset(pgd, addr); 230 pud = pud_offset(pgd, addr);
231 pmd = pmd_offset(pud, addr);
230 pte = pte_offset(pmd, addr); 232 pte = pte_offset(pmd, addr);
231 233
232 if ((physpage = pte_val(*pte)) & _PAGE_VALID) 234 if ((physpage = pte_val(*pte)) & _PAGE_VALID)
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 8ffb9f809ed9..b165b73e2583 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -372,12 +372,14 @@ static inline void local_r4k_flush_cache_page(void *args)
372 int exec = vma->vm_flags & VM_EXEC; 372 int exec = vma->vm_flags & VM_EXEC;
373 struct mm_struct *mm = vma->vm_mm; 373 struct mm_struct *mm = vma->vm_mm;
374 pgd_t *pgdp; 374 pgd_t *pgdp;
375 pud_t *pudp;
375 pmd_t *pmdp; 376 pmd_t *pmdp;
376 pte_t *ptep; 377 pte_t *ptep;
377 378
378 page &= PAGE_MASK; 379 page &= PAGE_MASK;
379 pgdp = pgd_offset(mm, page); 380 pgdp = pgd_offset(mm, page);
380 pmdp = pmd_offset(pgdp, page); 381 pudp = pud_offset(pgdp, page);
382 pmdp = pmd_offset(pudp, page);
381 ptep = pte_offset(pmdp, page); 383 ptep = pte_offset(pmdp, page);
382 384
383 /* 385 /*
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index ff5afab64b2f..5054a0ed2b6d 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -183,6 +183,7 @@ static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page
183 int exec = vma->vm_flags & VM_EXEC; 183 int exec = vma->vm_flags & VM_EXEC;
184 struct mm_struct *mm = vma->vm_mm; 184 struct mm_struct *mm = vma->vm_mm;
185 pgd_t *pgdp; 185 pgd_t *pgdp;
186 pud_t *pudp;
186 pmd_t *pmdp; 187 pmd_t *pmdp;
187 pte_t *ptep; 188 pte_t *ptep;
188 189
@@ -195,7 +196,8 @@ static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page
195 196
196 page &= PAGE_MASK; 197 page &= PAGE_MASK;
197 pgdp = pgd_offset(mm, page); 198 pgdp = pgd_offset(mm, page);
198 pmdp = pmd_offset(pgdp, page); 199 pudp = pud_offset(pgdp, page);
200 pmdp = pmd_offset(pudp, page);
199 ptep = pte_offset(pmdp, page); 201 ptep = pte_offset(pmdp, page);
200 202
201 /* 203 /*
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index ec8077c74e9c..345a4d6ec20f 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -212,6 +212,7 @@ vmalloc_fault:
212 */ 212 */
213 int offset = __pgd_offset(address); 213 int offset = __pgd_offset(address);
214 pgd_t *pgd, *pgd_k; 214 pgd_t *pgd, *pgd_k;
215 pud_t *pud, *pud_k;
215 pmd_t *pmd, *pmd_k; 216 pmd_t *pmd, *pmd_k;
216 pte_t *pte_k; 217 pte_t *pte_k;
217 218
@@ -222,8 +223,13 @@ vmalloc_fault:
222 goto no_context; 223 goto no_context;
223 set_pgd(pgd, *pgd_k); 224 set_pgd(pgd, *pgd_k);
224 225
225 pmd = pmd_offset(pgd, address); 226 pud = pud_offset(pgd, address);
226 pmd_k = pmd_offset(pgd_k, address); 227 pud_k = pud_offset(pgd_k, address);
228 if (!pud_present(*pud_k))
229 goto no_context;
230
231 pmd = pmd_offset(pud, address);
232 pmd_k = pmd_offset(pud_k, address);
227 if (!pmd_present(*pmd_k)) 233 if (!pmd_present(*pmd_k))
228 goto no_context; 234 goto no_context;
229 set_pmd(pmd, *pmd_k); 235 set_pmd(pmd, *pmd_k);
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 77cbccaff955..5e1967f14255 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -83,7 +83,7 @@ pte_t *kmap_pte;
83pgprot_t kmap_prot; 83pgprot_t kmap_prot;
84 84
85#define kmap_get_fixmap_pte(vaddr) \ 85#define kmap_get_fixmap_pte(vaddr) \
86 pte_offset_kernel(pmd_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)) 86 pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
87 87
88static void __init kmap_init(void) 88static void __init kmap_init(void)
89{ 89{
@@ -101,26 +101,32 @@ void __init fixrange_init(unsigned long start, unsigned long end,
101 pgd_t *pgd_base) 101 pgd_t *pgd_base)
102{ 102{
103 pgd_t *pgd; 103 pgd_t *pgd;
104 pud_t *pud;
104 pmd_t *pmd; 105 pmd_t *pmd;
105 pte_t *pte; 106 pte_t *pte;
106 int i, j; 107 int i, j, k;
107 unsigned long vaddr; 108 unsigned long vaddr;
108 109
109 vaddr = start; 110 vaddr = start;
110 i = __pgd_offset(vaddr); 111 i = __pgd_offset(vaddr);
111 j = __pmd_offset(vaddr); 112 j = __pud_offset(vaddr);
113 k = __pmd_offset(vaddr);
112 pgd = pgd_base + i; 114 pgd = pgd_base + i;
113 115
114 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { 116 for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
115 pmd = (pmd_t *)pgd; 117 pud = (pud_t *)pgd;
116 for (; (j < PTRS_PER_PMD) && (vaddr != end); pmd++, j++) { 118 for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) {
117 if (pmd_none(*pmd)) { 119 pmd = (pmd_t *)pud;
118 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); 120 for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
119 set_pmd(pmd, __pmd(pte)); 121 if (pmd_none(*pmd)) {
120 if (pte != pte_offset_kernel(pmd, 0)) 122 pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
121 BUG(); 123 set_pmd(pmd, __pmd(pte));
124 if (pte != pte_offset_kernel(pmd, 0))
125 BUG();
126 }
127 vaddr += PMD_SIZE;
122 } 128 }
123 vaddr += PMD_SIZE; 129 k = 0;
124 } 130 }
125 j = 0; 131 j = 0;
126 } 132 }
diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c
index adf352273f63..d06107360db4 100644
--- a/arch/mips/mm/ioremap.c
+++ b/arch/mips/mm/ioremap.c
@@ -79,9 +79,14 @@ static int remap_area_pages(unsigned long address, phys_t phys_addr,
79 BUG(); 79 BUG();
80 spin_lock(&init_mm.page_table_lock); 80 spin_lock(&init_mm.page_table_lock);
81 do { 81 do {
82 pud_t *pud;
82 pmd_t *pmd; 83 pmd_t *pmd;
83 pmd = pmd_alloc(&init_mm, dir, address); 84
84 error = -ENOMEM; 85 error = -ENOMEM;
86 pud = pud_alloc(&init_mm, dir, address);
87 if (!pud)
88 break;
89 pmd = pmd_alloc(&init_mm, pud, address);
85 if (!pmd) 90 if (!pmd)
86 break; 91 break;
87 if (remap_area_pmd(pmd, address, end - address, 92 if (remap_area_pmd(pmd, address, end - address,
@@ -141,7 +146,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
141 */ 146 */
142 if (IS_LOW512(phys_addr) && IS_LOW512(last_addr) && 147 if (IS_LOW512(phys_addr) && IS_LOW512(last_addr) &&
143 flags == _CACHE_UNCACHED) 148 flags == _CACHE_UNCACHED)
144 return (void *) KSEG1ADDR(phys_addr); 149 return (void *) CKSEG1ADDR(phys_addr);
145 150
146 /* 151 /*
147 * Don't allow anybody to remap normal RAM that we're using.. 152 * Don't allow anybody to remap normal RAM that we're using..
@@ -180,7 +185,7 @@ void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
180 return (void *) (offset + (char *)addr); 185 return (void *) (offset + (char *)addr);
181} 186}
182 187
183#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1) 188#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
184 189
185void __iounmap(volatile void __iomem *addr) 190void __iounmap(volatile void __iomem *addr)
186{ 191{
@@ -190,10 +195,8 @@ void __iounmap(volatile void __iomem *addr)
190 return; 195 return;
191 196
192 p = remove_vm_area((void *) (PAGE_MASK & (unsigned long __force) addr)); 197 p = remove_vm_area((void *) (PAGE_MASK & (unsigned long __force) addr));
193 if (!p) { 198 if (!p)
194 printk(KERN_ERR "iounmap: bad address %p\n", addr); 199 printk(KERN_ERR "iounmap: bad address %p\n", addr);
195 return;
196 }
197 200
198 kfree(p); 201 kfree(p);
199} 202}
diff --git a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c
index 74492618f2ae..4a3c4919e314 100644
--- a/arch/mips/mm/pgtable-32.c
+++ b/arch/mips/mm/pgtable-32.c
@@ -35,6 +35,7 @@ void __init pagetable_init(void)
35#ifdef CONFIG_HIGHMEM 35#ifdef CONFIG_HIGHMEM
36 unsigned long vaddr; 36 unsigned long vaddr;
37 pgd_t *pgd, *pgd_base; 37 pgd_t *pgd, *pgd_base;
38 pud_t *pud;
38 pmd_t *pmd; 39 pmd_t *pmd;
39 pte_t *pte; 40 pte_t *pte;
40#endif 41#endif
@@ -60,7 +61,8 @@ void __init pagetable_init(void)
60 fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, pgd_base); 61 fixrange_init(vaddr, vaddr + PAGE_SIZE*LAST_PKMAP, pgd_base);
61 62
62 pgd = swapper_pg_dir + __pgd_offset(vaddr); 63 pgd = swapper_pg_dir + __pgd_offset(vaddr);
63 pmd = pmd_offset(pgd, vaddr); 64 pud = pud_offset(pgd, vaddr);
65 pmd = pmd_offset(pud, vaddr);
64 pte = pte_offset_kernel(pmd, vaddr); 66 pte = pte_offset_kernel(pmd, vaddr);
65 pkmap_page_table = pte; 67 pkmap_page_table = pte;
66#endif 68#endif
diff --git a/arch/mips/mm/tlb-andes.c b/arch/mips/mm/tlb-andes.c
index 167e08e9661a..3f422a849c41 100644
--- a/arch/mips/mm/tlb-andes.c
+++ b/arch/mips/mm/tlb-andes.c
@@ -195,6 +195,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
195{ 195{
196 unsigned long flags; 196 unsigned long flags;
197 pgd_t *pgdp; 197 pgd_t *pgdp;
198 pud_t *pudp;
198 pmd_t *pmdp; 199 pmd_t *pmdp;
199 pte_t *ptep; 200 pte_t *ptep;
200 int idx, pid; 201 int idx, pid;
@@ -220,7 +221,8 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
220 write_c0_entryhi(address | (pid)); 221 write_c0_entryhi(address | (pid));
221 pgdp = pgd_offset(vma->vm_mm, address); 222 pgdp = pgd_offset(vma->vm_mm, address);
222 tlb_probe(); 223 tlb_probe();
223 pmdp = pmd_offset(pgdp, address); 224 pudp = pud_offset(pgdp, address);
225 pmdp = pmd_offset(pudp, address);
224 idx = read_c0_index(); 226 idx = read_c0_index();
225 ptep = pte_offset_map(pmdp, address); 227 ptep = pte_offset_map(pmdp, address);
226 write_c0_entrylo0(pte_val(*ptep++) >> 6); 228 write_c0_entrylo0(pte_val(*ptep++) >> 6);
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 09249a756016..08702202758d 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -227,6 +227,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
227{ 227{
228 unsigned long flags; 228 unsigned long flags;
229 pgd_t *pgdp; 229 pgd_t *pgdp;
230 pud_t *pudp;
230 pmd_t *pmdp; 231 pmd_t *pmdp;
231 pte_t *ptep; 232 pte_t *ptep;
232 int idx, pid; 233 int idx, pid;
@@ -246,7 +247,8 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
246 mtc0_tlbw_hazard(); 247 mtc0_tlbw_hazard();
247 tlb_probe(); 248 tlb_probe();
248 BARRIER; 249 BARRIER;
249 pmdp = pmd_offset(pgdp, address); 250 pudp = pud_offset(pgdp, address);
251 pmdp = pmd_offset(pudp, address);
250 idx = read_c0_index(); 252 idx = read_c0_index();
251 ptep = pte_offset_map(pmdp, address); 253 ptep = pte_offset_map(pmdp, address);
252 254
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 652b6d67a571..ee25a779bf49 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -87,22 +87,48 @@ static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
87typedef struct { unsigned long pte; } pte_t; 87typedef struct { unsigned long pte; } pte_t;
88#define pte_val(x) ((x).pte) 88#define pte_val(x) ((x).pte)
89#endif 89#endif
90#define __pte(x) ((pte_t) { (x) } )
90 91
91typedef struct { unsigned long pmd; } pmd_t; 92/*
92typedef struct { unsigned long pgd; } pgd_t; 93 * For 3-level pagetables we defines these ourselves, for 2-level the
93typedef struct { unsigned long pgprot; } pgprot_t; 94 * definitions are supplied by <asm-generic/pgtable-nopmd.h>.
95 */
96#ifdef CONFIG_64BIT
94 97
98typedef struct { unsigned long pmd; } pmd_t;
95#define pmd_val(x) ((x).pmd) 99#define pmd_val(x) ((x).pmd)
96#define pgd_val(x) ((x).pgd) 100#define __pmd(x) ((pmd_t) { (x) } )
97#define pgprot_val(x) ((x).pgprot)
98 101
99#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t))) 102#endif
100 103
101#define __pte(x) ((pte_t) { (x) } ) 104/*
102#define __pmd(x) ((pmd_t) { (x) } ) 105 * Right now we don't support 4-level pagetables, so all pud-related
106 * definitions come from <asm-generic/pgtable-nopud.h>.
107 */
108
109/*
110 * Finall the top of the hierarchy, the pgd
111 */
112typedef struct { unsigned long pgd; } pgd_t;
113#define pgd_val(x) ((x).pgd)
103#define __pgd(x) ((pgd_t) { (x) } ) 114#define __pgd(x) ((pgd_t) { (x) } )
115
116/*
117 * Manipulate page protection bits
118 */
119typedef struct { unsigned long pgprot; } pgprot_t;
120#define pgprot_val(x) ((x).pgprot)
104#define __pgprot(x) ((pgprot_t) { (x) } ) 121#define __pgprot(x) ((pgprot_t) { (x) } )
105 122
123/*
124 * On R4000-style MMUs where a TLB entry is mapping a adjacent even / odd
125 * pair of pages we only have a single global bit per pair of pages. When
126 * writing to the TLB make sure we always have the bit set for both pages
127 * or none. This macro is used to access the `buddy' of the pte we're just
128 * working on.
129 */
130#define ptep_buddy(x) ((pte_t *)((unsigned long)(x) ^ sizeof(pte_t)))
131
106#endif /* !__ASSEMBLY__ */ 132#endif /* !__ASSEMBLY__ */
107 133
108/* to align the pointer to the (next) page boundary */ 134/* to align the pointer to the (next) page boundary */
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index ce57288d43bd..fe1df572318b 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -26,10 +26,22 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
26} 26}
27 27
28/* 28/*
29 * Initialize a new pmd table with invalid pointers.
30 */
31extern void pmd_init(unsigned long page, unsigned long pagetable);
32
33#ifdef CONFIG_64BIT
34
35static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
36{
37 set_pud(pud, __pud((unsigned long)pmd));
38}
39#endif
40
41/*
29 * Initialize a new pgd / pmd table with invalid pointers. 42 * Initialize a new pgd / pmd table with invalid pointers.
30 */ 43 */
31extern void pgd_init(unsigned long page); 44extern void pgd_init(unsigned long page);
32extern void pmd_init(unsigned long page, unsigned long pagetable);
33 45
34static inline pgd_t *pgd_alloc(struct mm_struct *mm) 46static inline pgd_t *pgd_alloc(struct mm_struct *mm)
35{ 47{
@@ -86,21 +98,18 @@ static inline void pte_free(struct page *pte)
86#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 98#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
87 99
88#ifdef CONFIG_32BIT 100#ifdef CONFIG_32BIT
89#define pgd_populate(mm, pmd, pte) BUG()
90 101
91/* 102/*
92 * allocating and freeing a pmd is trivial: the 1-entry pmd is 103 * allocating and freeing a pmd is trivial: the 1-entry pmd is
93 * inside the pgd, so has no extra memory associated with it. 104 * inside the pgd, so has no extra memory associated with it.
94 */ 105 */
95#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
96#define pmd_free(x) do { } while (0) 106#define pmd_free(x) do { } while (0)
97#define __pmd_free_tlb(tlb,x) do { } while (0) 107#define __pmd_free_tlb(tlb,x) do { } while (0)
108
98#endif 109#endif
99 110
100#ifdef CONFIG_64BIT 111#ifdef CONFIG_64BIT
101 112
102#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd))
103
104static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) 113static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
105{ 114{
106 pmd_t *pmd; 115 pmd_t *pmd;
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 7fec93b76da9..8d66303eabc4 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -17,6 +17,8 @@
17#include <asm/cachectl.h> 17#include <asm/cachectl.h>
18#include <asm/fixmap.h> 18#include <asm/fixmap.h>
19 19
20#include <asm-generic/pgtable-nopmd.h>
21
20/* 22/*
21 * - add_wired_entry() add a fixed TLB entry, and move wired register 23 * - add_wired_entry() add a fixed TLB entry, and move wired register
22 */ 24 */
@@ -42,35 +44,35 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
42 */ 44 */
43 45
44/* PMD_SHIFT determines the size of the area a second-level page table can map */ 46/* PMD_SHIFT determines the size of the area a second-level page table can map */
45#ifdef CONFIG_64BIT_PHYS_ADDR
46#define PMD_SHIFT 21
47#else
48#define PMD_SHIFT 22
49#endif
50#define PMD_SIZE (1UL << PMD_SHIFT) 47#define PMD_SIZE (1UL << PMD_SHIFT)
51#define PMD_MASK (~(PMD_SIZE-1)) 48#define PMD_MASK (~(PMD_SIZE-1))
52 49
53/* PGDIR_SHIFT determines what a third-level page table entry can map */ 50/* PGDIR_SHIFT determines what a third-level page table entry can map */
54#define PGDIR_SHIFT PMD_SHIFT 51#ifdef CONFIG_64BIT_PHYS_ADDR
52#define PGDIR_SHIFT 21
53#else
54#define PGDIR_SHIFT 22
55#endif
55#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 56#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
56#define PGDIR_MASK (~(PGDIR_SIZE-1)) 57#define PGDIR_MASK (~(PGDIR_SIZE-1))
57 58
58/* 59/*
59 * Entries per page directory level: we use two-level, so 60 * Entries per page directory level: we use two-level, so
60 * we don't really have any PMD directory physically. 61 * we don't really have any PUD/PMD directory physically.
61 */ 62 */
62#ifdef CONFIG_64BIT_PHYS_ADDR 63#ifdef CONFIG_64BIT_PHYS_ADDR
63#define PGD_ORDER 1 64#define PGD_ORDER 1
64#define PMD_ORDER 0 65#define PUD_ORDER aieeee_attempt_to_allocate_pud
66#define PMD_ORDER 1
65#define PTE_ORDER 0 67#define PTE_ORDER 0
66#else 68#else
67#define PGD_ORDER 0 69#define PGD_ORDER 0
68#define PMD_ORDER 0 70#define PUD_ORDER aieeee_attempt_to_allocate_pud
71#define PMD_ORDER 1
69#define PTE_ORDER 0 72#define PTE_ORDER 0
70#endif 73#endif
71 74
72#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t)) 75#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
73#define PTRS_PER_PMD 1
74#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) 76#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
75 77
76#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) 78#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE)
@@ -91,8 +93,6 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
91#define pte_ERROR(e) \ 93#define pte_ERROR(e) \
92 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) 94 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
93#endif 95#endif
94#define pmd_ERROR(e) \
95 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
96#define pgd_ERROR(e) \ 96#define pgd_ERROR(e) \
97 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 97 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
98 98
@@ -120,16 +120,6 @@ static inline void pmd_clear(pmd_t *pmdp)
120 pmd_val(*pmdp) = ((unsigned long) invalid_pte_table); 120 pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
121} 121}
122 122
123/*
124 * The "pgd_xxx()" functions here are trivial for a folded two-level
125 * setup: the pgd is never bad, and a pmd always exists (as it's folded
126 * into the pgd entry)
127 */
128static inline int pgd_none(pgd_t pgd) { return 0; }
129static inline int pgd_bad(pgd_t pgd) { return 0; }
130static inline int pgd_present(pgd_t pgd) { return 1; }
131static inline void pgd_clear(pgd_t *pgdp) { }
132
133#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) 123#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
134#define pte_page(x) pfn_to_page(pte_pfn(x)) 124#define pte_page(x) pfn_to_page(pte_pfn(x))
135#define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) 125#define pte_pfn(x) ((unsigned long)((x).pte_high >> 6))
@@ -166,12 +156,6 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
166/* to find an entry in a page-table-directory */ 156/* to find an entry in a page-table-directory */
167#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) 157#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
168 158
169/* Find an entry in the second-level page table.. */
170static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
171{
172 return (pmd_t *) dir;
173}
174
175/* Find an entry in the third-level page table.. */ 159/* Find an entry in the third-level page table.. */
176#define __pte_offset(address) \ 160#define __pte_offset(address) \
177 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) 161 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index 1011e0635f56..ac5517fa1ee4 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -16,13 +16,15 @@
16#include <asm/page.h> 16#include <asm/page.h>
17#include <asm/cachectl.h> 17#include <asm/cachectl.h>
18 18
19#include <asm-generic/pgtable-nopud.h>
20
19/* 21/*
20 * Each address space has 2 4K pages as its page directory, giving 1024 22 * Each address space has 2 4K pages as its page directory, giving 1024
21 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a 23 * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
22 * pair of 4K pages, giving 1024 (== PTRS_PER_PMD) 8 byte pointers to 24 * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
23 * page tables. Each page table is a single 4K page, giving 512 (== 25 * tables. Each page table is also a single 4K page, giving 512 (==
24 * PTRS_PER_PTE) 8 byte ptes. Each pgde is initialized to point to 26 * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
25 * invalid_pmd_table, each pmde is initialized to point to 27 * invalid_pmd_table, each pmd entry is initialized to point to
26 * invalid_pte_table, each pte is initialized to 0. When memory is low, 28 * invalid_pte_table, each pte is initialized to 0. When memory is low,
27 * and a pmd table or a page table allocation fails, empty_bad_pmd_table 29 * and a pmd table or a page table allocation fails, empty_bad_pmd_table
28 * and empty_bad_page_table is returned back to higher layer code, so 30 * and empty_bad_page_table is returned back to higher layer code, so
@@ -36,17 +38,17 @@
36 */ 38 */
37 39
38/* PMD_SHIFT determines the size of the area a second-level page table can map */ 40/* PMD_SHIFT determines the size of the area a second-level page table can map */
39#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - 3)) 41#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
40#define PMD_SIZE (1UL << PMD_SHIFT) 42#define PMD_SIZE (1UL << PMD_SHIFT)
41#define PMD_MASK (~(PMD_SIZE-1)) 43#define PMD_MASK (~(PMD_SIZE-1))
42 44
43/* PGDIR_SHIFT determines what a third-level page table entry can map */ 45/* PGDIR_SHIFT determines what a third-level page table entry can map */
44#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + 1 - 3)) 46#define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
45#define PGDIR_SIZE (1UL << PGDIR_SHIFT) 47#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
46#define PGDIR_MASK (~(PGDIR_SIZE-1)) 48#define PGDIR_MASK (~(PGDIR_SIZE-1))
47 49
48/* 50/*
49 * For 4kB page size we use a 3 level page tree and a 8kB pmd and pgds which 51 * For 4kB page size we use a 3 level page tree and an 8kB pud, which
50 * permits us mapping 40 bits of virtual address space. 52 * permits us mapping 40 bits of virtual address space.
51 * 53 *
52 * We used to implement 41 bits by having an order 1 pmd level but that seemed 54 * We used to implement 41 bits by having an order 1 pmd level but that seemed
@@ -65,21 +67,25 @@
65 */ 67 */
66#ifdef CONFIG_PAGE_SIZE_4KB 68#ifdef CONFIG_PAGE_SIZE_4KB
67#define PGD_ORDER 1 69#define PGD_ORDER 1
70#define PUD_ORDER aieeee_attempt_to_allocate_pud
68#define PMD_ORDER 0 71#define PMD_ORDER 0
69#define PTE_ORDER 0 72#define PTE_ORDER 0
70#endif 73#endif
71#ifdef CONFIG_PAGE_SIZE_8KB 74#ifdef CONFIG_PAGE_SIZE_8KB
72#define PGD_ORDER 0 75#define PGD_ORDER 0
76#define PUD_ORDER aieeee_attempt_to_allocate_pud
73#define PMD_ORDER 0 77#define PMD_ORDER 0
74#define PTE_ORDER 0 78#define PTE_ORDER 0
75#endif 79#endif
76#ifdef CONFIG_PAGE_SIZE_16KB 80#ifdef CONFIG_PAGE_SIZE_16KB
77#define PGD_ORDER 0 81#define PGD_ORDER 0
82#define PUD_ORDER aieeee_attempt_to_allocate_pud
78#define PMD_ORDER 0 83#define PMD_ORDER 0
79#define PTE_ORDER 0 84#define PTE_ORDER 0
80#endif 85#endif
81#ifdef CONFIG_PAGE_SIZE_64KB 86#ifdef CONFIG_PAGE_SIZE_64KB
82#define PGD_ORDER 0 87#define PGD_ORDER 0
88#define PUD_ORDER aieeee_attempt_to_allocate_pud
83#define PMD_ORDER 0 89#define PMD_ORDER 0
84#define PTE_ORDER 0 90#define PTE_ORDER 0
85#endif 91#endif
@@ -102,10 +108,10 @@
102#define pgd_ERROR(e) \ 108#define pgd_ERROR(e) \
103 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) 109 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
104 110
105extern pte_t invalid_pte_table[PAGE_SIZE/sizeof(pte_t)]; 111extern pte_t invalid_pte_table[PTRS_PER_PTE];
106extern pte_t empty_bad_page_table[PAGE_SIZE/sizeof(pte_t)]; 112extern pte_t empty_bad_page_table[PTRS_PER_PTE];
107extern pmd_t invalid_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)]; 113extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
108extern pmd_t empty_bad_pmd_table[2*PAGE_SIZE/sizeof(pmd_t)]; 114extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
109 115
110/* 116/*
111 * Empty pmd entries point to the invalid_pte_table. 117 * Empty pmd entries point to the invalid_pte_table.
@@ -130,21 +136,24 @@ static inline void pmd_clear(pmd_t *pmdp)
130/* 136/*
131 * Empty pgd entries point to the invalid_pmd_table. 137 * Empty pgd entries point to the invalid_pmd_table.
132 */ 138 */
133static inline int pgd_none(pgd_t pgd) 139static inline int pud_none(pud_t pud)
134{ 140{
135 return pgd_val(pgd) == (unsigned long) invalid_pmd_table; 141 return pud_val(pud) == (unsigned long) invalid_pmd_table;
136} 142}
137 143
138#define pgd_bad(pgd) (pgd_val(pgd) &~ PAGE_MASK) 144static inline int pud_bad(pud_t pud)
145{
146 return pud_val(pud) & ~PAGE_MASK;
147}
139 148
140static inline int pgd_present(pgd_t pgd) 149static inline int pud_present(pud_t pud)
141{ 150{
142 return pgd_val(pgd) != (unsigned long) invalid_pmd_table; 151 return pud_val(pud) != (unsigned long) invalid_pmd_table;
143} 152}
144 153
145static inline void pgd_clear(pgd_t *pgdp) 154static inline void pud_clear(pud_t *pudp)
146{ 155{
147 pgd_val(*pgdp) = ((unsigned long) invalid_pmd_table); 156 pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
148} 157}
149 158
150#define pte_page(x) pfn_to_page((unsigned long)((pte_val(x) >> PAGE_SHIFT))) 159#define pte_page(x) pfn_to_page((unsigned long)((pte_val(x) >> PAGE_SHIFT)))
@@ -162,20 +171,20 @@ static inline void pgd_clear(pgd_t *pgdp)
162/* to find an entry in a kernel page-table-directory */ 171/* to find an entry in a kernel page-table-directory */
163#define pgd_offset_k(address) pgd_offset(&init_mm, 0) 172#define pgd_offset_k(address) pgd_offset(&init_mm, 0)
164 173
165#define pgd_index(address) ((address) >> PGDIR_SHIFT) 174#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
166 175
167/* to find an entry in a page-table-directory */ 176/* to find an entry in a page-table-directory */
168#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr)) 177#define pgd_offset(mm,addr) ((mm)->pgd + pgd_index(addr))
169 178
170static inline unsigned long pgd_page(pgd_t pgd) 179static inline unsigned long pud_page(pud_t pud)
171{ 180{
172 return pgd_val(pgd); 181 return pud_val(pud);
173} 182}
174 183
175/* Find an entry in the second-level page table.. */ 184/* Find an entry in the second-level page table.. */
176static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address) 185static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
177{ 186{
178 return (pmd_t *) pgd_page(*dir) + 187 return (pmd_t *) pud_page(*pud) +
179 ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1)); 188 ((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
180} 189}
181 190
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index eaf5d9b3a0e1..34d06fe7caac 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -8,8 +8,6 @@
8#ifndef _ASM_PGTABLE_H 8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H 9#define _ASM_PGTABLE_H
10 10
11#include <asm-generic/4level-fixup.h>
12
13#include <linux/config.h> 11#include <linux/config.h>
14#ifdef CONFIG_32BIT 12#ifdef CONFIG_32BIT
15#include <asm/pgtable-32.h> 13#include <asm/pgtable-32.h>
@@ -148,11 +146,18 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
148#endif 146#endif
149 147
150/* 148/*
151 * (pmds are folded into pgds so this doesn't get actually called, 149 * (pmds are folded into puds so this doesn't get actually called,
152 * but the define is needed for a generic inline function.) 150 * but the define is needed for a generic inline function.)
153 */ 151 */
154#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0) 152#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
155#define set_pgd(pgdptr, pgdval) do { *(pgdptr) = (pgdval); } while(0) 153
154#ifdef CONFIG_64BIT
155/*
156 * (puds are folded into pgds so this doesn't get actually called,
157 * but the define is needed for a generic inline function.)
158 */
159#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
160#endif
156 161
157#define PGD_T_LOG2 ffz(~sizeof(pgd_t)) 162#define PGD_T_LOG2 ffz(~sizeof(pgd_t))
158#define PMD_T_LOG2 ffz(~sizeof(pmd_t)) 163#define PMD_T_LOG2 ffz(~sizeof(pmd_t))