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-rw-r--r--arch/mips/include/asm/mipsregs.h2
-rw-r--r--arch/mips/kernel/cpu-probe.c3
-rw-r--r--arch/mips/kernel/traps.c9
3 files changed, 10 insertions, 4 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 87e6207b05e4..fed1c3e9b486 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -596,7 +596,7 @@
596#define MIPS_CONF3_RXI (_ULCAST_(1) << 12) 596#define MIPS_CONF3_RXI (_ULCAST_(1) << 12)
597#define MIPS_CONF3_ULRI (_ULCAST_(1) << 13) 597#define MIPS_CONF3_ULRI (_ULCAST_(1) << 13)
598#define MIPS_CONF3_ISA (_ULCAST_(3) << 14) 598#define MIPS_CONF3_ISA (_ULCAST_(3) << 14)
599#define MIPS_CONF3_ISA_OE (_ULCAST_(3) << 16) 599#define MIPS_CONF3_ISA_OE (_ULCAST_(1) << 16)
600#define MIPS_CONF3_VZ (_ULCAST_(1) << 23) 600#define MIPS_CONF3_VZ (_ULCAST_(1) << 23)
601 601
602#define MIPS_CONF4_MMUSIZEEXT (_ULCAST_(255) << 0) 602#define MIPS_CONF4_MMUSIZEEXT (_ULCAST_(255) << 0)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index f87039dbefe9..c7b1b3c5a761 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -269,9 +269,6 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
269 c->options |= MIPS_CPU_ULRI; 269 c->options |= MIPS_CPU_ULRI;
270 if (config3 & MIPS_CONF3_ISA) 270 if (config3 & MIPS_CONF3_ISA)
271 c->options |= MIPS_CPU_MICROMIPS; 271 c->options |= MIPS_CPU_MICROMIPS;
272#ifdef CONFIG_CPU_MICROMIPS
273 write_c0_config3(read_c0_config3() | MIPS_CONF3_ISA_OE);
274#endif
275 if (config3 & MIPS_CONF3_VZ) 272 if (config3 & MIPS_CONF3_VZ)
276 c->ases |= MIPS_ASE_VZ; 273 c->ases |= MIPS_ASE_VZ;
277 274
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index d97ea234e2d3..b0f3ad26063e 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1878,6 +1878,15 @@ void __init trap_init(void)
1878 ebase += (read_c0_ebase() & 0x3ffff000); 1878 ebase += (read_c0_ebase() & 0x3ffff000);
1879 } 1879 }
1880 1880
1881 if (cpu_has_mmips) {
1882 unsigned int config3 = read_c0_config3();
1883
1884 if (IS_ENABLED(CONFIG_CPU_MICROMIPS))
1885 write_c0_config3(config3 | MIPS_CONF3_ISA_OE);
1886 else
1887 write_c0_config3(config3 & ~MIPS_CONF3_ISA_OE);
1888 }
1889
1881 if (board_ebase_setup) 1890 if (board_ebase_setup)
1882 board_ebase_setup(); 1891 board_ebase_setup();
1883 per_cpu_trap_init(true); 1892 per_cpu_trap_init(true);