diff options
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 103 |
1 files changed, 57 insertions, 46 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 6907cd313477..ad83bcd9c409 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -4332,8 +4332,8 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev) | |||
4332 | return 0; | 4332 | return 0; |
4333 | } | 4333 | } |
4334 | 4334 | ||
4335 | static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, | 4335 | static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, bool bw40, |
4336 | bool bw40, u8 rfcsr24, u8 filter_target) | 4336 | u8 filter_target) |
4337 | { | 4337 | { |
4338 | unsigned int i; | 4338 | unsigned int i; |
4339 | u8 bbp; | 4339 | u8 bbp; |
@@ -4341,6 +4341,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, | |||
4341 | u8 passband; | 4341 | u8 passband; |
4342 | u8 stopband; | 4342 | u8 stopband; |
4343 | u8 overtuned = 0; | 4343 | u8 overtuned = 0; |
4344 | u8 rfcsr24 = (bw40) ? 0x27 : 0x07; | ||
4344 | 4345 | ||
4345 | rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24); | 4346 | rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24); |
4346 | 4347 | ||
@@ -4409,6 +4410,52 @@ static void rt2800_rf_init_calibration(struct rt2x00_dev *rt2x00dev, | |||
4409 | rt2800_rfcsr_write(rt2x00dev, rf_reg, rfcsr); | 4410 | rt2800_rfcsr_write(rt2x00dev, rf_reg, rfcsr); |
4410 | } | 4411 | } |
4411 | 4412 | ||
4413 | static void rt2800_rx_filter_calibration(struct rt2x00_dev *rt2x00dev) | ||
4414 | { | ||
4415 | struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; | ||
4416 | u8 filter_tgt_bw20; | ||
4417 | u8 filter_tgt_bw40; | ||
4418 | u8 rfcsr, bbp; | ||
4419 | |||
4420 | /* | ||
4421 | * TODO: sync filter_tgt values with vendor driver | ||
4422 | */ | ||
4423 | if (rt2x00_rt(rt2x00dev, RT3070)) { | ||
4424 | filter_tgt_bw20 = 0x16; | ||
4425 | filter_tgt_bw40 = 0x19; | ||
4426 | } else { | ||
4427 | filter_tgt_bw20 = 0x13; | ||
4428 | filter_tgt_bw40 = 0x15; | ||
4429 | } | ||
4430 | |||
4431 | drv_data->calibration_bw20 = | ||
4432 | rt2800_init_rx_filter(rt2x00dev, false, filter_tgt_bw20); | ||
4433 | drv_data->calibration_bw40 = | ||
4434 | rt2800_init_rx_filter(rt2x00dev, true, filter_tgt_bw40); | ||
4435 | |||
4436 | /* | ||
4437 | * Save BBP 25 & 26 values for later use in channel switching (for 3052) | ||
4438 | */ | ||
4439 | rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25); | ||
4440 | rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26); | ||
4441 | |||
4442 | /* | ||
4443 | * Set back to initial state | ||
4444 | */ | ||
4445 | rt2800_bbp_write(rt2x00dev, 24, 0); | ||
4446 | |||
4447 | rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr); | ||
4448 | rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0); | ||
4449 | rt2800_rfcsr_write(rt2x00dev, 22, rfcsr); | ||
4450 | |||
4451 | /* | ||
4452 | * Set BBP back to BW20 | ||
4453 | */ | ||
4454 | rt2800_bbp_read(rt2x00dev, 4, &bbp); | ||
4455 | rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0); | ||
4456 | rt2800_bbp_write(rt2x00dev, 4, bbp); | ||
4457 | } | ||
4458 | |||
4412 | static void rt2800_normal_mode_setup_5xxx(struct rt2x00_dev *rt2x00dev) | 4459 | static void rt2800_normal_mode_setup_5xxx(struct rt2x00_dev *rt2x00dev) |
4413 | { | 4460 | { |
4414 | u8 reg; | 4461 | u8 reg; |
@@ -4534,6 +4581,8 @@ static void rt2800_init_rfcsr_30xx(struct rt2x00_dev *rt2x00dev) | |||
4534 | rt2x00_set_field32(®, GPIO_SWITCH_5, 0); | 4581 | rt2x00_set_field32(®, GPIO_SWITCH_5, 0); |
4535 | rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); | 4582 | rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); |
4536 | } | 4583 | } |
4584 | |||
4585 | rt2800_rx_filter_calibration(rt2x00dev); | ||
4537 | } | 4586 | } |
4538 | 4587 | ||
4539 | static void rt2800_init_rfcsr_3290(struct rt2x00_dev *rt2x00dev) | 4588 | static void rt2800_init_rfcsr_3290(struct rt2x00_dev *rt2x00dev) |
@@ -4661,6 +4710,8 @@ static void rt2800_init_rfcsr_3352(struct rt2x00_dev *rt2x00dev) | |||
4661 | rt2800_rfcsr_write(rt2x00dev, 61, 0x00); | 4710 | rt2800_rfcsr_write(rt2x00dev, 61, 0x00); |
4662 | rt2800_rfcsr_write(rt2x00dev, 62, 0x00); | 4711 | rt2800_rfcsr_write(rt2x00dev, 62, 0x00); |
4663 | rt2800_rfcsr_write(rt2x00dev, 63, 0x00); | 4712 | rt2800_rfcsr_write(rt2x00dev, 63, 0x00); |
4713 | |||
4714 | rt2800_rx_filter_calibration(rt2x00dev); | ||
4664 | } | 4715 | } |
4665 | 4716 | ||
4666 | static void rt2800_init_rfcsr_3390(struct rt2x00_dev *rt2x00dev) | 4717 | static void rt2800_init_rfcsr_3390(struct rt2x00_dev *rt2x00dev) |
@@ -4705,6 +4756,8 @@ static void rt2800_init_rfcsr_3390(struct rt2x00_dev *rt2x00dev) | |||
4705 | rt2800_register_read(rt2x00dev, GPIO_SWITCH, ®); | 4756 | rt2800_register_read(rt2x00dev, GPIO_SWITCH, ®); |
4706 | rt2x00_set_field32(®, GPIO_SWITCH_5, 0); | 4757 | rt2x00_set_field32(®, GPIO_SWITCH_5, 0); |
4707 | rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); | 4758 | rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); |
4759 | |||
4760 | rt2800_rx_filter_calibration(rt2x00dev); | ||
4708 | } | 4761 | } |
4709 | 4762 | ||
4710 | static void rt2800_init_rfcsr_3572(struct rt2x00_dev *rt2x00dev) | 4763 | static void rt2800_init_rfcsr_3572(struct rt2x00_dev *rt2x00dev) |
@@ -4759,6 +4812,8 @@ static void rt2800_init_rfcsr_3572(struct rt2x00_dev *rt2x00dev) | |||
4759 | rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 0); | 4812 | rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 0); |
4760 | rt2x00_set_field32(®, LDO_CFG0_BGSEL, 1); | 4813 | rt2x00_set_field32(®, LDO_CFG0_BGSEL, 1); |
4761 | rt2800_register_write(rt2x00dev, LDO_CFG0, reg); | 4814 | rt2800_register_write(rt2x00dev, LDO_CFG0, reg); |
4815 | |||
4816 | rt2800_rx_filter_calibration(rt2x00dev); | ||
4762 | } | 4817 | } |
4763 | 4818 | ||
4764 | static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev) | 4819 | static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev) |
@@ -5011,50 +5066,6 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
5011 | return 0; | 5066 | return 0; |
5012 | } | 5067 | } |
5013 | 5068 | ||
5014 | /* | ||
5015 | * Set RX Filter calibration for 20MHz and 40MHz | ||
5016 | */ | ||
5017 | if (rt2x00_rt(rt2x00dev, RT3070)) { | ||
5018 | drv_data->calibration_bw20 = | ||
5019 | rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16); | ||
5020 | drv_data->calibration_bw40 = | ||
5021 | rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19); | ||
5022 | } else if (rt2x00_rt(rt2x00dev, RT3071) || | ||
5023 | rt2x00_rt(rt2x00dev, RT3090) || | ||
5024 | rt2x00_rt(rt2x00dev, RT3352) || | ||
5025 | rt2x00_rt(rt2x00dev, RT3390) || | ||
5026 | rt2x00_rt(rt2x00dev, RT3572)) { | ||
5027 | drv_data->calibration_bw20 = | ||
5028 | rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x13); | ||
5029 | drv_data->calibration_bw40 = | ||
5030 | rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); | ||
5031 | } | ||
5032 | |||
5033 | /* | ||
5034 | * Save BBP 25 & 26 values for later use in channel switching | ||
5035 | */ | ||
5036 | rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25); | ||
5037 | rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26); | ||
5038 | |||
5039 | if (!rt2x00_rt(rt2x00dev, RT5390) && | ||
5040 | !rt2x00_rt(rt2x00dev, RT5392)) { | ||
5041 | /* | ||
5042 | * Set back to initial state | ||
5043 | */ | ||
5044 | rt2800_bbp_write(rt2x00dev, 24, 0); | ||
5045 | |||
5046 | rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr); | ||
5047 | rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0); | ||
5048 | rt2800_rfcsr_write(rt2x00dev, 22, rfcsr); | ||
5049 | |||
5050 | /* | ||
5051 | * Set BBP back to BW20 | ||
5052 | */ | ||
5053 | rt2800_bbp_read(rt2x00dev, 4, &bbp); | ||
5054 | rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0); | ||
5055 | rt2800_bbp_write(rt2x00dev, 4, bbp); | ||
5056 | } | ||
5057 | |||
5058 | if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F) || | 5069 | if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F) || |
5059 | rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || | 5070 | rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || |
5060 | rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) || | 5071 | rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) || |