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-rw-r--r--arch/arm/mach-integrator/Kconfig1
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c21
2 files changed, 4 insertions, 18 deletions
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index d701d32a07f1..dfd18f3b50e8 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -4,6 +4,7 @@ menu "Integrator Options"
4 4
5config ARCH_INTEGRATOR_AP 5config ARCH_INTEGRATOR_AP
6 bool "Support Integrator/AP and Integrator/PP2 platforms" 6 bool "Support Integrator/AP and Integrator/PP2 platforms"
7 select CLKSRC_MMIO
7 select MIGHT_HAVE_PCI 8 select MIGHT_HAVE_PCI
8 help 9 help
9 Include support for the ARM(R) Integrator/AP and 10 Include support for the ARM(R) Integrator/AP and
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index d3e96451529c..6b151288f66c 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -335,25 +335,9 @@ static void __init ap_init(void)
335 335
336static unsigned long timer_reload; 336static unsigned long timer_reload;
337 337
338static void __iomem * const clksrc_base = (void __iomem *)TIMER2_VA_BASE;
339
340static cycle_t timersp_read(struct clocksource *cs)
341{
342 return ~(readl(clksrc_base + TIMER_VALUE) & 0xffff);
343}
344
345static struct clocksource clocksource_timersp = {
346 .name = "timer2",
347 .rating = 200,
348 .read = timersp_read,
349 .mask = CLOCKSOURCE_MASK(16),
350 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
351};
352
353static void integrator_clocksource_init(u32 khz) 338static void integrator_clocksource_init(u32 khz)
354{ 339{
355 struct clocksource *cs = &clocksource_timersp; 340 void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
356 void __iomem *base = clksrc_base;
357 u32 ctrl = TIMER_CTRL_ENABLE; 341 u32 ctrl = TIMER_CTRL_ENABLE;
358 342
359 if (khz >= 1500) { 343 if (khz >= 1500) {
@@ -364,7 +348,8 @@ static void integrator_clocksource_init(u32 khz)
364 writel(ctrl, base + TIMER_CTRL); 348 writel(ctrl, base + TIMER_CTRL);
365 writel(0xffff, base + TIMER_LOAD); 349 writel(0xffff, base + TIMER_LOAD);
366 350
367 clocksource_register_khz(cs, khz); 351 clocksource_mmio_init(base + TIMER_VALUE, "timer2",
352 khz * 1000, 200, 16, clocksource_mmio_readl_down);
368} 353}
369 354
370static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE; 355static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;