diff options
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 19 |
1 files changed, 6 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 555164e270a7..871066a8c630 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -1174,23 +1174,16 @@ int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk) | |||
| 1174 | 1174 | ||
| 1175 | void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) | 1175 | void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) |
| 1176 | { | 1176 | { |
| 1177 | u16 ctl, v; | 1177 | int readrq; |
| 1178 | int err; | 1178 | u16 v; |
| 1179 | |||
| 1180 | err = pcie_capability_read_word(rdev->pdev, PCI_EXP_DEVCTL, &ctl); | ||
| 1181 | if (err) | ||
| 1182 | return; | ||
| 1183 | |||
| 1184 | v = (ctl & PCI_EXP_DEVCTL_READRQ) >> 12; | ||
| 1185 | 1179 | ||
| 1180 | readrq = pcie_get_readrq(rdev->pdev); | ||
| 1181 | v = ffs(readrq) - 8; | ||
| 1186 | /* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it | 1182 | /* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it |
| 1187 | * to avoid hangs or perfomance issues | 1183 | * to avoid hangs or perfomance issues |
| 1188 | */ | 1184 | */ |
| 1189 | if ((v == 0) || (v == 6) || (v == 7)) { | 1185 | if ((v == 0) || (v == 6) || (v == 7)) |
| 1190 | ctl &= ~PCI_EXP_DEVCTL_READRQ; | 1186 | pcie_set_readrq(rdev->pdev, 512); |
| 1191 | ctl |= (2 << 12); | ||
| 1192 | pcie_capability_write_word(rdev->pdev, PCI_EXP_DEVCTL, ctl); | ||
| 1193 | } | ||
| 1194 | } | 1187 | } |
| 1195 | 1188 | ||
| 1196 | static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc) | 1189 | static bool dce4_is_in_vblank(struct radeon_device *rdev, int crtc) |
