4 files changed, 1739 insertions, 0 deletions

diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index d471d1e5a744..b303a3f8a9f8 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -517,6 +517,13 @@ config VIDEO_NOON010PC30
 
 source "drivers/media/video/m5mols/Kconfig"
 
+config VIDEO_S5K6AA
+        tristate "Samsung S5K6AAFX sensor support"
+        depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
+        ---help---
+          This is a V4L2 sensor-level driver for Samsung S5K6AA(FX) 1.3M
+          camera sensor with an embedded SoC image signal processor.
+
 comment "Flash devices"
 
 config VIDEO_ADP1653
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index faba1e333110..117f9c4b4cb9 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -72,6 +72,7 @@ obj-$(CONFIG_VIDEO_MT9V032) += mt9v032.o
 obj-$(CONFIG_VIDEO_SR030PC30)   += sr030pc30.o
 obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o
 obj-$(CONFIG_VIDEO_M5MOLS)      += m5mols/
+obj-$(CONFIG_VIDEO_S5K6AA)      += s5k6aa.o
 obj-$(CONFIG_VIDEO_ADP1653)     += adp1653.o
 
 obj-$(CONFIG_SOC_CAMERA_IMX074)         += imx074.o
diff --git a/drivers/media/video/s5k6aa.c b/drivers/media/video/s5k6aa.c
new file mode 100644
index 000000000000..2446736b7871
--- /dev/null
+++ b/drivers/media/video/s5k6aa.c
@@ -0,0 +1,1680 @@
+/*
+ * Driver for Samsung S5K6AAFX SXGA 1/6" 1.3M CMOS Image Sensor
+ * with embedded SoC ISP.
+ *
+ * Copyright (C) 2011, Samsung Electronics Co., Ltd.
+ * Sylwester Nawrocki <s.nawrocki@samsung.com>
+ *
+ * Based on a driver authored by Dongsoo Nathaniel Kim.
+ * Copyright (C) 2009, Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/media.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+
+#include <media/media-entity.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-subdev.h>
+#include <media/v4l2-mediabus.h>
+#include <media/s5k6aa.h>
+
+static int debug;
+module_param(debug, int, 0644);
+
+#define DRIVER_NAME                     "S5K6AA"
+
+/* The token to indicate array termination */
+#define S5K6AA_TERM                     0xffff
+#define S5K6AA_OUT_WIDTH_DEF            640
+#define S5K6AA_OUT_HEIGHT_DEF           480
+#define S5K6AA_WIN_WIDTH_MAX            1280
+#define S5K6AA_WIN_HEIGHT_MAX           1024
+#define S5K6AA_WIN_WIDTH_MIN            8
+#define S5K6AA_WIN_HEIGHT_MIN           8
+
+/*
+ * H/W register Interface (0xD0000000 - 0xD0000FFF)
+ */
+#define AHB_MSB_ADDR_PTR                0xfcfc
+#define GEN_REG_OFFSH                   0xd000
+#define REG_CMDWR_ADDRH                 0x0028
+#define REG_CMDWR_ADDRL                 0x002a
+#define REG_CMDRD_ADDRH                 0x002c
+#define REG_CMDRD_ADDRL                 0x002e
+#define REG_CMDBUF0_ADDR                0x0f12
+#define REG_CMDBUF1_ADDR                0x0f10
+
+/*
+ * Host S/W Register interface (0x70000000 - 0x70002000)
+ * The value of the two most significant address bytes is 0x7000,
+ * (HOST_SWIF_OFFS_H). The register addresses below specify 2 LSBs.
+ */
+#define HOST_SWIF_OFFSH                 0x7000
+
+/* Initialization parameters */
+/* Master clock frequency in KHz */
+#define REG_I_INCLK_FREQ_L              0x01b8
+#define REG_I_INCLK_FREQ_H              0x01ba
+#define  MIN_MCLK_FREQ_KHZ              6000U
+#define  MAX_MCLK_FREQ_KHZ              27000U
+#define REG_I_USE_NPVI_CLOCKS           0x01c6
+#define REG_I_USE_NMIPI_CLOCKS          0x01c8
+
+/* Clock configurations, n = 0..2. REG_I_* frequency unit is 4 kHz. */
+#define REG_I_OPCLK_4KHZ(n)             ((n) * 6 + 0x01cc)
+#define REG_I_MIN_OUTRATE_4KHZ(n)       ((n) * 6 + 0x01ce)
+#define REG_I_MAX_OUTRATE_4KHZ(n)       ((n) * 6 + 0x01d0)
+#define  SYS_PLL_OUT_FREQ               (48000000 / 4000)
+#define  PCLK_FREQ_MIN                  (24000000 / 4000)
+#define  PCLK_FREQ_MAX                  (48000000 / 4000)
+#define REG_I_INIT_PARAMS_UPDATED       0x01e0
+#define REG_I_ERROR_INFO                0x01e2
+
+/* General purpose parameters */
+#define REG_USER_BRIGHTNESS             0x01e4
+#define REG_USER_CONTRAST               0x01e6
+#define REG_USER_SATURATION             0x01e8
+#define REG_USER_SHARPBLUR              0x01ea
+
+#define REG_G_SPEC_EFFECTS              0x01ee
+#define REG_G_ENABLE_PREV               0x01f0
+#define REG_G_ENABLE_PREV_CHG           0x01f2
+#define REG_G_NEW_CFG_SYNC              0x01f8
+#define REG_G_PREVZOOM_IN_WIDTH         0x020a
+#define REG_G_PREVZOOM_IN_HEIGHT        0x020c
+#define REG_G_PREVZOOM_IN_XOFFS         0x020e
+#define REG_G_PREVZOOM_IN_YOFFS         0x0210
+#define REG_G_INPUTS_CHANGE_REQ         0x021a
+#define REG_G_ACTIVE_PREV_CFG           0x021c
+#define REG_G_PREV_CFG_CHG              0x021e
+#define REG_G_PREV_OPEN_AFTER_CH        0x0220
+#define REG_G_PREV_CFG_ERROR            0x0222
+
+/* Preview control section. n = 0...4. */
+#define PREG(n, x)                      ((n) * 0x26 + x)
+#define REG_P_OUT_WIDTH(n)              PREG(n, 0x0242)
+#define REG_P_OUT_HEIGHT(n)             PREG(n, 0x0244)
+#define REG_P_FMT(n)                    PREG(n, 0x0246)
+#define REG_P_MAX_OUT_RATE(n)           PREG(n, 0x0248)
+#define REG_P_MIN_OUT_RATE(n)           PREG(n, 0x024a)
+#define REG_P_PVI_MASK(n)               PREG(n, 0x024c)
+#define REG_P_CLK_INDEX(n)              PREG(n, 0x024e)
+#define REG_P_FR_RATE_TYPE(n)           PREG(n, 0x0250)
+#define  FR_RATE_DYNAMIC                0
+#define  FR_RATE_FIXED                  1
+#define  FR_RATE_FIXED_ACCURATE         2
+#define REG_P_FR_RATE_Q_TYPE(n)         PREG(n, 0x0252)
+#define  FR_RATE_Q_BEST_FRRATE          1 /* Binning enabled */
+#define  FR_RATE_Q_BEST_QUALITY         2 /* Binning disabled */
+/* Frame period in 0.1 ms units */
+#define REG_P_MAX_FR_TIME(n)            PREG(n, 0x0254)
+#define REG_P_MIN_FR_TIME(n)            PREG(n, 0x0256)
+/* Conversion to REG_P_[MAX/MIN]_FR_TIME value; __t: time in us */
+#define  US_TO_FR_TIME(__t)             ((__t) / 100)
+#define  S5K6AA_MIN_FR_TIME             33300  /* us */
+#define  S5K6AA_MAX_FR_TIME             650000 /* us */
+#define  S5K6AA_MAX_HIGHRES_FR_TIME     666    /* x100 us */
+/* The below 5 registers are for "device correction" values */
+#define REG_P_COLORTEMP(n)              PREG(n, 0x025e)
+#define REG_P_PREV_MIRROR(n)            PREG(n, 0x0262)
+
+/* Extended image property controls */
+/* Exposure time in 10 us units */
+#define REG_SF_USR_EXPOSURE_L           0x03c6
+#define REG_SF_USR_EXPOSURE_H           0x03c8
+#define REG_SF_USR_EXPOSURE_CHG         0x03ca
+#define REG_SF_USR_TOT_GAIN             0x03cc
+#define REG_SF_USR_TOT_GAIN_CHG         0x03ce
+#define REG_SF_RGAIN                    0x03d0
+#define REG_SF_RGAIN_CHG                0x03d2
+#define REG_SF_GGAIN                    0x03d4
+#define REG_SF_GGAIN_CHG                0x03d6
+#define REG_SF_BGAIN                    0x03d8
+#define REG_SF_BGAIN_CHG                0x03da
+#define REG_SF_FLICKER_QUANT            0x03dc
+#define REG_SF_FLICKER_QUANT_CHG        0x03de
+
+/* Output interface (parallel/MIPI) setup */
+#define REG_OIF_EN_MIPI_LANES           0x03fa
+#define REG_OIF_EN_PACKETS              0x03fc
+#define REG_OIF_CFG_CHG                 0x03fe
+
+/* Auto-algorithms enable mask */
+#define REG_DBG_AUTOALG_EN              0x0400
+#define  AALG_ALL_EN_MASK               (1 << 0)
+#define  AALG_AE_EN_MASK                (1 << 1)
+#define  AALG_DIVLEI_EN_MASK            (1 << 2)
+#define  AALG_WB_EN_MASK                (1 << 3)
+#define  AALG_FLICKER_EN_MASK           (1 << 5)
+#define  AALG_FIT_EN_MASK               (1 << 6)
+#define  AALG_WRHW_EN_MASK              (1 << 7)