diff options
-rw-r--r-- | arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 21 | ||||
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8974.dtsi | 15 |
2 files changed, 34 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index b4dfb01fe6fb..47370494d0f8 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | |||
@@ -22,6 +22,13 @@ | |||
22 | 22 | ||
23 | 23 | ||
24 | pinctrl@fd510000 { | 24 | pinctrl@fd510000 { |
25 | i2c11_pins: i2c11 { | ||
26 | mux { | ||
27 | pins = "gpio83", "gpio84"; | ||
28 | function = "blsp_i2c11"; | ||
29 | }; | ||
30 | }; | ||
31 | |||
25 | spi8_default: spi8_default { | 32 | spi8_default: spi8_default { |
26 | mosi { | 33 | mosi { |
27 | pins = "gpio45"; | 34 | pins = "gpio45"; |
@@ -41,5 +48,19 @@ | |||
41 | }; | 48 | }; |
42 | }; | 49 | }; |
43 | }; | 50 | }; |
51 | |||
52 | i2c@f9967000 { | ||
53 | status = "okay"; | ||
54 | clock-frequency = <200000>; | ||
55 | pinctrl-0 = <&i2c11_pins>; | ||
56 | pinctrl-names = "default"; | ||
57 | |||
58 | eeprom: eeprom@52 { | ||
59 | compatible = "atmel,24c128"; | ||
60 | reg = <0x52>; | ||
61 | pagesize = <32>; | ||
62 | read-only; | ||
63 | }; | ||
64 | }; | ||
44 | }; | 65 | }; |
45 | }; | 66 | }; |
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 69dca2aca25a..e265ec16a787 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi | |||
@@ -1,8 +1,8 @@ | |||
1 | /dts-v1/; | 1 | /dts-v1/; |
2 | 2 | ||
3 | #include "skeleton.dtsi" | 3 | #include <dt-bindings/interrupt-controller/irq.h> |
4 | |||
5 | #include <dt-bindings/clock/qcom,gcc-msm8974.h> | 4 | #include <dt-bindings/clock/qcom,gcc-msm8974.h> |
5 | #include "skeleton.dtsi" | ||
6 | 6 | ||
7 | / { | 7 | / { |
8 | model = "Qualcomm MSM8974"; | 8 | model = "Qualcomm MSM8974"; |
@@ -236,5 +236,16 @@ | |||
236 | #interrupt-cells = <2>; | 236 | #interrupt-cells = <2>; |
237 | interrupts = <0 208 0>; | 237 | interrupts = <0 208 0>; |
238 | }; | 238 | }; |
239 | |||
240 | blsp_i2c11: i2c@f9967000 { | ||
241 | status = "disable"; | ||
242 | compatible = "qcom,i2c-qup-v2.1.1"; | ||
243 | reg = <0xf9967000 0x1000>; | ||
244 | interrupts = <0 105 IRQ_TYPE_NONE>; | ||
245 | clocks = <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; | ||
246 | clock-names = "core", "iface"; | ||
247 | #address-cells = <1>; | ||
248 | #size-cells = <0>; | ||
249 | }; | ||
239 | }; | 250 | }; |
240 | }; | 251 | }; |