diff options
-rw-r--r-- | arch/arm/mach-mxs/gpio.c | 30 | ||||
-rw-r--r-- | arch/arm/mach-mxs/icoll.c | 16 |
2 files changed, 23 insertions, 23 deletions
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c index cb0c0e83a527..61991e4dde44 100644 --- a/arch/arm/mach-mxs/gpio.c +++ b/arch/arm/mach-mxs/gpio.c | |||
@@ -68,29 +68,29 @@ static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index, | |||
68 | } | 68 | } |
69 | } | 69 | } |
70 | 70 | ||
71 | static void mxs_gpio_ack_irq(u32 irq) | 71 | static void mxs_gpio_ack_irq(struct irq_data *d) |
72 | { | 72 | { |
73 | u32 gpio = irq_to_gpio(irq); | 73 | u32 gpio = irq_to_gpio(d->irq); |
74 | clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f); | 74 | clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f); |
75 | } | 75 | } |
76 | 76 | ||
77 | static void mxs_gpio_mask_irq(u32 irq) | 77 | static void mxs_gpio_mask_irq(struct irq_data *d) |
78 | { | 78 | { |
79 | u32 gpio = irq_to_gpio(irq); | 79 | u32 gpio = irq_to_gpio(d->irq); |
80 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0); | 80 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0); |
81 | } | 81 | } |
82 | 82 | ||
83 | static void mxs_gpio_unmask_irq(u32 irq) | 83 | static void mxs_gpio_unmask_irq(struct irq_data *d) |
84 | { | 84 | { |
85 | u32 gpio = irq_to_gpio(irq); | 85 | u32 gpio = irq_to_gpio(d->irq); |
86 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1); | 86 | set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1); |
87 | } | 87 | } |
88 | 88 | ||
89 | static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset); | 89 | static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset); |
90 | 90 | ||
91 | static int mxs_gpio_set_irq_type(u32 irq, u32 type) | 91 | static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) |
92 | { | 92 | { |
93 | u32 gpio = irq_to_gpio(irq); | 93 | u32 gpio = irq_to_gpio(d->irq); |
94 | u32 pin_mask = 1 << (gpio & 31); | 94 | u32 pin_mask = 1 << (gpio & 31); |
95 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; | 95 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; |
96 | void __iomem *pin_addr; | 96 | void __iomem *pin_addr; |
@@ -160,9 +160,9 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) | |||
160 | * @param enable enable as wake-up if equal to non-zero | 160 | * @param enable enable as wake-up if equal to non-zero |
161 | * @return This function returns 0 on success. | 161 | * @return This function returns 0 on success. |
162 | */ | 162 | */ |
163 | static int mxs_gpio_set_wake_irq(u32 irq, u32 enable) | 163 | static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) |
164 | { | 164 | { |
165 | u32 gpio = irq_to_gpio(irq); | 165 | u32 gpio = irq_to_gpio(d->irq); |
166 | u32 gpio_idx = gpio & 0x1f; | 166 | u32 gpio_idx = gpio & 0x1f; |
167 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; | 167 | struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32]; |
168 | 168 | ||
@@ -182,11 +182,11 @@ static int mxs_gpio_set_wake_irq(u32 irq, u32 enable) | |||
182 | } | 182 | } |
183 | 183 | ||
184 | static struct irq_chip gpio_irq_chip = { | 184 | static struct irq_chip gpio_irq_chip = { |
185 | .ack = mxs_gpio_ack_irq, | 185 | .irq_ack = mxs_gpio_ack_irq, |
186 | .mask = mxs_gpio_mask_irq, | 186 | .irq_mask = mxs_gpio_mask_irq, |
187 | .unmask = mxs_gpio_unmask_irq, | 187 | .irq_unmask = mxs_gpio_unmask_irq, |
188 | .set_type = mxs_gpio_set_irq_type, | 188 | .irq_set_type = mxs_gpio_set_irq_type, |
189 | .set_wake = mxs_gpio_set_wake_irq, | 189 | .irq_set_wake = mxs_gpio_set_wake_irq, |
190 | }; | 190 | }; |
191 | 191 | ||
192 | static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, | 192 | static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset, |
diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index 5dd43ba70058..0f4c120fc169 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c | |||
@@ -34,7 +34,7 @@ | |||
34 | 34 | ||
35 | static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); | 35 | static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); |
36 | 36 | ||
37 | static void icoll_ack_irq(unsigned int irq) | 37 | static void icoll_ack_irq(struct irq_data *d) |
38 | { | 38 | { |
39 | /* | 39 | /* |
40 | * The Interrupt Collector is able to prioritize irqs. | 40 | * The Interrupt Collector is able to prioritize irqs. |
@@ -45,22 +45,22 @@ static void icoll_ack_irq(unsigned int irq) | |||
45 | icoll_base + HW_ICOLL_LEVELACK); | 45 | icoll_base + HW_ICOLL_LEVELACK); |
46 | } | 46 | } |
47 | 47 | ||
48 | static void icoll_mask_irq(unsigned int irq) | 48 | static void icoll_mask_irq(struct irq_data *d) |
49 | { | 49 | { |
50 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, | 50 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, |
51 | icoll_base + HW_ICOLL_INTERRUPTn_CLR(irq)); | 51 | icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->irq)); |
52 | } | 52 | } |
53 | 53 | ||
54 | static void icoll_unmask_irq(unsigned int irq) | 54 | static void icoll_unmask_irq(struct irq_data *d) |
55 | { | 55 | { |
56 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, | 56 | __raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, |
57 | icoll_base + HW_ICOLL_INTERRUPTn_SET(irq)); | 57 | icoll_base + HW_ICOLL_INTERRUPTn_SET(d->irq)); |
58 | } | 58 | } |
59 | 59 | ||
60 | static struct irq_chip mxs_icoll_chip = { | 60 | static struct irq_chip mxs_icoll_chip = { |
61 | .ack = icoll_ack_irq, | 61 | .irq_ack = icoll_ack_irq, |
62 | .mask = icoll_mask_irq, | 62 | .irq_mask = icoll_mask_irq, |
63 | .unmask = icoll_unmask_irq, | 63 | .irq_unmask = icoll_unmask_irq, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | void __init icoll_init_irq(void) | 66 | void __init icoll_init_irq(void) |