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-rw-r--r--drivers/eisa/pci_eisa.c67
1 files changed, 46 insertions, 21 deletions
diff --git a/drivers/eisa/pci_eisa.c b/drivers/eisa/pci_eisa.c
index cdae207028a7..6c3fca97d346 100644
--- a/drivers/eisa/pci_eisa.c
+++ b/drivers/eisa/pci_eisa.c
@@ -19,10 +19,10 @@
19/* There is only *one* pci_eisa device per machine, right ? */ 19/* There is only *one* pci_eisa device per machine, right ? */
20static struct eisa_root_device pci_eisa_root; 20static struct eisa_root_device pci_eisa_root;
21 21
22static int __init pci_eisa_init(struct pci_dev *pdev, 22static int __init pci_eisa_init(struct pci_dev *pdev)
23 const struct pci_device_id *ent)
24{ 23{
25 int rc; 24 int rc, i;
25 struct resource *res, *bus_res = NULL;
26 26
27 if ((rc = pci_enable_device (pdev))) { 27 if ((rc = pci_enable_device (pdev))) {
28 printk (KERN_ERR "pci_eisa : Could not enable device %s\n", 28 printk (KERN_ERR "pci_eisa : Could not enable device %s\n",
@@ -30,9 +30,30 @@ static int __init pci_eisa_init(struct pci_dev *pdev,
30 return rc; 30 return rc;
31 } 31 }
32 32
33 /*
34 * The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
35 * device, so the resources available on EISA are the same as those
36 * available on the 82375 bus. This works the same as a PCI-PCI
37 * bridge in subtractive-decode mode (see pci_read_bridge_bases()).
38 * We assume other PCI-EISA bridges are similar.
39 *
40 * eisa_root_register() can only deal with a single io port resource,
41 * so we use the first valid io port resource.
42 */
43 pci_bus_for_each_resource(pdev->bus, res, i)
44 if (res && (res->flags & IORESOURCE_IO)) {
45 bus_res = res;
46 break;
47 }
48
49 if (!bus_res) {
50 dev_err(&pdev->dev, "No resources available\n");
51 return -1;
52 }
53
33 pci_eisa_root.dev = &pdev->dev; 54 pci_eisa_root.dev = &pdev->dev;
34 pci_eisa_root.res = pdev->bus->resource[0]; 55 pci_eisa_root.res = bus_res;
35 pci_eisa_root.bus_base_addr = pdev->bus->resource[0]->start; 56 pci_eisa_root.bus_base_addr = bus_res->start;
36 pci_eisa_root.slots = EISA_MAX_SLOTS; 57 pci_eisa_root.slots = EISA_MAX_SLOTS;
37 pci_eisa_root.dma_mask = pdev->dma_mask; 58 pci_eisa_root.dma_mask = pdev->dma_mask;
38 dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root); 59 dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
@@ -45,22 +66,26 @@ static int __init pci_eisa_init(struct pci_dev *pdev,
45 return 0; 66 return 0;
46} 67}
47 68
48static struct pci_device_id pci_eisa_pci_tbl[] = { 69/*
49 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 70 * We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
50 PCI_CLASS_BRIDGE_EISA << 8, 0xffff00, 0 }, 71 * Otherwise pnp resource will get enabled early and could prevent eisa
51 { 0, } 72 * to be initialized.
52}; 73 * Also need to make sure pci_eisa_init_early() is called after
74 * x86/pci_subsys_init().
75 * So need to use subsys_initcall_sync with it.
76 */
77static int __init pci_eisa_init_early(void)
78{
79 struct pci_dev *dev = NULL;
80 int ret;
53 81
54static struct pci_driver __refdata pci_eisa_driver = { 82 for_each_pci_dev(dev)
55 .name = "pci_eisa", 83 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
56 .id_table = pci_eisa_pci_tbl, 84 ret = pci_eisa_init(dev);
57 .probe = pci_eisa_init, 85 if (ret)
58}; 86 return ret;
87 }
59 88
60static int __init pci_eisa_init_module (void) 89 return 0;
61{
62 return pci_register_driver (&pci_eisa_driver);
63} 90}
64 91subsys_initcall_sync(pci_eisa_init_early);
65device_initcall(pci_eisa_init_module);
66MODULE_DEVICE_TABLE(pci, pci_eisa_pci_tbl);