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-rw-r--r--Documentation/devicetree/bindings/arm/samsung-boards.txt19
-rw-r--r--Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt1
-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/exynos3250-monk.dts579
-rw-r--r--arch/arm/boot/dts/exynos3250-rinato.dts4
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos4210-trats.dts16
-rw-r--r--arch/arm/boot/dts/exynos4210-universal_c210.dts16
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi26
-rw-r--r--arch/arm/boot/dts/exynos4412-trats2.dts50
-rw-r--r--arch/arm/boot/dts/exynos4x12.dtsi10
-rw-r--r--arch/arm/boot/dts/exynos5250-spring.dts30
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi4
14 files changed, 751 insertions, 15 deletions
diff --git a/Documentation/devicetree/bindings/arm/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung-boards.txt
index 2168ed31e1b0..43589d2466a7 100644
--- a/Documentation/devicetree/bindings/arm/samsung-boards.txt
+++ b/Documentation/devicetree/bindings/arm/samsung-boards.txt
@@ -1,11 +1,20 @@
1* Samsung's Exynos4210 based SMDKV310 evaluation board 1* Samsung's Exynos SoC based boards
2
3SMDKV310 evaluation board is based on Samsung's Exynos4210 SoC.
4 2
5Required root node properties: 3Required root node properties:
6 - compatible = should be one or more of the following. 4 - compatible = should be one or more of the following.
7 (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board. 5 - "samsung,monk" - for Exynos3250-based Samsung Simband board.
8 (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC. 6 - "samsung,rinato" - for Exynos3250-based Samsung Gear2 board.
7 - "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
8 - "samsung,trats" - for Exynos4210-based Tizen Reference board.
9 - "samsung,universal_c210" - for Exynos4210-based Samsung board.
10 - "samsung,smdk4412", - for Exynos4412-based Samsung SMDK4412 eval board.
11 - "samsung,trats2" - for Exynos4412-based Tizen Reference board.
12 - "samsung,smdk5250" - for Exynos5250-based Samsung SMDK5250 eval board.
13 - "samsung,xyref5260" - for Exynos5260-based Samsung board.
14 - "samsung,smdk5410" - for Exynos5410-based Samsung SMDK5410 eval board.
15 - "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
16 - "samsung,sd5v1" - for Exynos5440-based Samsung board.
17 - "samsung,ssdk5440" - for Exynos5440-based Samsung board.
9 18
10Optional: 19Optional:
11 - firmware node, specifying presence and type of secure firmware: 20 - firmware node, specifying presence and type of secure firmware:
diff --git a/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt b/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
index 278de8e64bbf..89b3250f049b 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-s3c2410.txt
@@ -32,6 +32,7 @@ Optional properties:
32 specified, default value is 0. 32 specified, default value is 0.
33 - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not 33 - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not
34 specified, the default value in Hz is 100000. 34 specified, the default value in Hz is 100000.
35 - samsung,sysreg-phandle - handle to syscon used to control the system registers
35 36
36Example: 37Example:
37 38
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 71f68695c40c..b242f82637c5 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -71,7 +71,8 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
71dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \ 71dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \
72 da850-evm.dtb 72 da850-evm.dtb
73dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb 73dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb
74dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-rinato.dtb \ 74dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \
75 exynos3250-rinato.dtb \
75 exynos4210-origen.dtb \ 76 exynos4210-origen.dtb \
76 exynos4210-smdkv310.dtb \ 77 exynos4210-smdkv310.dtb \
77 exynos4210-trats.dtb \ 78 exynos4210-trats.dtb \
diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts
new file mode 100644
index 000000000000..24822aa98057
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -0,0 +1,579 @@
1/*
2 * Samsung's Exynos3250 based Monk board device tree source
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Device tree source file for Samsung's Monk board which is based on
8 * Samsung Exynos3250 SoC.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15/dts-v1/;
16#include "exynos3250.dtsi"
17#include <dt-bindings/input/input.h>
18
19/ {
20 model = "Samsung Monk board";
21 compatible = "samsung,monk", "samsung,exynos3250", "samsung,exynos3";
22
23 aliases {
24 i2c7 = &i2c_max77836;
25 };
26
27 memory {
28 reg = <0x40000000 0x1ff00000>;
29 };
30
31 firmware@0205F000 {
32 compatible = "samsung,secure-firmware";
33 reg = <0x0205F000 0x1000>;
34 };
35
36 gpio_keys {
37 compatible = "gpio-keys";
38
39 power_key {
40 interrupt-parent = <&gpx2>;
41 interrupts = <7 0>;
42 gpios = <&gpx2 7 1>;
43 linux,code = <KEY_POWER>;
44 label = "power key";
45 debounce-interval = <10>;
46 gpio-key,wakeup;
47 };
48 };
49
50 vemmc_reg: voltage-regulator-0 {
51 compatible = "regulator-fixed";
52 regulator-name = "V_EMMC_2.8V-fixed";
53 regulator-min-microvolt = <2800000>;
54 regulator-max-microvolt = <2800000>;
55 gpio = <&gpk0 2 0>;
56 enable-active-high;
57 };
58
59 i2c_max77836: i2c-gpio-0 {
60 compatible = "i2c-gpio";
61 gpios = <&gpd0 2 0>, <&gpd0 3 0>;
62 #address-cells = <1>;
63 #size-cells = <0>;
64
65 max77836: subpmic@25 {
66 compatible = "maxim,max77836";
67 interrupt-parent = <&gpx1>;
68 interrupts = <5 0>;
69 reg = <0x25>;
70 wakeup;
71
72 muic: max77836-muic {
73 compatible = "maxim,max77836-muic";
74 };
75
76 regulators {
77 compatible = "maxim,max77836-regulator";
78 safeout_reg: SAFEOUT {
79 regulator-name = "SAFEOUT";
80 };
81
82 charger_reg: CHARGER {
83 regulator-name = "CHARGER";
84 regulator-min-microamp = <45000>;
85 regulator-max-microamp = <475000>;
86 regulator-boot-on;
87 };
88
89 motor_reg: LDO1 {
90 regulator-name = "MOT_2.7V";
91 regulator-min-microvolt = <1100000>;
92 regulator-max-microvolt = <2700000>;
93 };
94
95 LDO2 {
96 regulator-name = "UNUSED_LDO2";
97 regulator-min-microvolt = <800000>;
98 regulator-max-microvolt = <3950000>;
99 };
100 };
101
102 charger {
103 compatible = "maxim,max77836-charger";
104
105 maxim,constant-uvolt = <4350000>;
106 maxim,fast-charge-uamp = <225000>;
107 maxim,eoc-uamp = <7500>;
108 maxim,ovp-uvolt = <6500000>;
109 };
110 };
111 };
112};
113
114&adc {
115 vdd-supply = <&ldo3_reg>;
116 status = "okay";
117 assigned-clocks = <&cmu CLK_SCLK_TSADC>;
118 assigned-clock-rates = <6000000>;
119
120 thermistor-ap {
121 compatible = "ntc,ncp15wb473";
122 pullup-uv = <1800000>;
123 pullup-ohm = <100000>;
124 pulldown-ohm = <100000>;
125 io-channels = <&adc 0>;
126 };
127
128 thermistor-battery {
129 compatible = "ntc,ncp15wb473";
130 pullup-uv = <1800000>;
131 pullup-ohm = <100000>;
132 pulldown-ohm = <100000>;
133 io-channels = <&adc 1>;
134 };
135};
136
137&i2c_0 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 samsung,i2c-sda-delay = <100>;
141 samsung,i2c-slave-addr = <0x10>;
142 samsung,i2c-max-bus-freq = <100000>;
143 status = "okay";
144
145 s2mps14_pmic@66 {
146 compatible = "samsung,s2mps14-pmic";
147 interrupt-parent = <&gpx0>;
148 interrupts = <7 0>;
149 reg = <0x66>;
150 wakeup;
151
152 s2mps14_osc: clocks {
153 compatible = "samsung,s2mps14-clk";
154 #clock-cells = <1>;
155 clock-output-names = "s2mps14_ap", "unused",
156 "s2mps14_bt";
157 };
158
159 regulators {
160 ldo1_reg: LDO1 {
161 regulator-name = "VAP_ALIVE_1.0V";
162 regulator-min-microvolt = <1000000>;
163 regulator-max-microvolt = <1000000>;
164 regulator-always-on;
165 };
166
167 ldo2_reg: LDO2 {
168 regulator-name = "VAP_M1_1.2V";
169 regulator-min-microvolt = <1200000>;
170 regulator-max-microvolt = <1200000>;
171 regulator-always-on;
172 };
173
174 ldo3_reg: LDO3 {
175 regulator-name = "VCC_AP_1.8V";
176 regulator-min-microvolt = <1800000>;
177 regulator-max-microvolt = <1800000>;
178 regulator-always-on;
179 };
180
181 ldo4_reg: LDO4 {
182 regulator-name = "VAP_AVDD_PLL1";
183 regulator-min-microvolt = <1800000>;
184 regulator-max-microvolt = <1800000>;
185 regulator-always-on;
186 };
187
188 ldo5_reg: LDO5 {
189 regulator-name = "VAP_PLL_ISO_1.0V";
190 regulator-min-microvolt = <1000000>;
191 regulator-max-microvolt = <1000000>;
192 regulator-always-on;
193 };
194
195 ldo6_reg: LDO6 {
196 regulator-name = "VAP_MIPI_1.0V";
197 regulator-min-microvolt = <1000000>;
198 regulator-max-microvolt = <1000000>;
199 };
200
201 ldo7_reg: LDO7 {
202 regulator-name = "VAP_AVDD_1.8V";
203 regulator-min-microvolt = <1800000>;
204 regulator-max-microvolt = <1800000>;
205 regulator-always-on;
206 };
207
208 ldo8_reg: LDO8 {
209 regulator-name = "VAP_USB_3.0V";
210 regulator-min-microvolt = <3000000>;
211 regulator-max-microvolt = <3000000>;
212 regulator-always-on;
213 };
214
215 ldo9_reg: LDO9 {
216 regulator-name = "V_LPDDR_1.2V";
217 regulator-min-microvolt = <1200000>;
218 regulator-max-microvolt = <1200000>;
219 regulator-always-on;
220 };
221
222 ldo10_reg: LDO10 {
223 regulator-name = "UNUSED_LDO10";
224 regulator-min-microvolt = <1000000>;
225 regulator-max-microvolt = <1000000>;
226 };
227
228 ldo11_reg: LDO11 {
229 regulator-name = "V_EMMC_1.8V";
230 regulator-min-microvolt = <1800000>;
231 regulator-max-microvolt = <1800000>;
232 samsung,ext-control-gpios = <&gpk0 2 0>;
233 };
234
235 ldo12_reg: LDO12 {
236 regulator-name = "V_EMMC_2.8V";
237 regulator-min-microvolt = <2800000>;
238 regulator-max-microvolt = <2800000>;
239 samsung,ext-control-gpios = <&gpk0 2 0>;
240 };
241
242 ldo13_reg: LDO13 {
243 regulator-name = "VSENSOR_2.85V";
244 regulator-min-microvolt = <2850000>;
245 regulator-max-microvolt = <2850000>;
246 regulator-always-on;
247 };
248
249 ldo14_reg: LDO14 {
250 regulator-name = "UNUSED_LDO14";
251 regulator-min-microvolt = <1800000>;
252 regulator-max-microvolt = <1800000>;
253 };
254
255 ldo15_reg: LDO15 {
256 regulator-name = "TSP_AVDD_3.3V";
257 regulator-min-microvolt = <3300000>;
258 regulator-max-microvolt = <3300000>;
259 };
260
261 ldo16_reg: LDO16 {
262 regulator-name = "LCD_VDD_3.3V";
263 regulator-min-microvolt = <3300000>;
264 regulator-max-microvolt = <3300000>;
265 };
266
267 ldo17_reg: LDO17 {
268 regulator-name = "UNUSED_LDO17";
269 regulator-min-microvolt = <1800000>;
270 regulator-max-microvolt = <1800000>;
271 };
272
273 ldo18_reg: LDO18 {
274 regulator-name = "UNUSED_LDO18";
275 regulator-min-microvolt = <1800000>;
276 regulator-max-microvolt = <1800000>;
277 };
278
279 ldo19_reg: LDO19 {
280 regulator-name = "TSP_VDD_1.8V";
281 regulator-min-microvolt = <1800000>;
282 regulator-max-microvolt = <1800000>;
283 };
284
285 ldo20_reg: LDO20 {
286 regulator-name = "LCD_VDD_1.8V";
287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvolt = <1800000>;
289 };
290
291 ldo21_reg: LDO21 {
292 regulator-name = "UNUSED_LDO21";
293 regulator-min-microvolt = <1000000>;
294 regulator-max-microvolt = <1000000>;
295 };
296
297 ldo22_reg: LDO22 {
298 regulator-name = "UNUSED_LDO22";
299 regulator-min-microvolt = <1000000>;
300 regulator-max-microvolt = <1000000>;
301 };
302
303 ldo23_reg: LDO23 {
304 regulator-name = "UNUSED_LDO23";
305 regulator-min-microvolt = <1000000>;
306 regulator-max-microvolt = <1000000>;
307 regulator-always-on;
308 };
309
310 ldo24_reg: LDO24 {
311 regulator-name = "UNUSED_LDO24";
312 regulator-min-microvolt = <1800000>;
313 regulator-max-microvolt = <1800000>;
314 };
315
316 ldo25_reg: LDO25 {
317 regulator-name = "UNUSED_LDO25";
318 regulator-min-microvolt = <1800000>;
319 regulator-max-microvolt = <1800000>;
320 };
321
322 buck1_reg: BUCK1 {
323 regulator-name = "VAP_MIF_1.0V";
324 regulator-min-microvolt = <800000>;
325 regulator-max-microvolt = <900000>;
326 regulator-always-on;
327 };
328
329 buck2_reg: BUCK2 {
330 regulator-name = "VAP_ARM_1.0V";
331 regulator-min-microvolt = <850000>;
332 regulator-max-microvolt = <1150000>;
333 regulator-always-on;
334 };
335
336 buck3_reg: BUCK3 {
337 regulator-name = "VAP_INT3D_1.0V";
338 regulator-min-microvolt = <850000>;
339 regulator-max-microvolt = <1000000>;
340 regulator-always-on;
341 };
342
343 buck4_reg: BUCK4 {
344 regulator-name = "VCC_SUB_1.95V";
345 regulator-min-microvolt = <1950000>;
346 regulator-max-microvolt = <1950000>;
347 regulator-always-on;
348 };
349
350 buck5_reg: BUCK5 {
351 regulator-name = "VCC_SUB_1.35V";
352 regulator-min-microvolt = <1350000>;
353 regulator-max-microvolt = <1350000>;
354 regulator-always-on;
355 };
356 };
357 };
358};
359
360&i2c_1 {
361 #address-cells = <1>;
362 #size-cells = <0>;
363 samsung,i2c-sda-delay = <100>;
364 samsung,i2c-slave-addr = <0x10>;
365 samsung,i2c-max-bus-freq = <400000>;
366 status = "okay";
367
368 fuelgauge@36 {
369 compatible = "maxim,max77836-battery";
370 interrupt-parent = <&gpx1>;
371 interrupts = <2 8>;
372 reg = <0x36>;
373 };
374};
375
376&i2s2 {
377 status = "okay";
378};
379
380&mshc_0 {
381 #address-cells = <1>;
382 #size-cells = <0>;
383 num-slots = <1>;
384 broken-cd;
385 non-removable;
386 cap-mmc-highspeed;
387 desc-num = <4>;
388 mmc-hs200-1_8v;
389 card-detect-delay = <200>;
390 vmmc-supply = <&vemmc_reg>;
391 clock-frequency = <100000000>;
392 clock-freq-min-max = <400000 100000000>;
393 samsung,dw-mshc-ciu-div = <1>;
394 samsung,dw-mshc-sdr-timing = <0 1>;
395 samsung,dw-mshc-ddr-timing = <1 2>;
396 pinctrl-names = "default";
397 pinctrl-0 = <&sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
398 bus-width = <8>;
399 status = "okay";
400};
401
402&serial_0 {
403 assigned-clocks = <&cmu CLK_SCLK_UART0>;
404 assigned-clock-rates = <100000000>;
405 status = "okay";
406};
407
408&serial_1 {
409 status = "okay";
410};
411
412&tmu {
413 vtmu-supply = <&ldo7_reg>;
414 status = "okay";
415};
416
417&rtc {
418 clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>;
419 clock-names = "rtc", "rtc_src";
420 status = "okay";
421};
422
423&xusbxti {
424 clock-frequency = <24000000>;
425};
426
427&pinctrl_0 {
428 pinctrl-names = "default";
429 pinctrl-0 = <&sleep0>;
430
431 sleep0: sleep-state {
432 PIN_SLP(gpa0-0, INPUT, DOWN);
433 PIN_SLP(gpa0-1, INPUT, DOWN);
434 PIN_SLP(gpa0-2, INPUT, DOWN);
435 PIN_SLP(gpa0-3, INPUT, DOWN);
436 PIN_SLP(gpa0-4, INPUT, DOWN);
437 PIN_SLP(gpa0-5, INPUT, DOWN);
438 PIN_SLP(gpa0-6, INPUT, DOWN);
439 PIN_SLP(gpa0-7, INPUT, DOWN);
440
441 PIN_SLP(gpa1-0, INPUT, DOWN);
442 PIN_SLP(gpa1-1, INPUT, DOWN);
443 PIN_SLP(gpa1-2, INPUT, DOWN);
444 PIN_SLP(gpa1-3, INPUT, DOWN);
445 PIN_SLP(gpa1-4, INPUT, DOWN);
446 PIN_SLP(gpa1-5, INPUT, DOWN);
447
448 PIN_SLP(gpb-0, PREV, NONE);
449 PIN_SLP(gpb-1, PREV, NONE);
450 PIN_SLP(gpb-2, PREV, NONE);
451 PIN_SLP(gpb-3, PREV, NONE);
452 PIN_SLP(gpb-4, INPUT, DOWN);
453 PIN_SLP(gpb-5, INPUT, DOWN);
454 PIN_SLP(gpb-6, INPUT, DOWN);
455 PIN_SLP(gpb-7, INPUT, DOWN);
456
457 PIN_SLP(gpc0-0, INPUT, DOWN);
458 PIN_SLP(gpc0-1, INPUT, DOWN);
459 PIN_SLP(gpc0-2, INPUT, DOWN);
460 PIN_SLP(gpc0-3, INPUT, DOWN);
461 PIN_SLP(gpc0-4, INPUT, DOWN);
462
463 PIN_SLP(gpc1-0, INPUT, DOWN);
464 PIN_SLP(gpc1-1, INPUT, DOWN);
465 PIN_SLP(gpc1-2, INPUT, DOWN);
466 PIN_SLP(gpc1-3, INPUT, DOWN);
467 PIN_SLP(gpc1-4, INPUT, DOWN);
468
469 PIN_SLP(gpd0-0, INPUT, DOWN);
470 PIN_SLP(gpd0-1, INPUT, DOWN);
471 PIN_SLP(gpd0-2, INPUT, NONE);
472 PIN_SLP(gpd0-3, INPUT, NONE);
473
474 PIN_SLP(gpd1-0, INPUT, NONE);
475 PIN_SLP(gpd1-1, INPUT, NONE);
476 PIN_SLP(gpd1-2, INPUT, NONE);
477 PIN_SLP(gpd1-3, INPUT, NONE);
478 };
479};
480
481&pinctrl_1 {
482 pinctrl-names = "default";
483 pinctrl-0 = <&sleep1>;
484
485 sleep1: sleep-state {
486 PIN_SLP(gpe0-0, PREV, NONE);
487 PIN_SLP(gpe0-1, PREV, NONE);
488 PIN_SLP(gpe0-2, INPUT, DOWN);
489 PIN_SLP(gpe0-3, INPUT, DOWN);
490 PIN_SLP(gpe0-4, PREV, NONE);
491 PIN_SLP(gpe0-5, INPUT, DOWN);
492 PIN_SLP(gpe0-6, INPUT, DOWN);
493 PIN_SLP(gpe0-7, INPUT, DOWN);
494
495 PIN_SLP(gpe1-0, INPUT, DOWN);
496 PIN_SLP(gpe1-1, PREV, NONE);
497 PIN_SLP(gpe1-2, INPUT, DOWN);
498 PIN_SLP(gpe1-3, INPUT, DOWN);
499 PIN_SLP(gpe1-4, INPUT, DOWN);
500 PIN_SLP(gpe1-5, INPUT, DOWN);
501 PIN_SLP(gpe1-6, INPUT, DOWN);
502 PIN_SLP(gpe1-7, INPUT, NONE);
503
504 PIN_SLP(gpe2-0, INPUT, NONE);
505 PIN_SLP(gpe2-1, INPUT, NONE);
506 PIN_SLP(gpe2-2, INPUT, NONE);
507
508 PIN_SLP(gpk0-0, INPUT, DOWN);
509 PIN_SLP(gpk0-1, INPUT, DOWN);
510 PIN_SLP(gpk0-2, OUT0, NONE);
511 PIN_SLP(gpk0-3, INPUT, DOWN);
512 PIN_SLP(gpk0-4, INPUT, DOWN);
513 PIN_SLP(gpk0-5, INPUT, DOWN);
514 PIN_SLP(gpk0-6, INPUT, DOWN);
515 PIN_SLP(gpk0-7, INPUT, DOWN);
516
517 PIN_SLP(gpk1-0, PREV, NONE);
518 PIN_SLP(gpk1-1, PREV, NONE);
519 PIN_SLP(gpk1-2, INPUT, DOWN);
520 PIN_SLP(gpk1-3, PREV, NONE);
521 PIN_SLP(gpk1-4, PREV, NONE);
522 PIN_SLP(gpk1-5, PREV, NONE);
523 PIN_SLP(gpk1-6, PREV, NONE);
524
525 PIN_SLP(gpk2-0, INPUT, DOWN);
526 PIN_SLP(gpk2-1, INPUT, DOWN);
527 PIN_SLP(gpk2-2, INPUT, DOWN);
528 PIN_SLP(gpk2-3, INPUT, DOWN);
529 PIN_SLP(gpk2-4, INPUT, DOWN);
530 PIN_SLP(gpk2-5, INPUT, DOWN);
531 PIN_SLP(gpk2-6, INPUT, DOWN);
532
533 PIN_SLP(gpl0-0, INPUT, DOWN);
534 PIN_SLP(gpl0-1, INPUT, DOWN);
535 PIN_SLP(gpl0-2, INPUT, DOWN);
536 PIN_SLP(gpl0-3, INPUT, DOWN);
537
538 PIN_SLP(gpm0-0, INPUT, DOWN);
539 PIN_SLP(gpm0-1, INPUT, DOWN);
540 PIN_SLP(gpm0-2, INPUT, DOWN);
541 PIN_SLP(gpm0-3, INPUT, DOWN);
542 PIN_SLP(gpm0-4, INPUT, DOWN);
543 PIN_SLP(gpm0-5, INPUT, DOWN);
544 PIN_SLP(gpm0-6, INPUT, DOWN);
545 PIN_SLP(gpm0-7, INPUT, DOWN);
546
547 PIN_SLP(gpm1-0, INPUT, DOWN);
548 PIN_SLP(gpm1-1, INPUT, DOWN);
549 PIN_SLP(gpm1-2, INPUT, DOWN);
550 PIN_SLP(gpm1-3, INPUT, DOWN);
551 PIN_SLP(gpm1-4, INPUT, DOWN);
552 PIN_SLP(gpm1-5, INPUT, DOWN);
553 PIN_SLP(gpm1-6, INPUT, DOWN);
554
555 PIN_SLP(gpm2-0, INPUT, DOWN);
556 PIN_SLP(gpm2-1, INPUT, DOWN);
557 PIN_SLP(gpm2-2, INPUT, DOWN);
558 PIN_SLP(gpm2-3, INPUT, DOWN);
559 PIN_SLP(gpm2-4, INPUT, DOWN);
560
561 PIN_SLP(gpm3-0, INPUT, DOWN);
562 PIN_SLP(gpm3-1, INPUT, DOWN);
563 PIN_SLP(gpm3-2, INPUT, DOWN);
564 PIN_SLP(gpm3-3, INPUT, DOWN);
565 PIN_SLP(gpm3-4, INPUT, DOWN);
566 PIN_SLP(gpm3-5, INPUT, DOWN);
567 PIN_SLP(gpm3-6, INPUT, DOWN);
568 PIN_SLP(gpm3-7, INPUT, DOWN);
569
570 PIN_SLP(gpm4-0, INPUT, DOWN);
571 PIN_SLP(gpm4-1, INPUT, DOWN);
572 PIN_SLP(gpm4-2, INPUT, DOWN);
573 PIN_SLP(gpm4-3, INPUT, DOWN);
574 PIN_SLP(gpm4-4, INPUT, DOWN);
575 PIN_SLP(gpm4-5, INPUT, DOWN);
576 PIN_SLP(gpm4-6, INPUT, DOWN);
577 PIN_SLP(gpm4-7, INPUT, DOWN);
578 };
579};
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
index 84380fa13e37..80aa8b4c4a3d 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -28,10 +28,6 @@
28 reg = <0x40000000 0x1ff00000>; 28 reg = <0x40000000 0x1ff00000>;
29 }; 29 };
30 30
31 chosen {
32 bootargs = "console=ttySAC1,115200N8 root=/dev/mmcblk0p15 rootwait earlyprintk panic=5";
33 };
34
35 firmware@0205F000 { 31 firmware@0205F000 {
36 compatible = "samsung,secure-firmware"; 32 compatible = "samsung,secure-firmware";
37 reg = <0x0205F000 0x1000>; 33 reg = <0x0205F000 0x1000>;
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index e0278ecbc816..b8168f1f8139 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -392,8 +392,8 @@
392 reg = <0x13400000 0x10000>; 392 reg = <0x13400000 0x10000>;
393 interrupts = <0 94 0>; 393 interrupts = <0 94 0>;
394 samsung,power-domain = <&pd_mfc>; 394 samsung,power-domain = <&pd_mfc>;
395 clocks = <&clock CLK_MFC>; 395 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
396 clock-names = "mfc"; 396 clock-names = "mfc", "sclk_mfc";
397 status = "disabled"; 397 status = "disabled";
398 }; 398 };
399 399
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index f516da9e8b3a..720836205546 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -431,18 +431,34 @@
431 431
432 fimc_0: fimc@11800000 { 432 fimc_0: fimc@11800000 {
433 status = "okay"; 433 status = "okay";
434 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
435 <&clock CLK_SCLK_FIMC0>;
436 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
437 assigned-clock-rates = <0>, <160000000>;
434 }; 438 };
435 439
436 fimc_1: fimc@11810000 { 440 fimc_1: fimc@11810000 {
437 status = "okay"; 441 status = "okay";
442 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
443 <&clock CLK_SCLK_FIMC1>;
444 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
445 assigned-clock-rates = <0>, <160000000>;
438 }; 446 };
439 447
440 fimc_2: fimc@11820000 { 448 fimc_2: fimc@11820000 {
441 status = "okay"; 449 status = "okay";
450 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
451 <&clock CLK_SCLK_FIMC2>;
452 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
453 assigned-clock-rates = <0>, <160000000>;
442 }; 454 };
443 455
444 fimc_3: fimc@11830000 { 456 fimc_3: fimc@11830000 {
445 status = "okay"; 457 status = "okay";
458 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
459 <&clock CLK_SCLK_FIMC3>;
460 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
461 assigned-clock-rates = <0>, <160000000>;
446 }; 462 };
447 }; 463 };
448}; 464};
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d50eb3aa708e..aaf0cae4f5e8 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -473,18 +473,34 @@
473 473
474 fimc_0: fimc@11800000 { 474 fimc_0: fimc@11800000 {
475 status = "okay"; 475 status = "okay";
476 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
477 <&clock CLK_SCLK_FIMC0>;
478 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
479 assigned-clock-rates = <0>, <160000000>;
476 }; 480 };
477 481
478 fimc_1: fimc@11810000 { 482 fimc_1: fimc@11810000 {
479 status = "okay"; 483 status = "okay";
484 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
485 <&clock CLK_SCLK_FIMC1>;
486 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
487 assigned-clock-rates = <0>, <160000000>;
480 }; 488 };
481 489
482 fimc_2: fimc@11820000 { 490 fimc_2: fimc@11820000 {
483 status = "okay"; 491 status = "okay";
492 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
493 <&clock CLK_SCLK_FIMC2>;
494 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
495 assigned-clock-rates = <0>, <160000000>;
484 }; 496 };
485 497
486 fimc_3: fimc@11830000 { 498 fimc_3: fimc@11830000 {
487 status = "okay"; 499 status = "okay";
500 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
501 <&clock CLK_SCLK_FIMC3>;
502 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
503 assigned-clock-rates = <0>, <160000000>;
488 }; 504 };
489 }; 505 };
490}; 506};
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index c697ff01ae8d..3fbf588682b9 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -45,6 +45,16 @@
45 compatible = "samsung,odroidx2-audio"; 45 compatible = "samsung,odroidx2-audio";
46 samsung,i2s-controller = <&i2s0>; 46 samsung,i2s-controller = <&i2s0>;
47 samsung,audio-codec = <&max98090>; 47 samsung,audio-codec = <&max98090>;
48 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
49 <&clock_audss EXYNOS_MOUT_I2S>,
50 <&clock_audss EXYNOS_DOUT_SRP>,
51 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
52 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
53 <&clock_audss EXYNOS_MOUT_AUDSS>;
54 assigned-clock-rates = <0>,
55 <0>,
56 <192000000>,
57 <19200000>;
48 }; 58 };
49 59
50 mmc@12550000 { 60 mmc@12550000 {
@@ -82,18 +92,34 @@
82 92
83 fimc_0: fimc@11800000 { 93 fimc_0: fimc@11800000 {
84 status = "okay"; 94 status = "okay";
95 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
96 <&clock CLK_SCLK_FIMC0>;
97 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
98 assigned-clock-rates = <0>, <176000000>;
85 }; 99 };
86 100
87 fimc_1: fimc@11810000 { 101 fimc_1: fimc@11810000 {
88 status = "okay"; 102 status = "okay";
103 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
104 <&clock CLK_SCLK_FIMC1>;
105 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
106 assigned-clock-rates = <0>, <176000000>;
89 }; 107 };
90 108
91 fimc_2: fimc@11820000 { 109 fimc_2: fimc@11820000 {
92 status = "okay"; 110 status = "okay";
111 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
112 <&clock CLK_SCLK_FIMC2>;
113 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
114 assigned-clock-rates = <0>, <176000000>;
93 }; 115 };
94 116
95 fimc_3: fimc@11830000 { 117 fimc_3: fimc@11830000 {
96 status = "okay"; 118 status = "okay";
119 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
120 <&clock CLK_SCLK_FIMC3>;
121 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
122 assigned-clock-rates = <0>, <176000000>;
97 }; 123 };
98 }; 124 };
99 125
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 8ee20bd09557..29231b452643 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -543,6 +543,12 @@
543 regulator-max-microamp = <2580000>; 543 regulator-max-microamp = <2580000>;
544 }; 544 };
545 }; 545 };
546
547 max77693_haptic {
548 compatible = "maxim,max77693-haptic";
549 haptic-supply = <&ldo26_reg>;
550 pwms = <&pwm 0 38022 0>;
551 };
546 }; 552 };
547 }; 553 };
548 554
@@ -589,6 +595,11 @@
589 status = "okay"; 595 status = "okay";
590 }; 596 };
591 597
598 tmu@100C0000 {
599 vtmu-supply = <&ldo10_reg>;
600 status = "okay";
601 };
602
592 i2c_ak8975: i2c-gpio-0 { 603 i2c_ak8975: i2c-gpio-0 {
593 compatible = "i2c-gpio"; 604 compatible = "i2c-gpio";
594 gpios = <&gpy2 4 0>, <&gpy2 5 0>; 605 gpios = <&gpy2 4 0>, <&gpy2 5 0>;
@@ -636,6 +647,13 @@
636 }; 647 };
637 }; 648 };
638 649
650 pwm: pwm@139D0000 {
651 pinctrl-0 = <&pwm0_out>;
652 pinctrl-names = "default";
653 samsung,pwm-outputs = <0>;
654 status = "okay";
655 };
656
639 dsi_0: dsi@11C80000 { 657 dsi_0: dsi@11C80000 {
640 vddcore-supply = <&ldo8_reg>; 658 vddcore-supply = <&ldo8_reg>;
641 vddio-supply = <&ldo10_reg>; 659 vddio-supply = <&ldo10_reg>;
@@ -701,28 +719,51 @@
701 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>; 719 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
702 pinctrl-names = "default"; 720 pinctrl-names = "default";
703 status = "okay"; 721 status = "okay";
722 assigned-clocks = <&clock CLK_MOUT_CAM0>,
723 <&clock CLK_MOUT_CAM1>;
724 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>,
725 <&clock CLK_MOUT_MPLL_USER_T>;
704 726
705 fimc_0: fimc@11800000 { 727 fimc_0: fimc@11800000 {
706 status = "okay"; 728 status = "okay";
729 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
730 <&clock CLK_SCLK_FIMC0>;
731 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
732 assigned-clock-rates = <0>, <176000000>;
707 }; 733 };
708 734
709 fimc_1: fimc@11810000 { 735 fimc_1: fimc@11810000 {
710 status = "okay"; 736 status = "okay";
737 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
738 <&clock CLK_SCLK_FIMC1>;
739 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
740 assigned-clock-rates = <0>, <176000000>;
711 }; 741 };
712 742
713 fimc_2: fimc@11820000 { 743 fimc_2: fimc@11820000 {
714 status = "okay"; 744 status = "okay";
745 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
746 <&clock CLK_SCLK_FIMC2>;
747 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
748 assigned-clock-rates = <0>, <176000000>;
715 }; 749 };
716 750
717 fimc_3: fimc@11830000 { 751 fimc_3: fimc@11830000 {
718 status = "okay"; 752 status = "okay";
753 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
754 <&clock CLK_SCLK_FIMC3>;
755 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
756 assigned-clock-rates = <0>, <176000000>;
719 }; 757 };
720 758
721 csis_0: csis@11880000 { 759 csis_0: csis@11880000 {
722 status = "okay"; 760 status = "okay";
723 vddcore-supply = <&ldo8_reg>; 761 vddcore-supply = <&ldo8_reg>;
724 vddio-supply = <&ldo10_reg>; 762 vddio-supply = <&ldo10_reg>;
725 clock-frequency = <176000000>; 763 assigned-clocks = <&clock CLK_MOUT_CSIS0>,
764 <&clock CLK_SCLK_CSIS0>;
765 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
766 assigned-clock-rates = <0>, <176000000>;
726 767
727 /* Camera C (3) MIPI CSI-2 (CSIS0) */ 768 /* Camera C (3) MIPI CSI-2 (CSIS0) */
728 port@3 { 769 port@3 {
@@ -736,10 +777,13 @@
736 }; 777 };
737 778
738 csis_1: csis@11890000 { 779 csis_1: csis@11890000 {
780 status = "okay";
739 vddcore-supply = <&ldo8_reg>; 781 vddcore-supply = <&ldo8_reg>;
740 vddio-supply = <&ldo10_reg>; 782 vddio-supply = <&ldo10_reg>;
741 clock-frequency = <160000000>; 783 assigned-clocks = <&clock CLK_MOUT_CSIS1>,
742 status = "okay"; 784 <&clock CLK_SCLK_CSIS1>;
785 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
786 assigned-clock-rates = <0>, <176000000>;
743 787
744 /* Camera D (4) MIPI CSI-2 (CSIS1) */ 788 /* Camera D (4) MIPI CSI-2 (CSIS1) */
745 port@4 { 789 port@4 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 861bb919f6d3..2e9f1f7be77b 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -271,4 +271,14 @@
271 compatible = "samsung,exynos4x12-usb2-phy"; 271 compatible = "samsung,exynos4x12-usb2-phy";
272 samsung,sysreg-phandle = <&sys_reg>; 272 samsung,sysreg-phandle = <&sys_reg>;
273 }; 273 };
274
275 tmu@100C0000 {
276 compatible = "samsung,exynos4412-tmu";
277 interrupt-parent = <&combiner>;
278 interrupts = <2 4>;
279 reg = <0x100C0000 0x100>;
280 clocks = <&clock 383>;
281 clock-names = "tmu_apbif";
282 status = "disabled";
283 };
274}; 284};
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts
index f5566f84d885..f02775487cd4 100644
--- a/arch/arm/boot/dts/exynos5250-spring.dts
+++ b/arch/arm/boot/dts/exynos5250-spring.dts
@@ -52,6 +52,8 @@
52 usb-hub { 52 usb-hub {
53 compatible = "smsc,usb3503a"; 53 compatible = "smsc,usb3503a";
54 reset-gpios = <&gpe1 0 GPIO_ACTIVE_LOW>; 54 reset-gpios = <&gpe1 0 GPIO_ACTIVE_LOW>;
55 pinctrl-names = "default";
56 pinctrl-0 = <&hsic_reset>;
55 }; 57 };
56 58
57 fixed-rate-clocks { 59 fixed-rate-clocks {
@@ -328,6 +330,22 @@
328 status = "okay"; 330 status = "okay";
329 samsung,i2c-sda-delay = <100>; 331 samsung,i2c-sda-delay = <100>;
330 samsung,i2c-max-bus-freq = <378000>; 332 samsung,i2c-max-bus-freq = <378000>;
333
334 trackpad@4b {
335 compatible = "atmel,maxtouch";
336 reg = <0x4b>;
337 interrupt-parent = <&gpx1>;
338 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
339 pinctrl-names = "default";
340 pinctrl-0 = <&trackpad_irq>;
341 linux,gpio-keymap = <KEY_RESERVED
342 KEY_RESERVED
343 KEY_RESERVED
344 KEY_RESERVED
345 KEY_RESERVED
346 BTN_LEFT>;
347 wakeup-source;
348 };
331}; 349};
332 350
333/* 351/*
@@ -381,6 +399,11 @@
381 status = "okay"; 399 status = "okay";
382 samsung,i2c-sda-delay = <100>; 400 samsung,i2c-sda-delay = <100>;
383 samsung,i2c-max-bus-freq = <66000>; 401 samsung,i2c-max-bus-freq = <66000>;
402
403 temperature-sensor@4c {
404 compatible = "gmt,g781";
405 reg = <0x4c>;
406 };
384}; 407};
385 408
386&i2c_8 { 409&i2c_8 {
@@ -458,6 +481,13 @@
458 samsung,pin-drv = <0>; 481 samsung,pin-drv = <0>;
459 }; 482 };
460 483
484 trackpad_irq: trackpad-irq {
485 samsung,pins = "gpx1-2";
486 samsung,pin-function = <0xf>;
487 samsung,pin-pud = <0>;
488 samsung,pin-drv = <0>;
489 };
490
461 power_key_irq: power-key-irq { 491 power_key_irq: power-key-irq {
462 samsung,pins = "gpx1-3"; 492 samsung,pins = "gpx1-3";
463 samsung,pin-function = <0>; 493 samsung,pin-function = <0>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 012b0211afed..6a32d50070c1 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -293,6 +293,7 @@
293 clock-names = "i2c"; 293 clock-names = "i2c";
294 pinctrl-names = "default"; 294 pinctrl-names = "default";
295 pinctrl-0 = <&i2c0_bus>; 295 pinctrl-0 = <&i2c0_bus>;
296 samsung,sysreg-phandle = <&sysreg_system_controller>;
296 status = "disabled"; 297 status = "disabled";
297 }; 298 };
298 299
@@ -306,6 +307,7 @@
306 clock-names = "i2c"; 307 clock-names = "i2c";
307 pinctrl-names = "default"; 308 pinctrl-names = "default";
308 pinctrl-0 = <&i2c1_bus>; 309 pinctrl-0 = <&i2c1_bus>;
310 samsung,sysreg-phandle = <&sysreg_system_controller>;
309 status = "disabled"; 311 status = "disabled";
310 }; 312 };
311 313
@@ -319,6 +321,7 @@
319 clock-names = "i2c"; 321 clock-names = "i2c";
320 pinctrl-names = "default"; 322 pinctrl-names = "default";
321 pinctrl-0 = <&i2c2_bus>; 323 pinctrl-0 = <&i2c2_bus>;
324 samsung,sysreg-phandle = <&sysreg_system_controller>;
322 status = "disabled"; 325 status = "disabled";
323 }; 326 };
324 327
@@ -332,6 +335,7 @@
332 clock-names = "i2c"; 335 clock-names = "i2c";
333 pinctrl-names = "default"; 336 pinctrl-names = "default";
334 pinctrl-0 = <&i2c3_bus>; 337 pinctrl-0 = <&i2c3_bus>;
338 samsung,sysreg-phandle = <&sysreg_system_controller>;
335 status = "disabled"; 339 status = "disabled";
336 }; 340 };
337 341
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 8617a031cbc0..90bf4011e319 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -560,6 +560,7 @@
560 clock-names = "i2c"; 560 clock-names = "i2c";
561 pinctrl-names = "default"; 561 pinctrl-names = "default";
562 pinctrl-0 = <&i2c0_bus>; 562 pinctrl-0 = <&i2c0_bus>;
563 samsung,sysreg-phandle = <&sysreg_system_controller>;
563 status = "disabled"; 564 status = "disabled";
564 }; 565 };
565 566
@@ -573,6 +574,7 @@
573 clock-names = "i2c"; 574 clock-names = "i2c";
574 pinctrl-names = "default"; 575 pinctrl-names = "default";
575 pinctrl-0 = <&i2c1_bus>; 576 pinctrl-0 = <&i2c1_bus>;
577 samsung,sysreg-phandle = <&sysreg_system_controller>;
576 status = "disabled"; 578 status = "disabled";
577 }; 579 };
578 580
@@ -586,6 +588,7 @@
586 clock-names = "i2c"; 588 clock-names = "i2c";
587 pinctrl-names = "default"; 589 pinctrl-names = "default";
588 pinctrl-0 = <&i2c2_bus>; 590 pinctrl-0 = <&i2c2_bus>;
591 samsung,sysreg-phandle = <&sysreg_system_controller>;
589 status = "disabled"; 592 status = "disabled";
590 }; 593 };
591 594
@@ -599,6 +602,7 @@
599 clock-names = "i2c"; 602 clock-names = "i2c";
600 pinctrl-names = "default"; 603 pinctrl-names = "default";
601 pinctrl-0 = <&i2c3_bus>; 604 pinctrl-0 = <&i2c3_bus>;
605 samsung,sysreg-phandle = <&sysreg_system_controller>;
602 status = "disabled"; 606 status = "disabled";
603 }; 607 };
604 608
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-01 14:15:15 -0400