diff options
| -rw-r--r-- | arch/mips/txx9/generic/smsc_fdc37m81x.c | 20 | ||||
| -rw-r--r-- | arch/mips/txx9/jmr3927/irq.c | 4 | ||||
| -rw-r--r-- | arch/mips/txx9/jmr3927/prom.c | 12 | ||||
| -rw-r--r-- | arch/mips/txx9/jmr3927/setup.c | 22 | ||||
| -rw-r--r-- | arch/mips/txx9/rbtx4927/irq.c | 161 | ||||
| -rw-r--r-- | arch/mips/txx9/rbtx4927/setup.c | 38 | ||||
| -rw-r--r-- | arch/mips/txx9/rbtx4938/irq.c | 107 | ||||
| -rw-r--r-- | arch/mips/txx9/rbtx4938/setup.c | 39 | ||||
| -rw-r--r-- | include/asm-mips/txx9/smsc_fdc37m81x.h | 2 | ||||
| -rw-r--r-- | include/asm-mips/txx9/tx3927.h | 4 | ||||
| -rw-r--r-- | include/asm-mips/txx9/tx4927pcic.h | 4 |
11 files changed, 170 insertions, 243 deletions
diff --git a/arch/mips/txx9/generic/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c index 69e487467fa5..a2b2d62d88e3 100644 --- a/arch/mips/txx9/generic/smsc_fdc37m81x.c +++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c | |||
| @@ -15,8 +15,6 @@ | |||
| 15 | #include <asm/io.h> | 15 | #include <asm/io.h> |
| 16 | #include <asm/txx9/smsc_fdc37m81x.h> | 16 | #include <asm/txx9/smsc_fdc37m81x.h> |
| 17 | 17 | ||
| 18 | #define DEBUG | ||
| 19 | |||
| 20 | /* Common Registers */ | 18 | /* Common Registers */ |
| 21 | #define SMSC_FDC37M81X_CONFIG_INDEX 0x00 | 19 | #define SMSC_FDC37M81X_CONFIG_INDEX 0x00 |
| 22 | #define SMSC_FDC37M81X_CONFIG_DATA 0x01 | 20 | #define SMSC_FDC37M81X_CONFIG_DATA 0x01 |
| @@ -55,7 +53,7 @@ | |||
| 55 | #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa | 53 | #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa |
| 56 | #define SMSC_FDC37M81X_CHIP_ID 0x4d | 54 | #define SMSC_FDC37M81X_CHIP_ID 0x4d |
| 57 | 55 | ||
| 58 | static unsigned long g_smsc_fdc37m81x_base = 0; | 56 | static unsigned long g_smsc_fdc37m81x_base; |
| 59 | 57 | ||
| 60 | static inline unsigned char smsc_fdc37m81x_rd(unsigned char index) | 58 | static inline unsigned char smsc_fdc37m81x_rd(unsigned char index) |
| 61 | { | 59 | { |
| @@ -107,7 +105,8 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) | |||
| 107 | u8 chip_id; | 105 | u8 chip_id; |
| 108 | 106 | ||
| 109 | if (g_smsc_fdc37m81x_base) | 107 | if (g_smsc_fdc37m81x_base) |
| 110 | printk("smsc_fdc37m81x_init() stepping on old base=0x%0*lx\n", | 108 | printk(KERN_WARNING "%s: stepping on old base=0x%0*lx\n", |
| 109 | __func__, | ||
| 111 | field, g_smsc_fdc37m81x_base); | 110 | field, g_smsc_fdc37m81x_base); |
| 112 | 111 | ||
| 113 | g_smsc_fdc37m81x_base = port; | 112 | g_smsc_fdc37m81x_base = port; |
| @@ -118,7 +117,7 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) | |||
| 118 | if (chip_id == SMSC_FDC37M81X_CHIP_ID) | 117 | if (chip_id == SMSC_FDC37M81X_CHIP_ID) |
| 119 | smsc_fdc37m81x_config_end(); | 118 | smsc_fdc37m81x_config_end(); |
| 120 | else { | 119 | else { |
| 121 | printk("smsc_fdc37m81x_init() unknow chip id 0x%02x\n", | 120 | printk(KERN_WARNING "%s: unknow chip id 0x%02x\n", __func__, |
| 122 | chip_id); | 121 | chip_id); |
| 123 | g_smsc_fdc37m81x_base = 0; | 122 | g_smsc_fdc37m81x_base = 0; |
| 124 | } | 123 | } |
| @@ -127,22 +126,23 @@ unsigned long __init smsc_fdc37m81x_init(unsigned long port) | |||
| 127 | } | 126 | } |
| 128 | 127 | ||
| 129 | #ifdef DEBUG | 128 | #ifdef DEBUG |
| 130 | void smsc_fdc37m81x_config_dump_one(char *key, u8 dev, u8 reg) | 129 | static void smsc_fdc37m81x_config_dump_one(const char *key, u8 dev, u8 reg) |
| 131 | { | 130 | { |
| 132 | printk("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg, | 131 | printk(KERN_INFO "%s: dev=0x%02x reg=0x%02x val=0x%02x\n", |
| 132 | key, dev, reg, | ||
| 133 | smsc_fdc37m81x_rd(reg)); | 133 | smsc_fdc37m81x_rd(reg)); |
| 134 | } | 134 | } |
| 135 | 135 | ||
| 136 | void smsc_fdc37m81x_config_dump(void) | 136 | void smsc_fdc37m81x_config_dump(void) |
| 137 | { | 137 | { |
| 138 | u8 orig; | 138 | u8 orig; |
| 139 | char *fname = "smsc_fdc37m81x_config_dump()"; | 139 | const char *fname = __func__; |
| 140 | 140 | ||
| 141 | smsc_fdc37m81x_config_beg(); | 141 | smsc_fdc37m81x_config_beg(); |
| 142 | 142 | ||
| 143 | orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM); | 143 | orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM); |
| 144 | 144 | ||
| 145 | printk("%s: common\n", fname); | 145 | printk(KERN_INFO "%s: common\n", fname); |
| 146 | smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, | 146 | smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, |
| 147 | SMSC_FDC37M81X_DNUM); | 147 | SMSC_FDC37M81X_DNUM); |
| 148 | smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, | 148 | smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, |
| @@ -154,7 +154,7 @@ void smsc_fdc37m81x_config_dump(void) | |||
| 154 | smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, | 154 | smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE, |
| 155 | SMSC_FDC37M81X_PMGT); | 155 | SMSC_FDC37M81X_PMGT); |
| 156 | 156 | ||
| 157 | printk("%s: keyboard\n", fname); | 157 | printk(KERN_INFO "%s: keyboard\n", fname); |
| 158 | smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD); | 158 | smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD); |
| 159 | smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD, | 159 | smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD, |
| 160 | SMSC_FDC37M81X_ACTIVE); | 160 | SMSC_FDC37M81X_ACTIVE); |
diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c index 68f74368ddec..6ec626c9473f 100644 --- a/arch/mips/txx9/jmr3927/irq.c +++ b/arch/mips/txx9/jmr3927/irq.c | |||
| @@ -30,15 +30,11 @@ | |||
| 30 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 30 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 31 | */ | 31 | */ |
| 32 | #include <linux/init.h> | 32 | #include <linux/init.h> |
| 33 | #include <linux/sched.h> | ||
| 34 | #include <linux/types.h> | 33 | #include <linux/types.h> |
| 35 | #include <linux/interrupt.h> | 34 | #include <linux/interrupt.h> |
| 36 | 35 | ||
| 37 | #include <asm/io.h> | 36 | #include <asm/io.h> |
| 38 | #include <asm/mipsregs.h> | 37 | #include <asm/mipsregs.h> |
| 39 | #include <asm/system.h> | ||
| 40 | |||
| 41 | #include <asm/processor.h> | ||
| 42 | #include <asm/txx9/generic.h> | 38 | #include <asm/txx9/generic.h> |
| 43 | #include <asm/txx9/jmr3927.h> | 39 | #include <asm/txx9/jmr3927.h> |
| 44 | 40 | ||
diff --git a/arch/mips/txx9/jmr3927/prom.c b/arch/mips/txx9/jmr3927/prom.c index 2cadb423face..23df38c1490e 100644 --- a/arch/mips/txx9/jmr3927/prom.c +++ b/arch/mips/txx9/jmr3927/prom.c | |||
| @@ -36,6 +36,7 @@ | |||
| 36 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 36 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 37 | */ | 37 | */ |
| 38 | #include <linux/init.h> | 38 | #include <linux/init.h> |
| 39 | #include <linux/kernel.h> | ||
| 39 | #include <asm/bootinfo.h> | 40 | #include <asm/bootinfo.h> |
| 40 | #include <asm/txx9/generic.h> | 41 | #include <asm/txx9/generic.h> |
| 41 | #include <asm/txx9/jmr3927.h> | 42 | #include <asm/txx9/jmr3927.h> |
| @@ -56,20 +57,11 @@ prom_putchar(char c) | |||
| 56 | return; | 57 | return; |
| 57 | } | 58 | } |
| 58 | 59 | ||
| 59 | void | ||
| 60 | puts(const char *cp) | ||
| 61 | { | ||
| 62 | while (*cp) | ||
| 63 | prom_putchar(*cp++); | ||
| 64 | prom_putchar('\r'); | ||
| 65 | prom_putchar('\n'); | ||
| 66 | } | ||
| 67 | |||
| 68 | void __init jmr3927_prom_init(void) | 60 | void __init jmr3927_prom_init(void) |
| 69 | { | 61 | { |
| 70 | /* CCFG */ | 62 | /* CCFG */ |
| 71 | if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) | 63 | if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) |
| 72 | puts("Warning: TX3927 TLB off\n"); | 64 | printk(KERN_ERR "TX3927 TLB off\n"); |
| 73 | 65 | ||
| 74 | prom_init_cmdline(); | 66 | prom_init_cmdline(); |
| 75 | add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); | 67 | add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM); |
diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c index 7378a835d4e3..cf7513d95fa7 100644 --- a/arch/mips/txx9/jmr3927/setup.c +++ b/arch/mips/txx9/jmr3927/setup.c | |||
| @@ -74,9 +74,6 @@ static void __init jmr3927_mem_setup(void) | |||
| 74 | 74 | ||
| 75 | _machine_restart = jmr3927_machine_restart; | 75 | _machine_restart = jmr3927_machine_restart; |
| 76 | 76 | ||
| 77 | /* Reboot on panic */ | ||
| 78 | panic_timeout = 180; | ||
| 79 | |||
| 80 | /* cache setup */ | 77 | /* cache setup */ |
| 81 | { | 78 | { |
| 82 | unsigned int conf; | 79 | unsigned int conf; |
| @@ -94,7 +91,8 @@ static void __init jmr3927_mem_setup(void) | |||
| 94 | #endif | 91 | #endif |
| 95 | 92 | ||
| 96 | conf = read_c0_conf(); | 93 | conf = read_c0_conf(); |
| 97 | conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON); | 94 | conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | |
| 95 | TX39_CONF_WBON | TX39_CONF_CWFON); | ||
| 98 | conf |= mips_ic_disable ? 0 : TX39_CONF_ICE; | 96 | conf |= mips_ic_disable ? 0 : TX39_CONF_ICE; |
| 99 | conf |= mips_dc_disable ? 0 : TX39_CONF_DCE; | 97 | conf |= mips_dc_disable ? 0 : TX39_CONF_DCE; |
| 100 | conf |= mips_config_wbon ? TX39_CONF_WBON : 0; | 98 | conf |= mips_config_wbon ? TX39_CONF_WBON : 0; |
| @@ -107,19 +105,11 @@ static void __init jmr3927_mem_setup(void) | |||
| 107 | /* initialize board */ | 105 | /* initialize board */ |
| 108 | jmr3927_board_init(); | 106 | jmr3927_board_init(); |
| 109 | 107 | ||
| 110 | argptr = prom_getcmdline(); | ||
| 111 | if ((argptr = strstr(argptr, "ip=")) == NULL) { | ||
| 112 | argptr = prom_getcmdline(); | ||
| 113 | strcat(argptr, " ip=bootp"); | ||
| 114 | } | ||
| 115 | |||
| 116 | tx3927_setup_serial(1 << 1); /* ch1: noCTS */ | 108 | tx3927_setup_serial(1 << 1); /* ch1: noCTS */ |
| 117 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | 109 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE |
| 118 | argptr = prom_getcmdline(); | 110 | argptr = prom_getcmdline(); |
| 119 | if ((argptr = strstr(argptr, "console=")) == NULL) { | 111 | if (!strstr(argptr, "console=")) |
| 120 | argptr = prom_getcmdline(); | ||
| 121 | strcat(argptr, " console=ttyS1,115200"); | 112 | strcat(argptr, " console=ttyS1,115200"); |
| 122 | } | ||
| 123 | #endif | 113 | #endif |
| 124 | } | 114 | } |
| 125 | 115 | ||
| @@ -199,16 +189,14 @@ static unsigned long jmr3927_swizzle_addr_b(unsigned long port) | |||
| 199 | #endif | 189 | #endif |
| 200 | } | 190 | } |
| 201 | 191 | ||
| 202 | static int __init jmr3927_rtc_init(void) | 192 | static void __init jmr3927_rtc_init(void) |
| 203 | { | 193 | { |
| 204 | static struct resource __initdata res = { | 194 | static struct resource __initdata res = { |
| 205 | .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE, | 195 | .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE, |
| 206 | .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1, | 196 | .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1, |
| 207 | .flags = IORESOURCE_MEM, | 197 | .flags = IORESOURCE_MEM, |
| 208 | }; | 198 | }; |
| 209 | struct platform_device *dev; | 199 | platform_device_register_simple("rtc-ds1742", -1, &res, 1); |
| 210 | dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1); | ||
| 211 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | ||
| 212 | } | 200 | } |
| 213 | 201 | ||
| 214 | static void __init jmr3927_device_init(void) | 202 | static void __init jmr3927_device_init(void) |
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index cd748a930328..00cd5231da30 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c | |||
| @@ -27,85 +27,86 @@ | |||
| 27 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 27 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 28 | */ | 28 | */ |
| 29 | /* | 29 | /* |
| 30 | IRQ Device | 30 | * I8259A_IRQ_BASE+00 |
| 31 | 00 RBTX4927-ISA/00 | 31 | * I8259A_IRQ_BASE+01 PS2/Keyboard |
| 32 | 01 RBTX4927-ISA/01 PS2/Keyboard | 32 | * I8259A_IRQ_BASE+02 Cascade RBTX4927-ISA (irqs 8-15) |
| 33 | 02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15) | 33 | * I8259A_IRQ_BASE+03 |
| 34 | 03 RBTX4927-ISA/03 | 34 | * I8259A_IRQ_BASE+04 |
| 35 | 04 RBTX4927-ISA/04 | 35 | * I8259A_IRQ_BASE+05 |
| 36 | 05 RBTX4927-ISA/05 | 36 | * I8259A_IRQ_BASE+06 |
| 37 | 06 RBTX4927-ISA/06 | 37 | * I8259A_IRQ_BASE+07 |
| 38 | 07 RBTX4927-ISA/07 | 38 | * I8259A_IRQ_BASE+08 |
| 39 | 08 RBTX4927-ISA/08 | 39 | * I8259A_IRQ_BASE+09 |
| 40 | 09 RBTX4927-ISA/09 | 40 | * I8259A_IRQ_BASE+10 |
| 41 | 10 RBTX4927-ISA/10 | 41 | * I8259A_IRQ_BASE+11 |
| 42 | 11 RBTX4927-ISA/11 | 42 | * I8259A_IRQ_BASE+12 PS2/Mouse (not supported at this time) |
| 43 | 12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time) | 43 | * I8259A_IRQ_BASE+13 |
| 44 | 13 RBTX4927-ISA/13 | 44 | * I8259A_IRQ_BASE+14 IDE |
| 45 | 14 RBTX4927-ISA/14 IDE | 45 | * I8259A_IRQ_BASE+15 |
| 46 | 15 RBTX4927-ISA/15 | 46 | * |
| 47 | 47 | * MIPS_CPU_IRQ_BASE+00 Software 0 | |
| 48 | 16 TX4927-CP0/00 Software 0 | 48 | * MIPS_CPU_IRQ_BASE+01 Software 1 |
| 49 | 17 TX4927-CP0/01 Software 1 | 49 | * MIPS_CPU_IRQ_BASE+02 Cascade TX4927-CP0 |
| 50 | 18 TX4927-CP0/02 Cascade TX4927-CP0 | 50 | * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use |
| 51 | 19 TX4927-CP0/03 Multiplexed -- do not use | 51 | * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use |
| 52 | 20 TX4927-CP0/04 Multiplexed -- do not use | 52 | * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use |
| 53 | 21 TX4927-CP0/05 Multiplexed -- do not use | 53 | * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use |
| 54 | 22 TX4927-CP0/06 Multiplexed -- do not use | 54 | * MIPS_CPU_IRQ_BASE+07 CPU TIMER |
| 55 | 23 TX4927-CP0/07 CPU TIMER | 55 | * |
| 56 | 56 | * TXX9_IRQ_BASE+00 | |
| 57 | 24 TX4927-PIC/00 | 57 | * TXX9_IRQ_BASE+01 |
| 58 | 25 TX4927-PIC/01 | 58 | * TXX9_IRQ_BASE+02 |
| 59 | 26 TX4927-PIC/02 | 59 | * TXX9_IRQ_BASE+03 Cascade RBTX4927-IOC |
| 60 | 27 TX4927-PIC/03 Cascade RBTX4927-IOC | 60 | * TXX9_IRQ_BASE+04 |
| 61 | 28 TX4927-PIC/04 | 61 | * TXX9_IRQ_BASE+05 RBTX4927 RTL-8019AS ethernet |
| 62 | 29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet | 62 | * TXX9_IRQ_BASE+06 |
| 63 | 30 TX4927-PIC/06 | 63 | * TXX9_IRQ_BASE+07 |
| 64 | 31 TX4927-PIC/07 | 64 | * TXX9_IRQ_BASE+08 TX4927 SerialIO Channel 0 |
| 65 | 32 TX4927-PIC/08 TX4927 SerialIO Channel 0 | 65 | * TXX9_IRQ_BASE+09 TX4927 SerialIO Channel 1 |
| 66 | 33 TX4927-PIC/09 TX4927 SerialIO Channel 1 | 66 | * TXX9_IRQ_BASE+10 |
| 67 | 34 TX4927-PIC/10 | 67 | * TXX9_IRQ_BASE+11 |
| 68 | 35 TX4927-PIC/11 | 68 | * TXX9_IRQ_BASE+12 |
| 69 | 36 TX4927-PIC/12 | 69 | * TXX9_IRQ_BASE+13 |
| 70 | 37 TX4927-PIC/13 | 70 | * TXX9_IRQ_BASE+14 |
| 71 | 38 TX4927-PIC/14 | 71 | * TXX9_IRQ_BASE+15 |
| 72 | 39 TX4927-PIC/15 | 72 | * TXX9_IRQ_BASE+16 TX4927 PCI PCI-C |
| 73 | 40 TX4927-PIC/16 TX4927 PCI PCI-C | 73 | * TXX9_IRQ_BASE+17 |
| 74 | 41 TX4927-PIC/17 | 74 | * TXX9_IRQ_BASE+18 |
| 75 | 42 TX4927-PIC/18 | 75 | * TXX9_IRQ_BASE+19 |
| 76 | 43 TX4927-PIC/19 | 76 | * TXX9_IRQ_BASE+20 |
| 77 | 44 TX4927-PIC/20 | 77 | * TXX9_IRQ_BASE+21 |
| 78 | 45 TX4927-PIC/21 | 78 | * TXX9_IRQ_BASE+22 TX4927 PCI PCI-ERR |
| 79 | 46 TX4927-PIC/22 TX4927 PCI PCI-ERR | 79 | * TXX9_IRQ_BASE+23 TX4927 PCI PCI-PMA (not used) |
| 80 | 47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used) | 80 | * TXX9_IRQ_BASE+24 |
| 81 | 48 TX4927-PIC/24 | 81 | * TXX9_IRQ_BASE+25 |
| 82 | 49 TX4927-PIC/25 | 82 | * TXX9_IRQ_BASE+26 |
| 83 | 50 TX4927-PIC/26 | 83 | * TXX9_IRQ_BASE+27 |
| 84 | 51 TX4927-PIC/27 | 84 | * TXX9_IRQ_BASE+28 |
| 85 | 52 TX4927-PIC/28 | 85 | * TXX9_IRQ_BASE+29 |
| 86 | 53 TX4927-PIC/29 | 86 | * TXX9_IRQ_BASE+30 |
| 87 | 54 TX4927-PIC/30 | 87 | * TXX9_IRQ_BASE+31 |
| 88 | 55 TX4927-PIC/31 | 88 | * |
| 89 | 89 | * RBTX4927_IRQ_IOC+00 FPCIB0 PCI-D (SouthBridge) | |
| 90 | 56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4] | 90 | * RBTX4927_IRQ_IOC+01 FPCIB0 PCI-C (SouthBridge) |
| 91 | 57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5] | 91 | * RBTX4927_IRQ_IOC+02 FPCIB0 PCI-B (SouthBridge/IDE/pin=1,INTR) |
| 92 | 58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported] | 92 | * RBTX4927_IRQ_IOC+03 FPCIB0 PCI-A (SouthBridge/USB/pin=4) |
| 93 | 59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6] | 93 | * RBTX4927_IRQ_IOC+04 |
| 94 | 60 RBTX4927-IOC/04 | 94 | * RBTX4927_IRQ_IOC+05 |
| 95 | 61 RBTX4927-IOC/05 | 95 | * RBTX4927_IRQ_IOC+06 |
| 96 | 62 RBTX4927-IOC/06 | 96 | * RBTX4927_IRQ_IOC+07 |
| 97 | 63 RBTX4927-IOC/07 | 97 | * |
| 98 | 98 | * NOTES: | |
| 99 | NOTES: | 99 | * SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58 |
| 100 | SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58 | 100 | * SouthBridge/ISA/pin=0 no pci irq used by this device |
| 101 | SouthBridge/ISA/pin=0 no pci irq used by this device | 101 | * SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR |
| 102 | SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14 | 102 | * via ISA IRQ14 |
| 103 | SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59 | 103 | * SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59 |
| 104 | SouthBridge/PMC/pin=0 no pci irq used by this device | 104 | * SouthBridge/PMC/pin=0 no pci irq used by this device |
| 105 | SuperIO/PS2/Keyboard, using INTR via ISA IRQ1 | 105 | * SuperIO/PS2/Keyboard, using INTR via ISA IRQ1 |
| 106 | SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported) | 106 | * SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported) |
| 107 | JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6 | 107 | * JP7 is not bus master -- do NOT use -- only 4 pci bus master's |
| 108 | */ | 108 | * allowed -- SouthBridge, JP4, JP5, JP6 |
| 109 | */ | ||
| 109 | 110 | ||
| 110 | #include <linux/init.h> | 111 | #include <linux/init.h> |
| 111 | #include <linux/types.h> | 112 | #include <linux/types.h> |
| @@ -134,7 +135,7 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq) | |||
| 134 | level3 = readb(rbtx4927_imstat_addr) & 0x1f; | 135 | level3 = readb(rbtx4927_imstat_addr) & 0x1f; |
| 135 | if (level3) | 136 | if (level3) |
| 136 | sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; | 137 | sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1; |
| 137 | return (sw_irq); | 138 | return sw_irq; |
| 138 | } | 139 | } |
| 139 | 140 | ||
| 140 | static void __init toshiba_rbtx4927_irq_ioc_init(void) | 141 | static void __init toshiba_rbtx4927_irq_ioc_init(void) |
diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c index f01af382e9a8..962ada57d12d 100644 --- a/arch/mips/txx9/rbtx4927/setup.c +++ b/arch/mips/txx9/rbtx4927/setup.c | |||
| @@ -46,7 +46,6 @@ | |||
| 46 | #include <linux/kernel.h> | 46 | #include <linux/kernel.h> |
| 47 | #include <linux/types.h> | 47 | #include <linux/types.h> |
| 48 | #include <linux/ioport.h> | 48 | #include <linux/ioport.h> |
| 49 | #include <linux/interrupt.h> | ||
| 50 | #include <linux/platform_device.h> | 49 | #include <linux/platform_device.h> |
| 51 | #include <linux/delay.h> | 50 | #include <linux/delay.h> |
| 52 | #include <asm/io.h> | 51 | #include <asm/io.h> |
| @@ -189,9 +188,6 @@ static void __init rbtx4927_mem_setup(void) | |||
| 189 | u32 cp0_config; | 188 | u32 cp0_config; |
| 190 | char *argptr; | 189 | char *argptr; |
| 191 | 190 | ||
| 192 | /* f/w leaves this on at startup */ | ||
| 193 | clear_c0_status(ST0_ERL); | ||
| 194 | |||
| 195 | /* enable caches -- HCP5 does this, pmon does not */ | 191 | /* enable caches -- HCP5 does this, pmon does not */ |
| 196 | cp0_config = read_c0_config(); | 192 | cp0_config = read_c0_config(); |
| 197 | cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); | 193 | cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC); |
| @@ -218,24 +214,9 @@ static void __init rbtx4927_mem_setup(void) | |||
| 218 | 214 | ||
| 219 | tx4927_setup_serial(); | 215 | tx4927_setup_serial(); |
| 220 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | 216 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE |
| 221 | argptr = prom_getcmdline(); | 217 | argptr = prom_getcmdline(); |
| 222 | if (strstr(argptr, "console=") == NULL) { | 218 | if (!strstr(argptr, "console=")) |
| 223 | strcat(argptr, " console=ttyS0,38400"); | 219 | strcat(argptr, " console=ttyS0,38400"); |
| 224 | } | ||
| 225 | #endif | ||
| 226 | |||
| 227 | #ifdef CONFIG_ROOT_NFS | ||
| 228 | argptr = prom_getcmdline(); | ||
| 229 | if (strstr(argptr, "root=") == NULL) { | ||
| 230 | strcat(argptr, " root=/dev/nfs rw"); | ||
| 231 | } | ||
| 232 | #endif | ||
| 233 | |||
| 234 | #ifdef CONFIG_IP_PNP | ||
| 235 | argptr = prom_getcmdline(); | ||
| 236 | if (strstr(argptr, "ip=") == NULL) { | ||
| 237 | strcat(argptr, " ip=any"); | ||
| 238 | } | ||
| 239 | #endif | 220 | #endif |
| 240 | } | 221 | } |
| 241 | 222 | ||
| @@ -298,19 +279,17 @@ static void __init rbtx4927_time_init(void) | |||
| 298 | tx4927_time_init(0); | 279 | tx4927_time_init(0); |
| 299 | } | 280 | } |
| 300 | 281 | ||
| 301 | static int __init toshiba_rbtx4927_rtc_init(void) | 282 | static void __init toshiba_rbtx4927_rtc_init(void) |
| 302 | { | 283 | { |
| 303 | struct resource res = { | 284 | struct resource res = { |
| 304 | .start = RBTX4927_BRAMRTC_BASE - IO_BASE, | 285 | .start = RBTX4927_BRAMRTC_BASE - IO_BASE, |
| 305 | .end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1, | 286 | .end = RBTX4927_BRAMRTC_BASE - IO_BASE + 0x800 - 1, |
| 306 | .flags = IORESOURCE_MEM, | 287 | .flags = IORESOURCE_MEM, |
| 307 | }; | 288 | }; |
| 308 | struct platform_device *dev = | 289 | platform_device_register_simple("rtc-ds1742", -1, &res, 1); |
| 309 | platform_device_register_simple("rtc-ds1742", -1, &res, 1); | ||
| 310 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | ||
| 311 | } | 290 | } |
| 312 | 291 | ||
| 313 | static int __init rbtx4927_ne_init(void) | 292 | static void __init rbtx4927_ne_init(void) |
| 314 | { | 293 | { |
| 315 | struct resource res[] = { | 294 | struct resource res[] = { |
| 316 | { | 295 | { |
| @@ -322,10 +301,7 @@ static int __init rbtx4927_ne_init(void) | |||
| 322 | .flags = IORESOURCE_IRQ, | 301 | .flags = IORESOURCE_IRQ, |
| 323 | } | 302 | } |
| 324 | }; | 303 | }; |
| 325 | struct platform_device *dev = | 304 | platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res)); |
| 326 | platform_device_register_simple("ne", -1, | ||
| 327 | res, ARRAY_SIZE(res)); | ||
| 328 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | ||
| 329 | } | 305 | } |
| 330 | 306 | ||
| 331 | static void __init rbtx4927_device_init(void) | 307 | static void __init rbtx4927_device_init(void) |
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c index 3971a061657a..ca2f8306ce93 100644 --- a/arch/mips/txx9/rbtx4938/irq.c +++ b/arch/mips/txx9/rbtx4938/irq.c | |||
| @@ -11,59 +11,57 @@ | |||
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | /* | 13 | /* |
| 14 | IRQ Device | 14 | * MIPS_CPU_IRQ_BASE+00 Software 0 |
| 15 | 15 | * MIPS_CPU_IRQ_BASE+01 Software 1 | |
| 16 | 16 TX4938-CP0/00 Software 0 | 16 | * MIPS_CPU_IRQ_BASE+02 Cascade TX4938-CP0 |
| 17 | 17 TX4938-CP0/01 Software 1 | 17 | * MIPS_CPU_IRQ_BASE+03 Multiplexed -- do not use |
| 18 | 18 TX4938-CP0/02 Cascade TX4938-CP0 | 18 | * MIPS_CPU_IRQ_BASE+04 Multiplexed -- do not use |
| 19 | 19 TX4938-CP0/03 Multiplexed -- do not use | 19 | * MIPS_CPU_IRQ_BASE+05 Multiplexed -- do not use |
| 20 | 20 TX4938-CP0/04 Multiplexed -- do not use | 20 | * MIPS_CPU_IRQ_BASE+06 Multiplexed -- do not use |
| 21 | 21 TX4938-CP0/05 Multiplexed -- do not use | 21 | * MIPS_CPU_IRQ_BASE+07 CPU TIMER |
| 22 | 22 TX4938-CP0/06 Multiplexed -- do not use | 22 | * |
| 23 | 23 TX4938-CP0/07 CPU TIMER | 23 | * TXX9_IRQ_BASE+00 |
| 24 | 24 | * TXX9_IRQ_BASE+01 | |
| 25 | 24 TX4938-PIC/00 | 25 | * TXX9_IRQ_BASE+02 Cascade RBTX4938-IOC |
| 26 | 25 TX4938-PIC/01 | 26 | * TXX9_IRQ_BASE+03 RBTX4938 RTL-8019AS Ethernet |
| 27 | 26 TX4938-PIC/02 Cascade RBTX4938-IOC | 27 | * TXX9_IRQ_BASE+04 |
| 28 | 27 TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet | 28 | * TXX9_IRQ_BASE+05 TX4938 ETH1 |
| 29 | 28 TX4938-PIC/04 | 29 | * TXX9_IRQ_BASE+06 TX4938 ETH0 |
| 30 | 29 TX4938-PIC/05 TX4938 ETH1 | 30 | * TXX9_IRQ_BASE+07 |
| 31 | 30 TX4938-PIC/06 TX4938 ETH0 | 31 | * TXX9_IRQ_BASE+08 TX4938 SIO 0 |
| 32 | 31 TX4938-PIC/07 | 32 | * TXX9_IRQ_BASE+09 TX4938 SIO 1 |
| 33 | 32 TX4938-PIC/08 TX4938 SIO 0 | 33 | * TXX9_IRQ_BASE+10 TX4938 DMA0 |
| 34 | 33 TX4938-PIC/09 TX4938 SIO 1 | 34 | * TXX9_IRQ_BASE+11 TX4938 DMA1 |
| 35 | 34 TX4938-PIC/10 TX4938 DMA0 | 35 | * TXX9_IRQ_BASE+12 TX4938 DMA2 |
| 36 | 35 TX4938-PIC/11 TX4938 DMA1 | 36 | * TXX9_IRQ_BASE+13 TX4938 DMA3 |
| 37 | 36 TX4938-PIC/12 TX4938 DMA2 | 37 | * TXX9_IRQ_BASE+14 |
| 38 | 37 TX4938-PIC/13 TX4938 DMA3 | 38 | * TXX9_IRQ_BASE+15 |
| 39 | 38 TX4938-PIC/14 | 39 | * TXX9_IRQ_BASE+16 TX4938 PCIC |
| 40 | 39 TX4938-PIC/15 | 40 | * TXX9_IRQ_BASE+17 TX4938 TMR0 |
| 41 | 40 TX4938-PIC/16 TX4938 PCIC | 41 | * TXX9_IRQ_BASE+18 TX4938 TMR1 |
| 42 | 41 TX4938-PIC/17 TX4938 TMR0 | 42 | * TXX9_IRQ_BASE+19 TX4938 TMR2 |
| 43 | 42 TX4938-PIC/18 TX4938 TMR1 | 43 | * TXX9_IRQ_BASE+20 |
| 44 | 43 TX4938-PIC/19 TX4938 TMR2 | 44 | * TXX9_IRQ_BASE+21 |
| 45 | 44 TX4938-PIC/20 | 45 | * TXX9_IRQ_BASE+22 TX4938 PCIERR |
| 46 | 45 TX4938-PIC/21 | 46 | * TXX9_IRQ_BASE+23 |
| 47 | 46 TX4938-PIC/22 TX4938 PCIERR | 47 | * TXX9_IRQ_BASE+24 |
| 48 | 47 TX4938-PIC/23 | 48 | * TXX9_IRQ_BASE+25 |
| 49 | 48 TX4938-PIC/24 | 49 | * TXX9_IRQ_BASE+26 |
| 50 | 49 TX4938-PIC/25 | 50 | * TXX9_IRQ_BASE+27 |
| 51 | 50 TX4938-PIC/26 | 51 | * TXX9_IRQ_BASE+28 |
| 52 | 51 TX4938-PIC/27 | 52 | * TXX9_IRQ_BASE+29 |
| 53 | 52 TX4938-PIC/28 | 53 | * TXX9_IRQ_BASE+30 |
| 54 | 53 TX4938-PIC/29 | 54 | * TXX9_IRQ_BASE+31 TX4938 SPI |
| 55 | 54 TX4938-PIC/30 | 55 | * |
| 56 | 55 TX4938-PIC/31 TX4938 SPI | 56 | * RBTX4938_IRQ_IOC+00 PCI-D |
| 57 | 57 | * RBTX4938_IRQ_IOC+01 PCI-C | |
| 58 | 56 RBTX4938-IOC/00 PCI-D | 58 | * RBTX4938_IRQ_IOC+02 PCI-B |
| 59 | 57 RBTX4938-IOC/01 PCI-C | 59 | * RBTX4938_IRQ_IOC+03 PCI-A |
| 60 | 58 RBTX4938-IOC/02 PCI-B | 60 | * RBTX4938_IRQ_IOC+04 RTC |
| 61 | 59 RBTX4938-IOC/03 PCI-A | 61 | * RBTX4938_IRQ_IOC+05 ATA |
| 62 | 60 RBTX4938-IOC/04 RTC | 62 | * RBTX4938_IRQ_IOC+06 MODEM |
| 63 | 61 RBTX4938-IOC/05 ATA | 63 | * RBTX4938_IRQ_IOC+07 SWINT |
| 64 | 62 RBTX4938-IOC/06 MODEM | 64 | */ |
| 65 | 63 RBTX4938-IOC/07 SWINT | ||
| 66 | */ | ||
| 67 | #include <linux/init.h> | 65 | #include <linux/init.h> |
| 68 | #include <linux/interrupt.h> | 66 | #include <linux/interrupt.h> |
| 69 | #include <asm/mipsregs.h> | 67 | #include <asm/mipsregs.h> |
| @@ -93,9 +91,6 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq) | |||
| 93 | return sw_irq; | 91 | return sw_irq; |
| 94 | } | 92 | } |
| 95 | 93 | ||
| 96 | /**********************************************************************************/ | ||
| 97 | /* Functions for ioc */ | ||
| 98 | /**********************************************************************************/ | ||
| 99 | static void __init | 94 | static void __init |
| 100 | toshiba_rbtx4938_irq_ioc_init(void) | 95 | toshiba_rbtx4938_irq_ioc_init(void) |
| 101 | { | 96 | { |
diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index 3324a70a6b7a..5c05a21b33f5 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c | |||
| @@ -13,8 +13,6 @@ | |||
| 13 | #include <linux/types.h> | 13 | #include <linux/types.h> |
| 14 | #include <linux/ioport.h> | 14 | #include <linux/ioport.h> |
| 15 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/console.h> | ||
| 18 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
| 19 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
| 20 | 18 | ||
| @@ -169,45 +167,29 @@ static void __init rbtx4938_mem_setup(void) | |||
| 169 | 167 | ||
| 170 | tx4938_setup_serial(); | 168 | tx4938_setup_serial(); |
| 171 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE | 169 | #ifdef CONFIG_SERIAL_TXX9_CONSOLE |
| 172 | argptr = prom_getcmdline(); | 170 | argptr = prom_getcmdline(); |
| 173 | if (strstr(argptr, "console=") == NULL) { | 171 | if (!strstr(argptr, "console=")) |
| 174 | strcat(argptr, " console=ttyS0,38400"); | 172 | strcat(argptr, " console=ttyS0,38400"); |
| 175 | } | ||
| 176 | #endif | 173 | #endif |
| 177 | 174 | ||
| 178 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 | 175 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 |
| 179 | printk("PIOSEL: disabling both ata and nand selection\n"); | 176 | printk(KERN_INFO "PIOSEL: disabling both ata and nand selection\n"); |
| 180 | local_irq_disable(); | ||
| 181 | txx9_clear64(&tx4938_ccfgptr->pcfg, | 177 | txx9_clear64(&tx4938_ccfgptr->pcfg, |
| 182 | TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL); | 178 | TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL); |
| 183 | #endif | 179 | #endif |
| 184 | 180 | ||
| 185 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND | 181 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND |
| 186 | printk("PIOSEL: enabling nand selection\n"); | 182 | printk(KERN_INFO "PIOSEL: enabling nand selection\n"); |
| 187 | txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); | 183 | txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); |
| 188 | txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); | 184 | txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); |
| 189 | #endif | 185 | #endif |
| 190 | 186 | ||
| 191 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA | 187 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA |
| 192 | printk("PIOSEL: enabling ata selection\n"); | 188 | printk(KERN_INFO "PIOSEL: enabling ata selection\n"); |
| 193 | txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); | 189 | txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); |
| 194 | txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); | 190 | txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); |
| 195 | #endif | 191 | #endif |
| 196 | 192 | ||
| 197 | #ifdef CONFIG_IP_PNP | ||
| 198 | argptr = prom_getcmdline(); | ||
| 199 | if (strstr(argptr, "ip=") == NULL) { | ||
| 200 | strcat(argptr, " ip=any"); | ||
| 201 | } | ||
| 202 | #endif | ||
| 203 | |||
| 204 | |||
| 205 | #ifdef CONFIG_FB | ||
| 206 | { | ||
| 207 | conswitchp = &dummy_con; | ||
| 208 | } | ||
| 209 | #endif | ||
| 210 | |||
| 211 | rbtx4938_spi_setup(); | 193 | rbtx4938_spi_setup(); |
| 212 | pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */ | 194 | pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */ |
| 213 | /* fixup piosel */ | 195 | /* fixup piosel */ |
| @@ -228,7 +210,7 @@ static void __init rbtx4938_mem_setup(void) | |||
| 228 | rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff; | 210 | rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff; |
| 229 | rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY; | 211 | rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
| 230 | if (request_resource(&txx9_ce_res[2], &rbtx4938_fpga_resource)) | 212 | if (request_resource(&txx9_ce_res[2], &rbtx4938_fpga_resource)) |
| 231 | printk("request resource for fpga failed\n"); | 213 | printk(KERN_ERR "request resource for fpga failed\n"); |
| 232 | 214 | ||
| 233 | _machine_restart = rbtx4938_machine_restart; | 215 | _machine_restart = rbtx4938_machine_restart; |
| 234 | 216 | ||
| @@ -238,7 +220,7 @@ static void __init rbtx4938_mem_setup(void) | |||
| 238 | readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr)); | 220 | readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr)); |
| 239 | } | 221 | } |
| 240 | 222 | ||
| 241 | static int __init rbtx4938_ne_init(void) | 223 | static void __init rbtx4938_ne_init(void) |
| 242 | { | 224 | { |
| 243 | struct resource res[] = { | 225 | struct resource res[] = { |
| 244 | { | 226 | { |
| @@ -250,10 +232,7 @@ static int __init rbtx4938_ne_init(void) | |||
| 250 | .flags = IORESOURCE_IRQ, | 232 | .flags = IORESOURCE_IRQ, |
| 251 | } | 233 | } |
| 252 | }; | 234 | }; |
| 253 | struct platform_device *dev = | 235 | platform_device_register_simple("ne", -1, res, ARRAY_SIZE(res)); |
| 254 | platform_device_register_simple("ne", -1, | ||
| 255 | res, ARRAY_SIZE(res)); | ||
| 256 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | ||
| 257 | } | 236 | } |
| 258 | 237 | ||
| 259 | static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock); | 238 | static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock); |
diff --git a/include/asm-mips/txx9/smsc_fdc37m81x.h b/include/asm-mips/txx9/smsc_fdc37m81x.h index 9375e4fc2289..02e161d0755d 100644 --- a/include/asm-mips/txx9/smsc_fdc37m81x.h +++ b/include/asm-mips/txx9/smsc_fdc37m81x.h | |||
| @@ -56,7 +56,7 @@ | |||
| 56 | #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa | 56 | #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa |
| 57 | #define SMSC_FDC37M81X_CHIP_ID 0x4d | 57 | #define SMSC_FDC37M81X_CHIP_ID 0x4d |
| 58 | 58 | ||
| 59 | unsigned long __init smsc_fdc37m81x_init(unsigned long port); | 59 | unsigned long smsc_fdc37m81x_init(unsigned long port); |
| 60 | 60 | ||
| 61 | void smsc_fdc37m81x_config_beg(void); | 61 | void smsc_fdc37m81x_config_beg(void); |
| 62 | 62 | ||
diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h index 0bac37f758ec..f0439a73b3aa 100644 --- a/include/asm-mips/txx9/tx3927.h +++ b/include/asm-mips/txx9/tx3927.h | |||
| @@ -333,8 +333,8 @@ void tx3927_setup(void); | |||
| 333 | void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr); | 333 | void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr); |
| 334 | void tx3927_setup_serial(unsigned int cts_mask); | 334 | void tx3927_setup_serial(unsigned int cts_mask); |
| 335 | struct pci_controller; | 335 | struct pci_controller; |
| 336 | void __init tx3927_pcic_setup(struct pci_controller *channel, | 336 | void tx3927_pcic_setup(struct pci_controller *channel, |
| 337 | unsigned long sdram_size, int extarb); | 337 | unsigned long sdram_size, int extarb); |
| 338 | void tx3927_setup_pcierr_irq(void); | 338 | void tx3927_setup_pcierr_irq(void); |
| 339 | void tx3927_irq_init(void); | 339 | void tx3927_irq_init(void); |
| 340 | 340 | ||
diff --git a/include/asm-mips/txx9/tx4927pcic.h b/include/asm-mips/txx9/tx4927pcic.h index 223841c56131..c470b8a5fe57 100644 --- a/include/asm-mips/txx9/tx4927pcic.h +++ b/include/asm-mips/txx9/tx4927pcic.h | |||
| @@ -193,8 +193,8 @@ struct tx4927_pcic_reg { | |||
| 193 | 193 | ||
| 194 | struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr( | 194 | struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr( |
| 195 | struct pci_controller *channel); | 195 | struct pci_controller *channel); |
| 196 | void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr, | 196 | void tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr, |
| 197 | struct pci_controller *channel, int extarb); | 197 | struct pci_controller *channel, int extarb); |
| 198 | void tx4927_report_pcic_status(void); | 198 | void tx4927_report_pcic_status(void); |
| 199 | char *tx4927_pcibios_setup(char *str); | 199 | char *tx4927_pcibios_setup(char *str); |
| 200 | void tx4927_dump_pcic_settings(void); | 200 | void tx4927_dump_pcic_settings(void); |
