aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/mach-exynos/common.c101
-rw-r--r--arch/arm/mach-exynos/dev-ahci.c4
-rw-r--r--arch/arm/mach-exynos/dev-audio.c4
-rw-r--r--arch/arm/mach-exynos/dma.c6
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h587
-rw-r--r--arch/arm/mach-exynos/mct.c23
-rw-r--r--arch/arm/plat-s5p/irq-pm.c25
-rw-r--r--arch/arm/plat-samsung/irq-vic-timer.c16
8 files changed, 558 insertions, 208 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 7fdb139bc25b..4ef0cb513c83 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -345,6 +345,11 @@ static void __init exynos5_map_io(void)
345{ 345{
346 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); 346 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
347 347
348 s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);
349 s3c_device_i2c0.resource[0].end = EXYNOS5_PA_IIC(0) + SZ_4K - 1;
350 s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
351 s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC;
352
348 /* The I2C bus controllers are directly compatible with s3c2440 */ 353 /* The I2C bus controllers are directly compatible with s3c2440 */
349 s3c_i2c0_setname("s3c2440-i2c"); 354 s3c_i2c0_setname("s3c2440-i2c");
350 s3c_i2c1_setname("s3c2440-i2c"); 355 s3c_i2c1_setname("s3c2440-i2c");
@@ -451,7 +456,14 @@ static struct irq_chip combiner_chip = {
451 456
452static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) 457static void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
453{ 458{
454 if (combiner_nr >= MAX_COMBINER_NR) 459 unsigned int max_nr;
460
461 if (soc_is_exynos5250())
462 max_nr = EXYNOS5_MAX_COMBINER_NR;
463 else
464 max_nr = EXYNOS4_MAX_COMBINER_NR;
465
466 if (combiner_nr >= max_nr)
455 BUG(); 467 BUG();
456 if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0) 468 if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0)
457 BUG(); 469 BUG();
@@ -462,8 +474,14 @@ static void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
462 unsigned int irq_start) 474 unsigned int irq_start)
463{ 475{
464 unsigned int i; 476 unsigned int i;
477 unsigned int max_nr;
465 478
466 if (combiner_nr >= MAX_COMBINER_NR) 479 if (soc_is_exynos5250())
480 max_nr = EXYNOS5_MAX_COMBINER_NR;
481 else
482 max_nr = EXYNOS4_MAX_COMBINER_NR;
483
484 if (combiner_nr >= max_nr)
467 BUG(); 485 BUG();
468 486
469 combiner_data[combiner_nr].base = base; 487 combiner_data[combiner_nr].base = base;
@@ -506,7 +524,7 @@ void __init exynos4_init_irq(void)
506 of_irq_init(exynos4_dt_irq_match); 524 of_irq_init(exynos4_dt_irq_match);
507#endif 525#endif
508 526
509 for (irq = 0; irq < MAX_COMBINER_NR; irq++) { 527 for (irq = 0; irq < EXYNOS4_MAX_COMBINER_NR; irq++) {
510 528
511 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), 529 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
512 COMBINER_IRQ(irq, 0)); 530 COMBINER_IRQ(irq, 0));
@@ -527,7 +545,7 @@ void __init exynos5_init_irq(void)
527 545
528 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); 546 gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
529 547
530 for (irq = 0; irq < MAX_COMBINER_NR; irq++) { 548 for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
531 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), 549 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
532 COMBINER_IRQ(irq, 0)); 550 COMBINER_IRQ(irq, 0));
533 combiner_cascade_irq(irq, IRQ_SPI(irq)); 551 combiner_cascade_irq(irq, IRQ_SPI(irq));
@@ -651,27 +669,43 @@ static DEFINE_SPINLOCK(eint_lock);
651 669
652static unsigned int eint0_15_data[16]; 670static unsigned int eint0_15_data[16];
653 671
654static unsigned int exynos4_get_irq_nr(unsigned int number) 672static unsigned int exynos4_eint0_15_src_int[16] = {
655{ 673 EXYNOS4_IRQ_EINT0,
656 u32 ret = 0; 674 EXYNOS4_IRQ_EINT1,
657 675 EXYNOS4_IRQ_EINT2,
658 switch (number) { 676 EXYNOS4_IRQ_EINT3,
659 case 0 ... 3: 677 EXYNOS4_IRQ_EINT4,
660 ret = (number + IRQ_EINT0); 678 EXYNOS4_IRQ_EINT5,
661 break; 679 EXYNOS4_IRQ_EINT6,
662 case 4 ... 7: 680 EXYNOS4_IRQ_EINT7,
663 ret = (number + (IRQ_EINT4 - 4)); 681 EXYNOS4_IRQ_EINT8,
664 break; 682 EXYNOS4_IRQ_EINT9,
665 case 8 ... 15: 683 EXYNOS4_IRQ_EINT10,
666 ret = (number + (IRQ_EINT8 - 8)); 684 EXYNOS4_IRQ_EINT11,
667 break; 685 EXYNOS4_IRQ_EINT12,
668 default: 686 EXYNOS4_IRQ_EINT13,
669 printk(KERN_ERR "number available : %d\n", number); 687 EXYNOS4_IRQ_EINT14,
670 } 688 EXYNOS4_IRQ_EINT15,
671 689};
672 return ret;
673}
674 690
691static unsigned int exynos5_eint0_15_src_int[16] = {
692 EXYNOS5_IRQ_EINT0,
693 EXYNOS5_IRQ_EINT1,
694 EXYNOS5_IRQ_EINT2,
695 EXYNOS5_IRQ_EINT3,
696 EXYNOS5_IRQ_EINT4,
697 EXYNOS5_IRQ_EINT5,
698 EXYNOS5_IRQ_EINT6,
699 EXYNOS5_IRQ_EINT7,
700 EXYNOS5_IRQ_EINT8,
701 EXYNOS5_IRQ_EINT9,
702 EXYNOS5_IRQ_EINT10,
703 EXYNOS5_IRQ_EINT11,
704 EXYNOS5_IRQ_EINT12,
705 EXYNOS5_IRQ_EINT13,
706 EXYNOS5_IRQ_EINT14,
707 EXYNOS5_IRQ_EINT15,
708};
675static inline void exynos4_irq_eint_mask(struct irq_data *data) 709static inline void exynos4_irq_eint_mask(struct irq_data *data)
676{ 710{
677 u32 mask; 711 u32 mask;
@@ -816,7 +850,7 @@ static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
816 chained_irq_exit(chip, desc); 850 chained_irq_exit(chip, desc);
817} 851}
818 852
819static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) 853static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
820{ 854{
821 u32 *irq_data = irq_get_handler_data(irq); 855 u32 *irq_data = irq_get_handler_data(irq);
822 struct irq_chip *chip = irq_get_chip(irq); 856 struct irq_chip *chip = irq_get_chip(irq);
@@ -846,15 +880,22 @@ static int __init exynos4_init_irq_eint(void)
846 set_irq_flags(IRQ_EINT(irq), IRQF_VALID); 880 set_irq_flags(IRQ_EINT(irq), IRQF_VALID);
847 } 881 }
848 882
849 irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); 883 irq_set_chained_handler(EXYNOS_IRQ_EINT16_31, exynos4_irq_demux_eint16_31);
850 884
851 for (irq = 0 ; irq <= 15 ; irq++) { 885 for (irq = 0 ; irq <= 15 ; irq++) {
852 eint0_15_data[irq] = IRQ_EINT(irq); 886 eint0_15_data[irq] = IRQ_EINT(irq);
853 887
854 irq_set_handler_data(exynos4_get_irq_nr(irq), 888 if (soc_is_exynos5250()) {
855 &eint0_15_data[irq]); 889 irq_set_handler_data(exynos5_eint0_15_src_int[irq],
856 irq_set_chained_handler(exynos4_get_irq_nr(irq), 890 &eint0_15_data[irq]);
857 exynos4_irq_eint0_15); 891 irq_set_chained_handler(exynos5_eint0_15_src_int[irq],
892 exynos_irq_eint0_15);
893 } else {
894 irq_set_handler_data(exynos4_eint0_15_src_int[irq],
895 &eint0_15_data[irq]);
896 irq_set_chained_handler(exynos4_eint0_15_src_int[irq],
897 exynos_irq_eint0_15);
898 }
858 } 899 }
859 900
860 return 0; 901 return 0;
diff --git a/arch/arm/mach-exynos/dev-ahci.c b/arch/arm/mach-exynos/dev-ahci.c
index f57a3de8e1d2..50ce5b0adcf1 100644
--- a/arch/arm/mach-exynos/dev-ahci.c
+++ b/arch/arm/mach-exynos/dev-ahci.c
@@ -242,8 +242,8 @@ static struct resource exynos4_ahci_resource[] = {
242 .flags = IORESOURCE_MEM, 242 .flags = IORESOURCE_MEM,
243 }, 243 },
244 [1] = { 244 [1] = {
245 .start = IRQ_SATA, 245 .start = EXYNOS4_IRQ_SATA,
246 .end = IRQ_SATA,