8 files changed, 563 insertions, 4 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index b9d6a8b485e0..e135182992b2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -81,8 +81,8 @@ dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
         ecx-2000.dtb
 dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
         integratorcp.dtb
-dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
-dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
+kirkwood := \
+        kirkwood-cloudbox.dtb \
         kirkwood-db-88f6281.dtb \
         kirkwood-db-88f6282.dtb \
         kirkwood-dns320.dtb \
@@ -116,6 +116,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
         kirkwood-topkick.dtb \
         kirkwood-ts219-6281.dtb \
         kirkwood-ts219-6282.dtb
+dtb-$(CONFIG_ARCH_KIRKWOOD) += $(kirkwood)
+dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
 dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
 dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb
 dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
@@ -131,7 +133,8 @@ dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
         armada-xp-gp.dtb \
         armada-xp-netgear-rn2120.dtb \
         armada-xp-matrix.dtb \
-        armada-xp-openblocks-ax3-4.dtb
+        armada-xp-openblocks-ax3-4.dtb \
+        $(kirkwood)
 dtb-$(CONFIG_ARCH_MXC) += \
         imx25-karo-tx25.dtb \
         imx25-pdk.dtb \
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 6c0824ef6d03..2d7af55e9f75 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -1,5 +1,5 @@
 config ARCH_MVEBU
-        bool "Marvell Engineering Business Unit (MVEBU) SoCs" if ARCH_MULTI_V7
+        bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
         select ARCH_SUPPORTS_BIG_ENDIAN
         select CLKSRC_MMIO
         select COMMON_CLK
@@ -46,6 +46,23 @@ config MACH_ARMADA_XP
           Say 'Y' here if you want your kernel to support boards based
           on the Marvell Armada XP SoC with device tree.
 
+config MACH_KIRKWOOD
+        bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
+        select ARCH_HAS_CPUFREQ
+        select ARCH_REQUIRE_GPIOLIB
+        select CPU_FEROCEON
+        select KIRKWOOD_CLK
+        select OF_IRQ
+        select ORION_IRQCHIP
+        select ORION_TIMER
+        select PCI
+        select PCI_QUIRKS
+        select PINCTRL_KIRKWOOD
+        select USE_OF
+        help
+          Say 'Y' here if you want your kernel to support boards based
+          on the Marvell Kirkwood device tree.
+
 endmenu
 
 endif
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index d99846103bbb..6809ec769dd6 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -7,3 +7,4 @@ obj-y				 += coherency.o coherency_ll.o pmsu.o system-controller.o mvebu-soc-id.
 obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o
 obj-$(CONFIG_SMP)                += platsmp.o headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)        += hotplug.o
+obj-$(CONFIG_MACH_KIRKWOOD)      += kirkwood.o kirkwood-pm.o
diff --git a/arch/arm/mach-mvebu/include/mach/bridge-regs.h b/arch/arm/mach-mvebu/include/mach/bridge-regs.h
new file mode 100644
index 000000000000..6eb8fea1f76f
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/bridge-regs.h
@@ -0,0 +1,85 @@
+/*
+ * arch/arm/mach-mvebu/include/mach/bridge-regs.h
+ *
+ * Mbus-L to Mbus Bridge Registers
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_BRIDGE_REGS_H
+#define __ASM_ARCH_BRIDGE_REGS_H
+
+#include <mach/kirkwood.h>
+
+#define CPU_CONFIG              (BRIDGE_VIRT_BASE + 0x0100)
+#define CPU_CONFIG_PHYS         (BRIDGE_PHYS_BASE + 0x0100)
+#define CPU_CONFIG_ERROR_PROP   0x00000004
+
+#define CPU_CONTROL             (BRIDGE_VIRT_BASE + 0x0104)
+#define CPU_CONTROL_PHYS        (BRIDGE_PHYS_BASE + 0x0104)
+#define CPU_RESET               0x00000002
+
+#define RSTOUTn_MASK            (BRIDGE_VIRT_BASE + 0x0108)
+#define SOFT_RESET_OUT_EN       0x00000004
+
+#define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE + 0x010c)
+#define SOFT_RESET              0x00000001
+
+#define BRIDGE_CAUSE            (BRIDGE_VIRT_BASE + 0x0110)
+
+#define BRIDGE_INT_TIMER1_CLR   (~0x0004)
+
+#define IRQ_VIRT_BASE           (BRIDGE_VIRT_BASE + 0x0200)
+#define IRQ_CAUSE_LOW_OFF       0x0000
+#define IRQ_MASK_LOW_OFF        0x0004
+#define IRQ_CAUSE_HIGH_OFF      0x0010
+#define IRQ_MASK_HIGH_OFF       0x0014
+
+#define TIMER_VIRT_BASE         (BRIDGE_VIRT_BASE + 0x0300)
+#define TIMER_PHYS_BASE         (BRIDGE_PHYS_BASE + 0x0300)
+
+#define L2_CONFIG_REG           (BRIDGE_VIRT_BASE + 0x0128)
+#define L2_WRITETHROUGH         0x00000010
+
+#define CLOCK_GATING_CTRL       (BRIDGE_VIRT_BASE + 0x11c)
+#define CGC_BIT_GE0             (0)
+#define CGC_BIT_PEX0            (2)
+#define CGC_BIT_USB0            (3)
+#define CGC_BIT_SDIO            (4)
+#define CGC_BIT_TSU             (5)
+#define CGC_BIT_DUNIT           (6)
+#define CGC_BIT_RUNIT           (7)
+#define CGC_BIT_XOR0            (8)
+#define CGC_BIT_AUDIO           (9)
+#define CGC_BIT_SATA0           (14)
+#define CGC_BIT_SATA1           (15)
+#define CGC_BIT_XOR1            (16)
+#define CGC_BIT_CRYPTO          (17)
+#define CGC_BIT_PEX1            (18)
+#define CGC_BIT_GE1             (19)
+#define CGC_BIT_TDM             (20)
+#define CGC_GE0                 (1 << 0)
+#define CGC_PEX0                (1 << 2)
+#define CGC_USB0                (1 << 3)
+#define CGC_SDIO                (1 << 4)
+#define CGC_TSU                 (1 << 5)
+#define CGC_DUNIT               (1 << 6)
+#define CGC_RUNIT               (1 << 7)
+#define CGC_XOR0                (1 << 8)
+#define CGC_AUDIO               (1 << 9)
+#define CGC_POWERSAVE           (1 << 11)
+#define CGC_SATA0               (1 << 14)
+#define CGC_SATA1               (1 << 15)
+#define CGC_XOR1                (1 << 16)
+#define CGC_CRYPTO              (1 << 17)
+#define CGC_PEX1                (1 << 18)
+#define CGC_GE1                 (1 << 19)
+#define CGC_TDM                 (1 << 20)
+#define CGC_RESERVED            (0x6 << 21)
+
+#define MEMORY_PM_CTRL          (BRIDGE_VIRT_BASE + 0x118)
+#define MEMORY_PM_CTRL_PHYS     (BRIDGE_PHYS_BASE + 0x118)
+
+#endif
diff --git a/arch/arm/mach-mvebu/include/mach/kirkwood.h b/arch/arm/mach-mvebu/include/mach/kirkwood.h
new file mode 100644
index 000000000000..9d966dc78d67
--- /dev/null
+++ b/arch/arm/mach-mvebu/include/mach/kirkwood.h
@@ -0,0 +1,142 @@
+/*
+ * arch/arm/mach-mvebu/include/mach/kirkwood.h
+ *
+ * Generic definitions for Marvell Kirkwood SoC flavors:
+ *  88F6180, 88F6192 and 88F6281.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */