3 files changed, 127 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index a5f3d0d244a2..cb9baaac9e85 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -1035,6 +1035,53 @@
 #define PACKET3_WAIT_REG_MEM                            0x3C
 #define PACKET3_MEM_WRITE                               0x3D
 #define PACKET3_INDIRECT_BUFFER                         0x32
+#define PACKET3_CP_DMA                                  0x41
+/* 1. header
+ * 2. SRC_ADDR_LO or DATA [31:0]
+ * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] |
+ *    SRC_ADDR_HI [7:0]
+ * 4. DST_ADDR_LO [31:0]
+ * 5. DST_ADDR_HI [7:0]
+ * 6. COMMAND [29:22] | BYTE_COUNT [20:0]
+ */
+#              define PACKET3_CP_DMA_DST_SEL(x)    ((x) << 20)
+                /* 0 - SRC_ADDR
+                 * 1 - GDS
+                 */
+#              define PACKET3_CP_DMA_ENGINE(x)     ((x) << 27)
+                /* 0 - ME
+                 * 1 - PFP
+                 */
+#              define PACKET3_CP_DMA_SRC_SEL(x)    ((x) << 29)
+                /* 0 - SRC_ADDR
+                 * 1 - GDS
+                 * 2 - DATA
+                 */
+#              define PACKET3_CP_DMA_CP_SYNC       (1 << 31)
+/* COMMAND */
+#              define PACKET3_CP_DMA_DIS_WC        (1 << 21)
+#              define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
+                /* 0 - none
+                 * 1 - 8 in 16
+                 * 2 - 8 in 32
+                 * 3 - 8 in 64
+                 */
+#              define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24)
+                /* 0 - none
+                 * 1 - 8 in 16
+                 * 2 - 8 in 32
+                 * 3 - 8 in 64
+                 */
+#              define PACKET3_CP_DMA_CMD_SAS       (1 << 26)
+                /* 0 - memory
+                 * 1 - register
+                 */
+#              define PACKET3_CP_DMA_CMD_DAS       (1 << 27)
+                /* 0 - memory
+                 * 1 - register
+                 */
+#              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
+#              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
 #define PACKET3_SURFACE_SYNC                            0x43
 #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
 #              define PACKET3_CB1_DEST_BASE_ENA    (1 << 7)
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index a596c554a3a0..4a53402b1852 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -1186,6 +1186,38 @@
 #define PACKET3_WAIT_REG_MEM                            0x3C
 #define PACKET3_MEM_WRITE                               0x3D
 #define PACKET3_INDIRECT_BUFFER                         0x32
+#define PACKET3_CP_DMA                                  0x41
+/* 1. header
+ * 2. SRC_ADDR_LO [31:0]
+ * 3. CP_SYNC [31] | SRC_ADDR_HI [7:0]
+ * 4. DST_ADDR_LO [31:0]
+ * 5. DST_ADDR_HI [7:0]
+ * 6. COMMAND [29:22] | BYTE_COUNT [20:0]
+ */
+#              define PACKET3_CP_DMA_CP_SYNC       (1 << 31)
+/* COMMAND */
+#              define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
+                /* 0 - none
+                 * 1 - 8 in 16
+                 * 2 - 8 in 32
+                 * 3 - 8 in 64
+                 */
+#              define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24)
+                /* 0 - none
+                 * 1 - 8 in 16
+                 * 2 - 8 in 32
+                 * 3 - 8 in 64
+                 */
+#              define PACKET3_CP_DMA_CMD_SAS       (1 << 26)
+                /* 0 - memory
+                 * 1 - register
+                 */
+#              define PACKET3_CP_DMA_CMD_DAS       (1 << 27)
+                /* 0 - memory
+                 * 1 - register
+                 */
+#              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
+#              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
 #define PACKET3_SURFACE_SYNC                            0x43
 #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
 #              define PACKET3_TC_ACTION_ENA        (1 << 23)
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index e153c254fbfb..62b46215d423 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -849,6 +849,54 @@
 #define PACKET3_WAIT_REG_MEM                            0x3C
 #define PACKET3_MEM_WRITE                               0x3D
 #define PACKET3_COPY_DATA                               0x40
+#define PACKET3_CP_DMA                                  0x41
+/* 1. header
+ * 2. SRC_ADDR_LO or DATA [31:0]
+ * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] |
+ *    SRC_ADDR_HI [7:0]
+ * 4. DST_ADDR_LO [31:0]
+ * 5. DST_ADDR_HI [7:0]
+ * 6. COMMAND [30:21] | BYTE_COUNT [20:0]
+ */
+#              define PACKET3_CP_DMA_DST_SEL(x)    ((x) << 20)
+                /* 0 - SRC_ADDR
+                 * 1 - GDS
+                 */
+#              define PACKET3_CP_DMA_ENGINE(x)     ((x) << 27)
+                /* 0 - ME
+                 * 1 - PFP
+                 */
+#              define PACKET3_CP_DMA_SRC_SEL(x)    ((x) << 29)
+                /* 0 - SRC_ADDR
+                 * 1 - GDS
+                 * 2 - DATA
+                 */
+#              define PACKET3_CP_DMA_CP_SYNC       (1 << 31)
+/* COMMAND */
+#              define PACKET3_CP_DMA_DIS_WC        (1 << 21)
+#              define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
+                /* 0 - none
+                 * 1 - 8 in 16
+                 * 2 - 8 in 32
+                 * 3 - 8 in 64
+                 */
+#              define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24)
+                /* 0 - none
+                 * 1 - 8 in 16
+                 * 2 - 8 in 32
+                 * 3 - 8 in 64
+                 */
+#              define PACKET3_CP_DMA_CMD_SAS       (1 << 26)
+                /* 0 - memory
+                 * 1 - register
+                 */
+#              define PACKET3_CP_DMA_CMD_DAS       (1 << 27)
+                /* 0 - memory
+                 * 1 - register
+                 */
+#              define PACKET3_CP_DMA_CMD_SAIC      (1 << 28)
+#              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
+#              define PACKET3_CP_DMA_CMD_RAW_WAIT  (1 << 30)
 #define PACKET3_PFP_SYNC_ME                             0x42
 #define PACKET3_SURFACE_SYNC                            0x43
 #              define PACKET3_DEST_BASE_0_ENA      (1 << 0)

diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index a5f3d0d244a2..cb9baaac9e85 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -1035,6 +1035,53 @@
1035	#define PACKET3_WAIT_REG_MEM 0x3C	1035	#define PACKET3_WAIT_REG_MEM 0x3C
1036	#define PACKET3_MEM_WRITE 0x3D	1036	#define PACKET3_MEM_WRITE 0x3D
1037	#define PACKET3_INDIRECT_BUFFER 0x32	1037	#define PACKET3_INDIRECT_BUFFER 0x32
		1038	#define PACKET3_CP_DMA 0x41
		1039	/* 1. header
		1040	* 2. SRC_ADDR_LO or DATA [31:0]
		1041	* 3. CP_SYNC [31] \| SRC_SEL [30:29] \| ENGINE [27] \| DST_SEL [21:20] \|
		1042	* SRC_ADDR_HI [7:0]
		1043	* 4. DST_ADDR_LO [31:0]
		1044	* 5. DST_ADDR_HI [7:0]
		1045	* 6. COMMAND [29:22] \| BYTE_COUNT [20:0]
		1046	*/
		1047	# define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20)
		1048	/* 0 - SRC_ADDR
		1049	* 1 - GDS
		1050	*/
		1051	# define PACKET3_CP_DMA_ENGINE(x) ((x) << 27)
		1052	/* 0 - ME
		1053	* 1 - PFP
		1054	*/
		1055	# define PACKET3_CP_DMA_SRC_SEL(x) ((x) << 29)
		1056	/* 0 - SRC_ADDR
		1057	* 1 - GDS
		1058	* 2 - DATA
		1059	*/
		1060	# define PACKET3_CP_DMA_CP_SYNC (1 << 31)
		1061	/* COMMAND */
		1062	# define PACKET3_CP_DMA_DIS_WC (1 << 21)
		1063	# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
		1064	/* 0 - none
		1065	* 1 - 8 in 16
		1066	* 2 - 8 in 32
		1067	* 3 - 8 in 64
		1068	*/
		1069	# define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24)
		1070	/* 0 - none
		1071	* 1 - 8 in 16
		1072	* 2 - 8 in 32
		1073	* 3 - 8 in 64
		1074	*/
		1075	# define PACKET3_CP_DMA_CMD_SAS (1 << 26)
		1076	/* 0 - memory
		1077	* 1 - register
		1078	*/
		1079	# define PACKET3_CP_DMA_CMD_DAS (1 << 27)
		1080	/* 0 - memory
		1081	* 1 - register
		1082	*/
		1083	# define PACKET3_CP_DMA_CMD_SAIC (1 << 28)
		1084	# define PACKET3_CP_DMA_CMD_DAIC (1 << 29)
1038	#define PACKET3_SURFACE_SYNC 0x43	1085	#define PACKET3_SURFACE_SYNC 0x43
1039	# define PACKET3_CB0_DEST_BASE_ENA (1 << 6)	1086	# define PACKET3_CB0_DEST_BASE_ENA (1 << 6)
1040	# define PACKET3_CB1_DEST_BASE_ENA (1 << 7)	1087	# define PACKET3_CB1_DEST_BASE_ENA (1 << 7)


diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index a596c554a3a0..4a53402b1852 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h
@@ -1186,6 +1186,38 @@
1186	#define PACKET3_WAIT_REG_MEM 0x3C	1186	#define PACKET3_WAIT_REG_MEM 0x3C
1187	#define PACKET3_MEM_WRITE 0x3D	1187	#define PACKET3_MEM_WRITE 0x3D
1188	#define PACKET3_INDIRECT_BUFFER 0x32	1188	#define PACKET3_INDIRECT_BUFFER 0x32
		1189	#define PACKET3_CP_DMA 0x41
		1190	/* 1. header
		1191	* 2. SRC_ADDR_LO [31:0]
		1192	* 3. CP_SYNC [31] \| SRC_ADDR_HI [7:0]
		1193	* 4. DST_ADDR_LO [31:0]
		1194	* 5. DST_ADDR_HI [7:0]
		1195	* 6. COMMAND [29:22] \| BYTE_COUNT [20:0]
		1196	*/
		1197	# define PACKET3_CP_DMA_CP_SYNC (1 << 31)
		1198	/* COMMAND */
		1199	# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
		1200	/* 0 - none
		1201	* 1 - 8 in 16
		1202	* 2 - 8 in 32
		1203	* 3 - 8 in 64
		1204	*/
		1205	# define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24)
		1206	/* 0 - none
		1207	* 1 - 8 in 16
		1208	* 2 - 8 in 32
		1209	* 3 - 8 in 64
		1210	*/
		1211	# define PACKET3_CP_DMA_CMD_SAS (1 << 26)
		1212	/* 0 - memory
		1213	* 1 - register
		1214	*/
		1215	# define PACKET3_CP_DMA_CMD_DAS (1 << 27)
		1216	/* 0 - memory
		1217	* 1 - register
		1218	*/
		1219	# define PACKET3_CP_DMA_CMD_SAIC (1 << 28)
		1220	# define PACKET3_CP_DMA_CMD_DAIC (1 << 29)
1189	#define PACKET3_SURFACE_SYNC 0x43	1221	#define PACKET3_SURFACE_SYNC 0x43
1190	# define PACKET3_CB0_DEST_BASE_ENA (1 << 6)	1222	# define PACKET3_CB0_DEST_BASE_ENA (1 << 6)
1191	# define PACKET3_TC_ACTION_ENA (1 << 23)	1223	# define PACKET3_TC_ACTION_ENA (1 << 23)


diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index e153c254fbfb..62b46215d423 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h
@@ -849,6 +849,54 @@
849	#define PACKET3_WAIT_REG_MEM 0x3C	849	#define PACKET3_WAIT_REG_MEM 0x3C
850	#define PACKET3_MEM_WRITE 0x3D	850	#define PACKET3_MEM_WRITE 0x3D
851	#define PACKET3_COPY_DATA 0x40	851	#define PACKET3_COPY_DATA 0x40
		852	#define PACKET3_CP_DMA 0x41
		853	/* 1. header
		854	* 2. SRC_ADDR_LO or DATA [31:0]
		855	* 3. CP_SYNC [31] \| SRC_SEL [30:29] \| ENGINE [27] \| DST_SEL [21:20] \|
		856	* SRC_ADDR_HI [7:0]
		857	* 4. DST_ADDR_LO [31:0]
		858	* 5. DST_ADDR_HI [7:0]
		859	* 6. COMMAND [30:21] \| BYTE_COUNT [20:0]
		860	*/
		861	# define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20)
		862	/* 0 - SRC_ADDR
		863	* 1 - GDS
		864	*/
		865	# define PACKET3_CP_DMA_ENGINE(x) ((x) << 27)
		866	/* 0 - ME
		867	* 1 - PFP
		868	*/
		869	# define PACKET3_CP_DMA_SRC_SEL(x) ((x) << 29)
		870	/* 0 - SRC_ADDR
		871	* 1 - GDS
		872	* 2 - DATA
		873	*/
		874	# define PACKET3_CP_DMA_CP_SYNC (1 << 31)
		875	/* COMMAND */
		876	# define PACKET3_CP_DMA_DIS_WC (1 << 21)
		877	# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23)
		878	/* 0 - none
		879	* 1 - 8 in 16
		880	* 2 - 8 in 32
		881	* 3 - 8 in 64
		882	*/
		883	# define PACKET3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24)
		884	/* 0 - none
		885	* 1 - 8 in 16
		886	* 2 - 8 in 32
		887	* 3 - 8 in 64
		888	*/
		889	# define PACKET3_CP_DMA_CMD_SAS (1 << 26)
		890	/* 0 - memory
		891	* 1 - register
		892	*/
		893	# define PACKET3_CP_DMA_CMD_DAS (1 << 27)
		894	/* 0 - memory
		895	* 1 - register
		896	*/
		897	# define PACKET3_CP_DMA_CMD_SAIC (1 << 28)
		898	# define PACKET3_CP_DMA_CMD_DAIC (1 << 29)
		899	# define PACKET3_CP_DMA_CMD_RAW_WAIT (1 << 30)
852	#define PACKET3_PFP_SYNC_ME 0x42	900	#define PACKET3_PFP_SYNC_ME 0x42
853	#define PACKET3_SURFACE_SYNC 0x43	901	#define PACKET3_SURFACE_SYNC 0x43
854	# define PACKET3_DEST_BASE_0_ENA (1 << 0)	902	# define PACKET3_DEST_BASE_0_ENA (1 << 0)