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-rw-r--r--drivers/thermal/samsung/exynos_tmu.c5
-rw-r--r--drivers/thermal/samsung/exynos_tmu.h4
-rw-r--r--drivers/thermal/samsung/exynos_tmu_data.c10
3 files changed, 2 insertions, 17 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index c8d6cdde272c..fb3841113b72 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -304,9 +304,8 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on)
304 con |= (pdata->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT); 304 con |= (pdata->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);
305 305
306 if (pdata->noise_cancel_mode) { 306 if (pdata->noise_cancel_mode) {
307 con &= ~(reg->therm_trip_mode_mask << 307 con &= ~(EXYNOS_TMU_TRIP_MODE_MASK << EXYNOS_TMU_TRIP_MODE_SHIFT);
308 reg->therm_trip_mode_shift); 308 con |= (pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT);
309 con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift);
310 } 309 }
311 310
312 if (on) { 311 if (on) {
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 0fb10d158471..88c16d7302cb 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -77,8 +77,6 @@ enum soc_type {
77 * bitfields. The register validity, offsets and bitfield values may vary 77 * bitfields. The register validity, offsets and bitfield values may vary
78 * slightly across different exynos SOC's. 78 * slightly across different exynos SOC's.
79 * @tmu_ctrl: TMU main controller register. 79 * @tmu_ctrl: TMU main controller register.
80 * @therm_trip_mode_shift: shift bits of tripping mode in tmu_ctrl register.
81 * @therm_trip_mode_mask: mask bits of tripping mode in tmu_ctrl register.
82 * @therm_trip_en_shift: shift bits of tripping enable in tmu_ctrl register. 80 * @therm_trip_en_shift: shift bits of tripping enable in tmu_ctrl register.
83 * @tmu_cur_temp: register containing the current temperature of the TMU. 81 * @tmu_cur_temp: register containing the current temperature of the TMU.
84 * @threshold_th0: Register containing first set of rising levels. 82 * @threshold_th0: Register containing first set of rising levels.
@@ -102,8 +100,6 @@ enum soc_type {
102 */ 100 */
103struct exynos_tmu_registers { 101struct exynos_tmu_registers {
104 u32 tmu_ctrl; 102 u32 tmu_ctrl;
105 u32 therm_trip_mode_shift;
106 u32 therm_trip_mode_mask;
107 u32 therm_trip_en_shift; 103 u32 therm_trip_en_shift;
108 104
109 u32 tmu_cur_temp; 105 u32 tmu_cur_temp;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 4ca1283f1afb..4a44eb7b11fe 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -83,8 +83,6 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data = {
83#if defined(CONFIG_SOC_EXYNOS3250) 83#if defined(CONFIG_SOC_EXYNOS3250)
84static const struct exynos_tmu_registers exynos3250_tmu_registers = { 84static const struct exynos_tmu_registers exynos3250_tmu_registers = {
85 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, 85 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
86 .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
87 .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
88 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, 86 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
89 .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, 87 .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
90 .threshold_th0 = EXYNOS_THD_TEMP_RISE, 88 .threshold_th0 = EXYNOS_THD_TEMP_RISE,
@@ -158,8 +156,6 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
158#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) 156#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
159static const struct exynos_tmu_registers exynos4412_tmu_registers = { 157static const struct exynos_tmu_registers exynos4412_tmu_registers = {
160 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, 158 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
161 .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
162 .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
163 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, 159 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
164 .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, 160 .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
165 .threshold_th0 = EXYNOS_THD_TEMP_RISE, 161 .threshold_th0 = EXYNOS_THD_TEMP_RISE,
@@ -246,8 +242,6 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
246#if defined(CONFIG_SOC_EXYNOS5260) 242#if defined(CONFIG_SOC_EXYNOS5260)
247static const struct exynos_tmu_registers exynos5260_tmu_registers = { 243static const struct exynos_tmu_registers exynos5260_tmu_registers = {
248 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, 244 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
249 .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
250 .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
251 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, 245 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
252 .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, 246 .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
253 .threshold_th0 = EXYNOS_THD_TEMP_RISE, 247 .threshold_th0 = EXYNOS_THD_TEMP_RISE,
@@ -323,8 +317,6 @@ struct exynos_tmu_init_data const exynos5260_default_tmu_data = {
323#if defined(CONFIG_SOC_EXYNOS5420) 317#if defined(CONFIG_SOC_EXYNOS5420)
324static const struct exynos_tmu_registers exynos5420_tmu_registers = { 318static const struct exynos_tmu_registers exynos5420_tmu_registers = {
325 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, 319 .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
326 .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
327 .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
328 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, 320 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
329 .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, 321 .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
330 .threshold_th0 = EXYNOS_THD_TEMP_RISE, 322 .threshold_th0 = EXYNOS_THD_TEMP_RISE,
@@ -408,8 +400,6 @@ struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
408#if defined(CONFIG_SOC_EXYNOS5440) 400#if defined(CONFIG_SOC_EXYNOS5440)
409static const struct exynos_tmu_registers exynos5440_tmu_registers = { 401static const struct exynos_tmu_registers exynos5440_tmu_registers = {
410 .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL, 402 .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
411 .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
412 .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
413 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, 403 .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
414 .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP, 404 .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
415 .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0, 405 .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0,