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-rw-r--r--arch/arm/include/asm/kvm_mmu.h2
-rw-r--r--arch/arm/kvm/arm.c2
-rw-r--r--arch/arm/kvm/trace.h10
-rw-r--r--arch/mips/kvm/tlb.c1
-rw-r--r--arch/mips/kvm/trace.h6
-rw-r--r--arch/x86/kvm/emulate.c3
-rw-r--r--arch/x86/kvm/lapic.c4
-rw-r--r--arch/x86/kvm/svm.c6
-rw-r--r--arch/x86/kvm/vmx.c23
9 files changed, 31 insertions, 26 deletions
diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h
index 37ca2a4c6f09..bf0fe99e8ca9 100644
--- a/arch/arm/include/asm/kvm_mmu.h
+++ b/arch/arm/include/asm/kvm_mmu.h
@@ -207,7 +207,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
207 207
208 bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached; 208 bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached;
209 209
210 VM_BUG_ON(size & PAGE_MASK); 210 VM_BUG_ON(size & ~PAGE_MASK);
211 211
212 if (!need_flush && !icache_is_pipt()) 212 if (!need_flush && !icache_is_pipt())
213 goto vipt_cache; 213 goto vipt_cache;
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 07e7eb1d7ab6..5560f74f9eee 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -540,7 +540,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
540 540
541 vcpu->mode = OUTSIDE_GUEST_MODE; 541 vcpu->mode = OUTSIDE_GUEST_MODE;
542 kvm_guest_exit(); 542 kvm_guest_exit();
543 trace_kvm_exit(*vcpu_pc(vcpu)); 543 trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));
544 /* 544 /*
545 * We may have taken a host interrupt in HYP mode (ie 545 * We may have taken a host interrupt in HYP mode (ie
546 * while executing the guest). This interrupt is still 546 * while executing the guest). This interrupt is still
diff --git a/arch/arm/kvm/trace.h b/arch/arm/kvm/trace.h
index 881874b1a036..6817664b46b8 100644
--- a/arch/arm/kvm/trace.h
+++ b/arch/arm/kvm/trace.h
@@ -25,18 +25,22 @@ TRACE_EVENT(kvm_entry,
25); 25);
26 26
27TRACE_EVENT(kvm_exit, 27TRACE_EVENT(kvm_exit,
28 TP_PROTO(unsigned long vcpu_pc), 28 TP_PROTO(unsigned int exit_reason, unsigned long vcpu_pc),
29 TP_ARGS(vcpu_pc), 29 TP_ARGS(exit_reason, vcpu_pc),
30 30
31 TP_STRUCT__entry( 31 TP_STRUCT__entry(
32 __field( unsigned int, exit_reason )
32 __field( unsigned long, vcpu_pc ) 33 __field( unsigned long, vcpu_pc )
33 ), 34 ),
34 35
35 TP_fast_assign( 36 TP_fast_assign(
37 __entry->exit_reason = exit_reason;
36 __entry->vcpu_pc = vcpu_pc; 38 __entry->vcpu_pc = vcpu_pc;
37 ), 39 ),
38 40
39 TP_printk("PC: 0x%08lx", __entry->vcpu_pc) 41 TP_printk("HSR_EC: 0x%04x, PC: 0x%08lx",
42 __entry->exit_reason,
43 __entry->vcpu_pc)
40); 44);
41 45
42TRACE_EVENT(kvm_guest_fault, 46TRACE_EVENT(kvm_guest_fault,
diff --git a/arch/mips/kvm/tlb.c b/arch/mips/kvm/tlb.c
index bbcd82242059..b6beb0e07b1b 100644
--- a/arch/mips/kvm/tlb.c
+++ b/arch/mips/kvm/tlb.c
@@ -216,6 +216,7 @@ int kvm_mips_host_tlb_write(struct kvm_vcpu *vcpu, unsigned long entryhi,
216 if (idx > current_cpu_data.tlbsize) { 216 if (idx > current_cpu_data.tlbsize) {
217 kvm_err("%s: Invalid Index: %d\n", __func__, idx); 217 kvm_err("%s: Invalid Index: %d\n", __func__, idx);
218 kvm_mips_dump_host_tlbs(); 218 kvm_mips_dump_host_tlbs();
219 local_irq_restore(flags);
219 return -1; 220 return -1;
220 } 221 }
221 222
diff --git a/arch/mips/kvm/trace.h b/arch/mips/kvm/trace.h
index c1388d40663b..bd6437f67dc0 100644
--- a/arch/mips/kvm/trace.h
+++ b/arch/mips/kvm/trace.h
@@ -24,18 +24,18 @@ TRACE_EVENT(kvm_exit,
24 TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason), 24 TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason),
25 TP_ARGS(vcpu, reason), 25 TP_ARGS(vcpu, reason),
26 TP_STRUCT__entry( 26 TP_STRUCT__entry(
27 __field(struct kvm_vcpu *, vcpu) 27 __field(unsigned long, pc)
28 __field(unsigned int, reason) 28 __field(unsigned int, reason)
29 ), 29 ),
30 30
31 TP_fast_assign( 31 TP_fast_assign(
32 __entry->vcpu = vcpu; 32 __entry->pc = vcpu->arch.pc;
33 __entry->reason = reason; 33 __entry->reason = reason;
34 ), 34 ),
35 35
36 TP_printk("[%s]PC: 0x%08lx", 36 TP_printk("[%s]PC: 0x%08lx",
37 kvm_mips_exit_types_str[__entry->reason], 37 kvm_mips_exit_types_str[__entry->reason],
38 __entry->vcpu->arch.pc) 38 __entry->pc)
39); 39);
40 40
41#endif /* _TRACE_KVM_H */ 41#endif /* _TRACE_KVM_H */
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index e0b794a84c35..106c01557f2b 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -4950,7 +4950,8 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
4950 goto done; 4950 goto done;
4951 } 4951 }
4952 } 4952 }
4953 ctxt->dst.orig_val = ctxt->dst.val; 4953 /* Copy full 64-bit value for CMPXCHG8B. */
4954 ctxt->dst.orig_val64 = ctxt->dst.val64;
4954 4955
4955special_insn: 4956special_insn:
4956 4957
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index e55b5fc344eb..bd4e34de24c7 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1572,7 +1572,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
1572 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0); 1572 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
1573 } 1573 }
1574 apic->irr_pending = kvm_apic_vid_enabled(vcpu->kvm); 1574 apic->irr_pending = kvm_apic_vid_enabled(vcpu->kvm);
1575 apic->isr_count = kvm_apic_vid_enabled(vcpu->kvm); 1575 apic->isr_count = kvm_x86_ops->hwapic_isr_update ? 1 : 0;
1576 apic->highest_isr_cache = -1; 1576 apic->highest_isr_cache = -1;
1577 update_divide_count(apic); 1577 update_divide_count(apic);
1578 atomic_set(&apic->lapic_timer.pending, 0); 1578 atomic_set(&apic->lapic_timer.pending, 0);
@@ -1782,7 +1782,7 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
1782 update_divide_count(apic); 1782 update_divide_count(apic);
1783 start_apic_timer(apic); 1783 start_apic_timer(apic);
1784 apic->irr_pending = true; 1784 apic->irr_pending = true;
1785 apic->isr_count = kvm_apic_vid_enabled(vcpu->kvm) ? 1785 apic->isr_count = kvm_x86_ops->hwapic_isr_update ?
1786 1 : count_vectors(apic->regs + APIC_ISR); 1786 1 : count_vectors(apic->regs + APIC_ISR);
1787 apic->highest_isr_cache = -1; 1787 apic->highest_isr_cache = -1;
1788 if (kvm_x86_ops->hwapic_irr_update) 1788 if (kvm_x86_ops->hwapic_irr_update)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index d319e0c24758..cc618c882f90 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3649,11 +3649,6 @@ static void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)
3649 return; 3649 return;
3650} 3650}
3651 3651
3652static void svm_hwapic_isr_update(struct kvm *kvm, int isr)
3653{
3654 return;
3655}
3656
3657static void svm_sync_pir_to_irr(struct kvm_vcpu *vcpu) 3652static void svm_sync_pir_to_irr(struct kvm_vcpu *vcpu)
3658{ 3653{
3659 return; 3654 return;
@@ -4403,7 +4398,6 @@ static struct kvm_x86_ops svm_x86_ops = {
4403 .set_virtual_x2apic_mode = svm_set_virtual_x2apic_mode, 4398 .set_virtual_x2apic_mode = svm_set_virtual_x2apic_mode,
4404 .vm_has_apicv = svm_vm_has_apicv, 4399 .vm_has_apicv = svm_vm_has_apicv,
4405 .load_eoi_exitmap = svm_load_eoi_exitmap, 4400 .load_eoi_exitmap = svm_load_eoi_exitmap,
4406 .hwapic_isr_update = svm_hwapic_isr_update,
4407 .sync_pir_to_irr = svm_sync_pir_to_irr, 4401 .sync_pir_to_irr = svm_sync_pir_to_irr,
4408 4402
4409 .set_tss_addr = svm_set_tss_addr, 4403 .set_tss_addr = svm_set_tss_addr,
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 14c1a18d206a..f7b20b417a3a 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -4367,6 +4367,18 @@ static int vmx_complete_nested_posted_interrupt(struct kvm_vcpu *vcpu)
4367 return 0; 4367 return 0;
4368} 4368}
4369 4369
4370static inline bool kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu)
4371{
4372#ifdef CONFIG_SMP
4373 if (vcpu->mode == IN_GUEST_MODE) {
4374 apic->send_IPI_mask(get_cpu_mask(vcpu->cpu),
4375 POSTED_INTR_VECTOR);
4376 return true;
4377 }
4378#endif
4379 return false;
4380}
4381
4370static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu, 4382static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu,
4371 int vector) 4383 int vector)
4372{ 4384{
@@ -4375,9 +4387,7 @@ static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu,
4375 if (is_guest_mode(vcpu) && 4387 if (is_guest_mode(vcpu) &&
4376 vector == vmx->nested.posted_intr_nv) { 4388 vector == vmx->nested.posted_intr_nv) {
4377 /* the PIR and ON have been set by L1. */ 4389 /* the PIR and ON have been set by L1. */
4378 if (vcpu->mode == IN_GUEST_MODE) 4390 kvm_vcpu_trigger_posted_interrupt(vcpu);
4379 apic->send_IPI_mask(get_cpu_mask(vcpu->cpu),
4380 POSTED_INTR_VECTOR);
4381 /* 4391 /*
4382 * If a posted intr is not recognized by hardware, 4392 * If a posted intr is not recognized by hardware,
4383 * we will accomplish it in the next vmentry. 4393 * we will accomplish it in the next vmentry.
@@ -4409,12 +4419,7 @@ static void vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu, int vector)
4409 4419
4410 r = pi_test_and_set_on(&vmx->pi_desc); 4420 r = pi_test_and_set_on(&vmx->pi_desc);
4411 kvm_make_request(KVM_REQ_EVENT, vcpu); 4421 kvm_make_request(KVM_REQ_EVENT, vcpu);
4412#ifdef CONFIG_SMP 4422 if (r || !kvm_vcpu_trigger_posted_interrupt(vcpu))
4413 if (!r && (vcpu->mode == IN_GUEST_MODE))
4414 apic->send_IPI_mask(get_cpu_mask(vcpu->cpu),
4415 POSTED_INTR_VECTOR);
4416 else
4417#endif
4418 kvm_vcpu_kick(vcpu); 4423 kvm_vcpu_kick(vcpu);
4419} 4424}
4420 4425