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-rw-r--r--drivers/i2c/busses/Kconfig16
-rw-r--r--drivers/i2c/busses/Makefile1
-rw-r--r--drivers/i2c/busses/i2c-pxa.c1031
-rw-r--r--include/asm-arm/arch-pxa/i2c.h70
-rw-r--r--include/linux/i2c-id.h1
-rw-r--r--include/linux/i2c-pxa.h48
6 files changed, 1167 insertions, 0 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index a0018de3bef4..a3bec8d65cff 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -144,6 +144,22 @@ config I2C_I810
144 This driver can also be built as a module. If so, the module 144 This driver can also be built as a module. If so, the module
145 will be called i2c-i810. 145 will be called i2c-i810.
146 146
147config I2C_PXA
148 tristate "Intel PXA2XX I2C adapter (EXPERIMENTAL)"
149 depends on I2C && EXPERIMENTAL && ARCH_PXA
150 help
151 If you have devices in the PXA I2C bus, say yes to this option.
152 This driver can also be built as a module. If so, the module
153 will be called i2c-pxa.
154
155config I2C_PXA_SLAVE
156 bool "Intel PXA2XX I2C Slave comms support"
157 depends on I2C_PXA
158 help
159 Support I2C slave mode communications on the PXA I2C bus. This
160 is necessary for systems where the PXA may be a target on the
161 I2C bus.
162
147config I2C_PIIX4 163config I2C_PIIX4
148 tristate "Intel PIIX4" 164 tristate "Intel PIIX4"
149 depends on I2C && PCI 165 depends on I2C && PCI
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 42d6d814da72..980b3e983670 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -28,6 +28,7 @@ obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
28obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o 28obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
29obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o 29obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
30obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o 30obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o
31obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
31obj-$(CONFIG_I2C_RPXLITE) += i2c-rpx.o 32obj-$(CONFIG_I2C_RPXLITE) += i2c-rpx.o
32obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 33obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
33obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o 34obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
new file mode 100644
index 000000000000..a72d28365297
--- /dev/null
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -0,0 +1,1031 @@
1/*
2 * i2c_adap_pxa.c
3 *
4 * I2C adapter for the PXA I2C bus access.
5 *
6 * Copyright (C) 2002 Intrinsyc Software Inc.
7 * Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * History:
14 * Apr 2002: Initial version [CS]
15 * Jun 2002: Properly seperated algo/adap [FB]
16 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
17 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
18 * Sep 2004: Major rework to ensure efficient bus handling [RMK]
19 * Dec 2004: Added support for PXA27x and slave device probing [Liam Girdwood]
20 * Feb 2005: Rework slave mode handling [RMK]
21 */
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/i2c.h>
25#include <linux/i2c-id.h>
26#include <linux/init.h>
27#include <linux/time.h>
28#include <linux/sched.h>
29#include <linux/delay.h>
30#include <linux/errno.h>
31#include <linux/interrupt.h>
32#include <linux/i2c-pxa.h>
33
34#include <asm/hardware.h>
35#include <asm/irq.h>
36#include <asm/arch/i2c.h>
37#include <asm/arch/pxa-regs.h>
38
39struct pxa_i2c {
40 spinlock_t lock;
41 wait_queue_head_t wait;
42 struct i2c_msg *msg;
43 unsigned int msg_num;
44 unsigned int msg_idx;
45 unsigned int msg_ptr;
46 unsigned int slave_addr;
47
48 struct i2c_adapter adap;
49#ifdef CONFIG_I2C_PXA_SLAVE
50 struct i2c_slave_client *slave;
51#endif
52
53 unsigned int irqlogidx;
54 u32 isrlog[32];
55 u32 icrlog[32];
56};
57
58/*
59 * I2C Slave mode address
60 */
61#define I2C_PXA_SLAVE_ADDR 0x1
62
63/*
64 * Set this to zero to remove all debug statements via dead code elimination.
65 */
66#undef DEBUG
67
68#if 0
69#define DBGLVL KERN_INFO
70#else
71#define DBGLVL KERN_DEBUG
72#endif
73
74#ifdef DEBUG
75
76struct bits {
77 u32 mask;
78 const char *set;
79 const char *unset;
80};
81#define BIT(m, s, u) { .mask = m, .set = s, .unset = u }
82
83static inline void
84decode_bits(const char *prefix, const struct bits *bits, int num, u32 val)
85{
86 printk("%s %08x: ", prefix, val);
87 while (num--) {
88 const char *str = val & bits->mask ? bits->set : bits->unset;
89 if (str)
90 printk("%s ", str);
91 bits++;
92 }
93}
94
95static const struct bits isr_bits[] = {
96 BIT(ISR_RWM, "RX", "TX"),
97 BIT(ISR_ACKNAK, "NAK", "ACK"),
98 BIT(ISR_UB, "Bsy", "Rdy"),
99 BIT(ISR_IBB, "BusBsy", "BusRdy"),
100 BIT(ISR_SSD, "SlaveStop", NULL),
101 BIT(ISR_ALD, "ALD", NULL),
102 BIT(ISR_ITE, "TxEmpty", NULL),
103 BIT(ISR_IRF, "RxFull", NULL),
104 BIT(ISR_GCAD, "GenCall", NULL),
105 BIT(ISR_SAD, "SlaveAddr", NULL),
106 BIT(ISR_BED, "BusErr", NULL),
107};
108
109static void decode_ISR(unsigned int val)
110{
111 decode_bits(DBGLVL "ISR", isr_bits, ARRAY_SIZE(isr_bits), val);
112 printk("\n");
113}
114
115static const struct bits icr_bits[] = {
116 BIT(ICR_START, "START", NULL),
117 BIT(ICR_STOP, "STOP", NULL),
118 BIT(ICR_ACKNAK, "ACKNAK", NULL),
119 BIT(ICR_TB, "TB", NULL),
120 BIT(ICR_MA, "MA", NULL),
121 BIT(ICR_SCLE, "SCLE", "scle"),
122 BIT(ICR_IUE, "IUE", "iue"),
123 BIT(ICR_GCD, "GCD", NULL),
124 BIT(ICR_ITEIE, "ITEIE", NULL),
125 BIT(ICR_IRFIE, "IRFIE", NULL),
126 BIT(ICR_BEIE, "BEIE", NULL),
127 BIT(ICR_SSDIE, "SSDIE", NULL),
128 BIT(ICR_ALDIE, "ALDIE", NULL),
129 BIT(ICR_SADIE, "SADIE", NULL),
130 BIT(ICR_UR, "UR", "ur"),
131};
132
133static void decode_ICR(unsigned int val)
134{
135 decode_bits(DBGLVL "ICR", icr_bits, ARRAY_SIZE(icr_bits), val);
136 printk("\n");
137}
138
139static unsigned int i2c_debug = DEBUG;
140
141static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
142{
143 printk(DBGLVL "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, ISR, ICR, IBMR);
144}
145
146#define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __FUNCTION__)
147#else
148#define i2c_debug 0
149
150#define show_state(i2c) do { } while (0)
151#define decode_ISR(val) do { } while (0)
152#define decode_ICR(val) do { } while (0)
153#endif
154
155#define eedbg(lvl, x...) do { if ((lvl) < 1) { printk(DBGLVL "