diff options
-rw-r--r-- | arch/arm/common/gic.c | 11 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/gic.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-cns3xxx/core.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-msm/board-msm8x60.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_eb.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pb1176.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pb11mp.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pba8.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pbx.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-s5pv310/cpu.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-tegra/irq.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-ux500/cpu.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-vexpress/ct-ca9x4.c | 3 |
14 files changed, 46 insertions, 39 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index e6388dcd8cfa..8eab2f34a7fa 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -213,8 +213,8 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) | |||
213 | set_irq_chained_handler(irq, gic_handle_cascade_irq); | 213 | set_irq_chained_handler(irq, gic_handle_cascade_irq); |
214 | } | 214 | } |
215 | 215 | ||
216 | void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, | 216 | static void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, |
217 | unsigned int irq_start) | 217 | unsigned int irq_start) |
218 | { | 218 | { |
219 | unsigned int gic_irqs, irq_limit, i; | 219 | unsigned int gic_irqs, irq_limit, i; |
220 | u32 cpumask = 1 << smp_processor_id(); | 220 | u32 cpumask = 1 << smp_processor_id(); |
@@ -314,6 +314,13 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) | |||
314 | writel(1, base + GIC_CPU_CTRL); | 314 | writel(1, base + GIC_CPU_CTRL); |
315 | } | 315 | } |
316 | 316 | ||
317 | void __init gic_init(unsigned int gic_nr, unsigned int irq_start, | ||
318 | void __iomem *dist_base, void __iomem *cpu_base) | ||
319 | { | ||
320 | gic_dist_init(gic_nr, dist_base, irq_start); | ||
321 | gic_cpu_init(gic_nr, cpu_base); | ||
322 | } | ||
323 | |||
317 | #ifdef CONFIG_SMP | 324 | #ifdef CONFIG_SMP |
318 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) | 325 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) |
319 | { | 326 | { |
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 7f34333bb545..387c6ae55673 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h | |||
@@ -33,8 +33,8 @@ | |||
33 | #define GIC_DIST_SOFTINT 0xf00 | 33 | #define GIC_DIST_SOFTINT 0xf00 |
34 | 34 | ||
35 | #ifndef __ASSEMBLY__ | 35 | #ifndef __ASSEMBLY__ |
36 | void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start); | ||
37 | void gic_cpu_init(unsigned int gic_nr, void __iomem *base); | 36 | void gic_cpu_init(unsigned int gic_nr, void __iomem *base); |
37 | void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); | ||
38 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); | 38 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); |
39 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); | 39 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); |
40 | #endif | 40 | #endif |
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 9ca4d581016f..e9c491552ca1 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c | |||
@@ -74,8 +74,8 @@ void __iomem *gic_cpu_base_addr; | |||
74 | void __init cns3xxx_init_irq(void) | 74 | void __init cns3xxx_init_irq(void) |
75 | { | 75 | { |
76 | gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT); | 76 | gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT); |
77 | gic_dist_init(0, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), 29); | 77 | gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), |
78 | gic_cpu_init(0, gic_cpu_base_addr); | 78 | gic_cpu_base_addr); |
79 | } | 79 | } |
80 | 80 | ||
81 | void cns3xxx_power_off(void) | 81 | void cns3xxx_power_off(void) |
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 7486a681cc71..aaf8ec8a1495 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c | |||
@@ -44,9 +44,8 @@ static void __init msm8x60_init_irq(void) | |||
44 | { | 44 | { |
45 | unsigned int i; | 45 | unsigned int i; |
46 | 46 | ||
47 | gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START); | ||
48 | gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE; | 47 | gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE; |
49 | gic_cpu_init(0, MSM_QGIC_CPU_BASE); | 48 | gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, gic_cpu_base_addr); |
50 | 49 | ||
51 | /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ | 50 | /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ |
52 | writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); | 51 | writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); |
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 2f895553e6a8..3fd3df7a7697 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -35,12 +35,12 @@ void __init gic_init_irq(void) | |||
35 | /* Static mapping, never released */ | 35 | /* Static mapping, never released */ |
36 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); | 36 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); |
37 | BUG_ON(!gic_dist_base_addr); | 37 | BUG_ON(!gic_dist_base_addr); |
38 | gic_dist_init(0, gic_dist_base_addr, 29); | ||
39 | 38 | ||
40 | /* Static mapping, never released */ | 39 | /* Static mapping, never released */ |
41 | gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | 40 | gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); |
42 | BUG_ON(!gic_cpu_base_addr); | 41 | BUG_ON(!gic_cpu_base_addr); |
43 | gic_cpu_init(0, gic_cpu_base_addr); | 42 | |
43 | gic_init(0, 29, gic_dist_base_addr, gic_cpu_base_addr); | ||
44 | } | 44 | } |
45 | 45 | ||
46 | #ifdef CONFIG_CACHE_L2X0 | 46 | #ifdef CONFIG_CACHE_L2X0 |
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index f2697106f809..241bcbc73f61 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -365,20 +365,20 @@ static void __init gic_init_irq(void) | |||
365 | 365 | ||
366 | /* core tile GIC, primary */ | 366 | /* core tile GIC, primary */ |
367 | gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE); | 367 | gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE); |
368 | gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29); | 368 | gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), |
369 | gic_cpu_init(0, gic_cpu_base_addr); | 369 | gic_cpu_base_addr); |
370 | 370 | ||
371 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB | 371 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB |
372 | /* board GIC, secondary */ | 372 | /* board GIC, secondary */ |
373 | gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64); | 373 | gic_init(1, 64, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
374 | gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE)); | 374 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
375 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); | 375 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); |
376 | #endif | 376 | #endif |
377 | } else { | 377 | } else { |
378 | /* board GIC, primary */ | 378 | /* board GIC, primary */ |
379 | gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE); | 379 | gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE); |
380 | gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29); | 380 | gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
381 | gic_cpu_init(0, gic_cpu_base_addr); | 381 | gic_cpu_base_addr); |
382 | } | 382 | } |
383 | } | 383 | } |
384 | 384 | ||
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index a4125619d71b..8047b198f847 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -305,12 +305,14 @@ static void __init gic_init_irq(void) | |||
305 | { | 305 | { |
306 | /* ARM1176 DevChip GIC, primary */ | 306 | /* ARM1176 DevChip GIC, primary */ |
307 | gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE); | 307 | gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE); |
308 | gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START); | 308 | gic_init(0, IRQ_DC1176_GIC_START, |
309 | gic_cpu_init(0, gic_cpu_base_addr); | 309 | __io_address(REALVIEW_DC1176_GIC_DIST_BASE), |
310 | gic_cpu_base_addr); | ||
310 | 311 | ||
311 | /* board GIC, secondary */ | 312 | /* board GIC, secondary */ |
312 | gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START); | 313 | gic_init(1, IRQ_PB1176_GIC_START, |
313 | gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE)); | 314 | __io_address(REALVIEW_PB1176_GIC_DIST_BASE), |
315 | __io_address(REALVIEW_PB1176_GIC_CPU_BASE)); | ||
314 | gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1); | 316 | gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1); |
315 | } | 317 | } |
316 | 318 | ||
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 117b95b2ca15..61204265b4e4 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -310,12 +310,13 @@ static void __init gic_init_irq(void) | |||
310 | 310 | ||
311 | /* ARM11MPCore test chip GIC, primary */ | 311 | /* ARM11MPCore test chip GIC, primary */ |
312 | gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE); | 312 | gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE); |
313 | gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29); | 313 | gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), |
314 | gic_cpu_init(0, gic_cpu_base_addr); | 314 | gic_cpu_base_addr); |
315 | 315 | ||
316 | /* board GIC, secondary */ | 316 | /* board GIC, secondary */ |
317 | gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START); | 317 | gic_init(1, IRQ_PB11MP_GIC_START, |
318 | gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE)); | 318 | __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), |
319 | __io_address(REALVIEW_PB11MP_GIC_CPU_BASE)); | ||
319 | gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1); | 320 | gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1); |
320 | } | 321 | } |
321 | 322 | ||
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 929b8dc12e81..90f492a35d4f 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -274,8 +274,9 @@ static void __init gic_init_irq(void) | |||
274 | { | 274 | { |
275 | /* ARM PB-A8 on-board GIC */ | 275 | /* ARM PB-A8 on-board GIC */ |
276 | gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE); | 276 | gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE); |
277 | gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START); | 277 | gic_init(0, IRQ_PBA8_GIC_START, |
278 | gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE)); | 278 | __io_address(REALVIEW_PBA8_GIC_DIST_BASE), |
279 | __io_address(REALVIEW_PBA8_GIC_CPU_BASE)); | ||
279 | } | 280 | } |
280 | 281 | ||
281 | static void __init realview_pba8_timer_init(void) | 282 | static void __init realview_pba8_timer_init(void) |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index b9f9e20031a7..86f28f725a23 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -314,14 +314,13 @@ static void __init gic_init_irq(void) | |||
314 | /* ARM PBX on-board GIC */ | 314 | /* ARM PBX on-board GIC */ |
315 | if (core_tile_pbx11mp() || core_tile_pbxa9mp()) { | 315 | if (core_tile_pbx11mp() || core_tile_pbxa9mp()) { |
316 | gic_cpu_base_addr = __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE); | 316 | gic_cpu_base_addr = __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE); |
317 | gic_dist_init(0, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE), | 317 | gic_init(0, 29, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE), |
318 | 29); | 318 | __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE)); |
319 | gic_cpu_init(0, __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE)); | ||
320 | } else { | 319 | } else { |
321 | gic_cpu_base_addr = __io_address(REALVIEW_PBX_GIC_CPU_BASE); | 320 | gic_cpu_base_addr = __io_address(REALVIEW_PBX_GIC_CPU_BASE); |
322 | gic_dist_init(0, __io_address(REALVIEW_PBX_GIC_DIST_BASE), | 321 | gic_init(0, IRQ_PBX_GIC_START, |
323 | IRQ_PBX_GIC_START); | 322 | __io_address(REALVIEW_PBX_GIC_DIST_BASE), |
324 | gic_cpu_init(0, __io_address(REALVIEW_PBX_GIC_CPU_BASE)); | 323 | __io_address(REALVIEW_PBX_GIC_CPU_BASE)); |
325 | } | 324 | } |
326 | } | 325 | } |
327 | 326 | ||
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index 82ce4aa6d61a..bce3e91be432 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c | |||
@@ -123,8 +123,7 @@ void __init s5pv310_init_irq(void) | |||
123 | int irq; | 123 | int irq; |
124 | 124 | ||
125 | gic_cpu_base_addr = S5P_VA_GIC_CPU; | 125 | gic_cpu_base_addr = S5P_VA_GIC_CPU; |
126 | gic_dist_init(0, S5P_VA_GIC_DIST, IRQ_LOCALTIMER); | 126 | gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); |
127 | gic_cpu_init(0, S5P_VA_GIC_CPU); | ||
128 | 127 | ||
129 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { | 128 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { |
130 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), | 129 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), |
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 50a8dfb9a0cf..5407de01abf0 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c | |||
@@ -94,8 +94,8 @@ void __init tegra_init_irq(void) | |||
94 | writel(0, ictlr_to_virt(i) + ICTLR_CPU_IEP_CLASS); | 94 | writel(0, ictlr_to_virt(i) + ICTLR_CPU_IEP_CLASS); |
95 | } | 95 | } |
96 | 96 | ||
97 | gic_dist_init(0, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), 29); | 97 | gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), |
98 | gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); | 98 | IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); |
99 | 99 | ||
100 | gic = get_irq_chip(29); | 100 | gic = get_irq_chip(29); |
101 | gic_unmask_irq = gic->unmask; | 101 | gic_unmask_irq = gic->unmask; |
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 608a1372b172..7328c0179769 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
@@ -61,8 +61,8 @@ void __init ux500_init_devices(void) | |||
61 | 61 | ||
62 | void __init ux500_init_irq(void) | 62 | void __init ux500_init_irq(void) |
63 | { | 63 | { |
64 | gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29); | 64 | gic_init(0, 29, __io_address(UX500_GIC_DIST_BASE), |
65 | gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); | 65 | __io_address(UX500_GIC_CPU_BASE)); |
66 | 66 | ||
67 | /* | 67 | /* |
68 | * Init clocks here so that they are available for system timer | 68 | * Init clocks here so that they are available for system timer |
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index fd25ccd7272f..25a3ca6e5a48 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c | |||
@@ -65,8 +65,7 @@ void __iomem *gic_cpu_base_addr; | |||
65 | static void __init ct_ca9x4_init_irq(void) | 65 | static void __init ct_ca9x4_init_irq(void) |
66 | { | 66 | { |
67 | gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU); | 67 | gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU); |
68 | gic_dist_init(0, MMIO_P2V(A9_MPCORE_GIC_DIST), 29); | 68 | gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST), gic_cpu_base_addr); |
69 | gic_cpu_init(0, gic_cpu_base_addr); | ||
70 | } | 69 | } |
71 | 70 | ||
72 | #if 0 | 71 | #if 0 |