5 files changed, 252 insertions, 24 deletions

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index feab3bad6d0f..38786c821e98 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -353,7 +353,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
 
 config KEXEC
         bool "kexec system call (EXPERIMENTAL)"
-        depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP && !PPC_47x)) && EXPERIMENTAL
+        depends on (PPC_BOOK3S || FSL_BOOKE || (44x && !SMP)) && EXPERIMENTAL
         help
           kexec is a system call that implements the ability to shutdown your
           current kernel, and to start another kernel.  It is like a reboot
@@ -370,7 +370,7 @@ config KEXEC
 
 config CRASH_DUMP
         bool "Build a kdump crash kernel"
-        depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP && !PPC_47x)
+        depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP)
         select RELOCATABLE if PPC64 || 44x
         select DYNAMIC_MEMSTART if FSL_BOOKE
         help
diff --git a/arch/powerpc/boot/dts/bluestone.dts b/arch/powerpc/boot/dts/bluestone.dts
index 7bda373f10ef..9d4917aebe6b 100644
--- a/arch/powerpc/boot/dts/bluestone.dts
+++ b/arch/powerpc/boot/dts/bluestone.dts
@@ -373,5 +373,30 @@
                                 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
                                 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
                 };
+
+                MSI: ppc4xx-msi@C10000000 {
+                        compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
+                        reg = < 0xC 0x10000000 0x100
+                                0xC 0x10000000 0x100>;
+                        sdr-base = <0x36C>;
+                        msi-data = <0x00004440>;
+                        msi-mask = <0x0000ffe0>;
+                        interrupts =<0 1 2 3 4 5 6 7>;
+                        interrupt-parent = <&MSI>;
+                        #interrupt-cells = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        msi-available-ranges = <0x0 0x100>;
+                        interrupt-map = <
+                                0 &UIC3 0x18 1
+                                1 &UIC3 0x19 1
+                                2 &UIC3 0x1A 1
+                                3 &UIC3 0x1B 1
+                                4 &UIC3 0x1C 1
+                                5 &UIC3 0x1D 1
+                                6 &UIC3 0x1E 1
+                                7 &UIC3 0x1F 1
+                        >;
+                };
         };
 };
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 7cd07b42ca1a..386d57f66f28 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -738,8 +738,23 @@ relocate_new_kernel:
         mr      r5, r31
 
         li      r0, 0
-#elif defined(CONFIG_44x)  && !defined(CONFIG_PPC_47x)
+#elif defined(CONFIG_44x)
 
+        /* Save our parameters */
+        mr      r29, r3
+        mr      r30, r4
+        mr      r31, r5
+
+#ifdef CONFIG_PPC_47x
+        /* Check for 47x cores */
+        mfspr   r3,SPRN_PVR
+        srwi    r3,r3,16
+        cmplwi  cr0,r3,PVR_476@h
+        beq     setup_map_47x
+        cmplwi  cr0,r3,PVR_476_ISS@h
+        beq     setup_map_47x
+#endif /* CONFIG_PPC_47x */
+        
 /*
  * Code for setting up 1:1 mapping for PPC440x for KEXEC
  *
@@ -753,16 +768,15 @@ relocate_new_kernel:
  * 5) Invalidate the tmp mapping.
  *
  * - Based on the kexec support code for FSL BookE
- * - Doesn't support 47x yet.
  *
  */
-        /* Save our parameters */
-        mr      r29, r3
-        mr      r30, r4
-        mr      r31, r5
 
-        /* Load our MSR_IS and TID to MMUCR for TLB search */
-        mfspr   r3,SPRN_PID
+        /* 
+         * Load the PID with kernel PID (0).
+         * Also load our MSR_IS and TID to MMUCR for TLB search.
+         */
+        li      r3, 0
+        mtspr   SPRN_PID, r3
         mfmsr   r4
         andi.   r4,r4,MSR_IS@l
         beq     wmmucr
@@ -900,6 +914,179 @@ next_tlb:
         li      r3, 0
         tlbwe   r3, r24, PPC44x_TLB_PAGEID
         sync
+        b       ppc44x_map_done
+
+#ifdef CONFIG_PPC_47x
+
+        /* 1:1 mapping for 47x */
+
+setup_map_47x:
+
+        /*
+         * Load the kernel pid (0) to PID and also to MMUCR[TID].
+         * Also set the MSR IS->MMUCR STS
+         */
+        li      r3, 0
+        mtspr   SPRN_PID, r3                    /* Set PID */
+        mfmsr   r4                              /* Get MSR */
+        andi.   r4, r4, MSR_IS@l                /* TS=1? */
+        beq     1f                              /* If not, leave STS=0 */
+        oris    r3, r3, PPC47x_MMUCR_STS@h      /* Set STS=1 */
+1:      mtspr   SPRN_MMUCR, r3                  /* Put MMUCR */
+        sync
+
+        /* Find the entry we are running from */
+        bl      2f
+2:      mflr    r23
+        tlbsx   r23, 0, r23
+        tlbre   r24, r23, 0                     /* TLB Word 0 */
+        tlbre   r25, r23, 1                     /* TLB Word 1 */
+        tlbre   r26, r23, 2                     /* TLB Word 2 */
+
+
+        /*
+         * Invalidates all the tlb entries by writing to 256 RPNs(r4)
+         * of 4k page size in all  4 ways (0-3 in r3).
+         * This would invalidate the entire UTLB including the one we are
+         * running from. However the shadow TLB entries would help us 
+         * to continue the execution, until we flush them (rfi/isync).
+         */
+        addis   r3, 0, 0x8000                   /* specify the way */
+        addi    r4, 0, 0                        /* TLB Word0 = (EPN=0, VALID = 0) */
+        addi    r5, 0, 0
+        b       clear_utlb_entry
+
+        /* Align the loop to speed things up. from head_44x.S */
+        .align  6
+
+clear_utlb_entry:
+
+        tlbwe   r4, r3, 0
+        tlbwe   r5, r3, 1
+        tlbwe   r5, r3, 2
+        addis   r3, r3, 0x2000                  /* Increment the way */
+        cmpwi   r3, 0
+        bne     clear_utlb_entry
+        addis   r3, 0, 0x8000
+        addis   r4, r4, 0x100                   /* Increment the EPN */
+        cmpwi   r4, 0
+        bne     clear_utlb_entry
+
+        /* Create the entries in the other address space */
+        mfmsr   r5
+        rlwinm  r7, r5, 27, 31, 31              /* Get the TS (Bit 26) from MSR */
+        xori    r7, r7, 1                       /* r7 = !TS */
+
+        insrwi  r24, r7, 1, 21                  /* Change the TS in the saved TLB word 0 */
+
+        /* 
+         * write out the TLB entries for the tmp mapping
+         * Use way '0' so that we could easily invalidate it later.
+         */
+        lis     r3, 0x8000                      /* Way '0' */ 
+
+        tlbwe   r24, r3, 0
+        tlbwe   r25, r3, 1
+        tlbwe   r26, r3, 2
+
+        /* Update the msr to the new TS */
+        insrwi  r5, r7, 1, 26
+
+        bl      1f
+1:      mflr    r6
+        addi    r6, r6, (2f-1b)
+
+        mtspr   SPRN_SRR0, r6
+        mtspr   SPRN_SRR1, r5
+        rfi
+
+        /* 
+         * Now we are in the tmp address space.
+         * Create a 1:1 mapping for 0-2GiB in the original TS.
+         */
+2:
+        li      r3, 0
+        li      r4, 0                           /* TLB Word 0 */
+        li      r5, 0                           /* TLB Word 1 */
+        li      r6, 0
+        ori     r6, r6, PPC47x_TLB2_S_RWX       /* TLB word 2 */
+
+        li      r8, 0                           /* PageIndex */
+
+        xori    r7, r7, 1                       /* revert back to original TS */
+
+write_utlb:
+        rotlwi  r5, r8, 28                      /* RPN = PageIndex * 256M */
+                                                /* ERPN = 0 as we don't use memory above 2G */
+
+        mr      r4, r5                          /* EPN = RPN */
+        ori     r4, r4, (PPC47x_TLB0_VALID | PPC47x_TLB0_256M)
+        insrwi  r4, r7, 1, 21                   /* Insert the TS to Word 0 */
+
+        tlbwe   r4, r3, 0                       /* Write out the entries */
+        tlbwe   r5, r3, 1
+        tlbwe   r6, r3, 2
+        addi    r8, r8, 1
+        cmpwi   r8, 8                           /* Have we completed ? */
+        bne     write_utlb
+
+        /* make sure we complete the TLB write up */
+        isync
+
+        /* 
+         * Prepare to jump to the 1:1 mapping.
+         * 1) Extract page size of the tmp mapping
+         *    DSIZ = TLB_Word0[22:27]
+         * 2) Calculate the physical address of the address
+         *    to jump to.
+         */
+        rlwinm  r10, r24, 0, 22, 27
+
+        cmpwi   r10, PPC47x_TLB0_4K
+        bne     0f
+        li      r10, 0x1000                     /* r10 = 4k */
+        bl      1f
+
+0:
+        /* Defaults to 256M */
+        lis     r10, 0x1000
+        
+        bl      1f
+1:      mflr    r4
+        addi    r4, r4, (2f-1b)                 /* virtual address  of 2f */
+
+        subi    r11, r10, 1                     /* offsetmask = Pagesize - 1 */
+        not     r10, r11                        /* Pagemask = ~(offsetmask) */
+
+        and     r5, r25, r10                    /* Physical page */
+        and     r6, r4, r11                     /* offset within the current page */
+
+        or      r5, r5, r6                      /* Physical address for 2f */
+
+        /* Switch the TS in MSR to the original one */
+        mfmsr   r8
+        insrwi  r8, r7, 1, 26
+
+        mtspr   SPRN_SRR1, r8
+        mtspr   SPRN_SRR0, r5
+        rfi
+
+2:
+        /* Invalidate the tmp mapping */
+        lis     r3, 0x8000                      /* Way '0' */
+
+        clrrwi  r24, r24, 12                    /* Clear the valid bit */
+        tlbwe   r24, r3, 0
+        tlbwe   r25, r3, 1
+        tlbwe   r26, r3, 2
+
+        /* Make sure we complete the TLB write and flush the shadow TLB */
+        isync
+
+#endif
+
+ppc44x_map_done:
+
 
         /* Restore the parameters */
         mr      r3, r29
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 2e4e64abfab4..8abf6fb8f410 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -23,6 +23,8 @@ config BLUESTONE
         default n
         select PPC44x_SIMPLE
         select APM821xx
+        select PCI_MSI
+        select PPC4xx_MSI
         select PPC4xx_PCI_EXPRESS
         select IBM_EMAC_RGMII
         help
diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c
index 1c2d7af17bbe..82c6702dcbab 100644
--- a/arch/powerpc/sysdev/ppc4xx_msi.c
+++ b/arch/powerpc/sysdev/ppc4xx_msi.c
@@ -28,10 +28,11 @@
 #include <linux/of_platform.h>
 #include <linux/interrupt.h>
 #include <linux/export.h>
+#include <linux/kernel.h>
 #include <asm/prom.h>
 #include <asm/hw_irq.h>
 #include <asm/ppc-pci.h>
-#include <boot/dcr.h>
+#include <asm/dcr.h>
 #include <asm/dcr-regs.h>
 #include <asm/msi_bitmap.h>
 
@@ -43,13 +44,14 @@
 #define PEIH_FLUSH0     0x30
 #define PEIH_FLUSH1     0x38
 #define PEIH_CNTRST     0x48
-#define NR_MSI_IRQS     4
+
+static int msi_irqs;
 
 struct ppc4xx_msi {
         u32 msi_addr_lo;
         u32 msi_addr_hi;
         void __iomem *msi_regs;
-        int msi_virqs[NR_MSI_IRQS];
+        int *msi_virqs;
         struct msi_bitmap bitmap;
         struct device_node *msi_dev;
 };
@@ -61,7 +63,7 @@ static int ppc4xx_msi_init_allocator(struct platform_device *dev,
 {
         int err;
 
-        err = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
+        err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs,
                               dev->dev.of_node);
         if (err)
                 return err;
@@ -83,6 +85,11 @@ static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
         struct msi_desc *entry;
         struct ppc4xx_msi *msi_data = &ppc4xx_msi;
 
+        msi_data->msi_virqs = kmalloc((msi_irqs) * sizeof(int),
+                                            GFP_KERNEL);
+        if (!msi_data->msi_virqs)
+                return -ENOMEM;
+
         list_for_each_entry(entry, &dev->msi_list, list) {
                 int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
                 if (int_no >= 0)
@@ -150,12 +157,11 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
         if (!sdr_addr)
                 return -1;
 
-        SDR0_WRITE(sdr_addr, (u64)res.start >> 32);      /*HIGH addr */
-        SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
-
+        mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start));      /*HIGH addr */
+        mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start));  /* Low addr */
 
         msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
-        if (msi->msi_dev)
+        if (!msi->msi_dev)
                 return -ENODEV;
 
         msi->msi_regs = of_iomap(msi->msi_dev, 0);
@@ -167,9 +173,12 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
                 (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
 
         msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
-        msi->msi_addr_hi = 0x0;
-        msi->msi_addr_lo = (u32) msi_phys;
-        dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
+        if (!msi_virt)
+                return -ENOMEM;
+        msi->msi_addr_hi = upper_32_bits(msi_phys);
+        msi->msi_addr_lo = lower_32_bits(msi_phys & 0xffffffff);
+        dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
+                msi->msi_addr_hi, msi->msi_addr_lo);
 
         /* Progam the Interrupt handler Termination addr registers */
         out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
@@ -185,6 +194,8 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
         out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
         out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
 
+        dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
+
         return 0;
 }
 
@@ -194,7 +205,7 @@ static int ppc4xx_of_msi_remove(struct platform_device *dev)
         int i;
         int virq;
 
-        for (i = 0; i < NR_MSI_IRQS; i++) {
+        for (i = 0; i < msi_irqs; i++) {
                 virq = msi->msi_virqs[i];
                 if (virq != NO_IRQ)
                         irq_dispose_mapping(virq);
@@ -215,8 +226,6 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
         struct resource res;
         int err = 0;
 
-        msi = &ppc4xx_msi;/*keep the msi data for further use*/
-
         dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
 
         msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
@@ -234,6 +243,10 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
                 goto error_out;
         }
 
+        msi_irqs = of_irq_count(dev->dev.of_node);
+        if (!msi_irqs)
+                return -ENODEV;
+
         if (ppc4xx_setup_pcieh_hw(dev, res, msi))
                 goto error_out;
 
@@ -242,6 +255,7 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
                 dev_err(&dev->dev, "Error allocating MSI bitmap\n");
                 goto error_out;
         }
+        ppc4xx_msi = *msi;
 
         ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
         ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;