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-rw-r--r--arch/arm/boot/dts/sama5d3xcm.dtsi11
-rw-r--r--arch/arm/mach-at91/sama5d3.c346
2 files changed, 0 insertions, 357 deletions
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index dce5419f773c..f55ed072c8e6 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -18,17 +18,6 @@
18 reg = <0x20000000 0x20000000>; 18 reg = <0x20000000 0x20000000>;
19 }; 19 };
20 20
21 clocks {
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges;
25
26 main_clock: clock@0 {
27 compatible = "atmel,osc", "fixed-clock";
28 clock-frequency = <12000000>;
29 };
30 };
31
32 ahb { 21 ahb {
33 apb { 22 apb {
34 spi0: spi@f0004000 { 23 spi0: spi@f0004000 {
diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c
index f3313b9d084a..3d775d08de08 100644
--- a/arch/arm/mach-at91/sama5d3.c
+++ b/arch/arm/mach-at91/sama5d3.c
@@ -21,349 +21,6 @@
21#include "generic.h" 21#include "generic.h"
22#include "sam9_smc.h" 22#include "sam9_smc.h"
23 23
24#if defined(CONFIG_OLD_CLK_AT91)
25#include "clock.h"
26/* --------------------------------------------------------------------
27 * Clocks
28 * -------------------------------------------------------------------- */
29
30/*
31 * The peripheral clocks.
32 */
33
34static struct clk pioA_clk = {
35 .name = "pioA_clk",
36 .pid = SAMA5D3_ID_PIOA,
37 .type = CLK_TYPE_PERIPHERAL,
38};
39static struct clk pioB_clk = {
40 .name = "pioB_clk",
41 .pid = SAMA5D3_ID_PIOB,
42 .type = CLK_TYPE_PERIPHERAL,
43};
44static struct clk pioC_clk = {
45 .name = "pioC_clk",
46 .pid = SAMA5D3_ID_PIOC,
47 .type = CLK_TYPE_PERIPHERAL,
48};
49static struct clk pioD_clk = {
50 .name = "pioD_clk",
51 .pid = SAMA5D3_ID_PIOD,
52 .type = CLK_TYPE_PERIPHERAL,
53};
54static struct clk pioE_clk = {
55 .name = "pioE_clk",
56 .pid = SAMA5D3_ID_PIOE,
57 .type = CLK_TYPE_PERIPHERAL,
58};
59static struct clk usart0_clk = {
60 .name = "usart0_clk",
61 .pid = SAMA5D3_ID_USART0,
62 .type = CLK_TYPE_PERIPHERAL,
63 .div = AT91_PMC_PCR_DIV2,
64};
65static struct clk usart1_clk = {
66 .name = "usart1_clk",
67 .pid = SAMA5D3_ID_USART1,
68 .type = CLK_TYPE_PERIPHERAL,
69 .div = AT91_PMC_PCR_DIV2,
70};
71static struct clk usart2_clk = {
72 .name = "usart2_clk",
73 .pid = SAMA5D3_ID_USART2,
74 .type = CLK_TYPE_PERIPHERAL,
75 .div = AT91_PMC_PCR_DIV2,
76};
77static struct clk usart3_clk = {
78 .name = "usart3_clk",
79 .pid = SAMA5D3_ID_USART3,
80 .type = CLK_TYPE_PERIPHERAL,
81 .div = AT91_PMC_PCR_DIV2,
82};
83static struct clk uart0_clk = {
84 .name = "uart0_clk",
85 .pid = SAMA5D3_ID_UART0,
86 .type = CLK_TYPE_PERIPHERAL,
87 .div = AT91_PMC_PCR_DIV2,
88};
89static struct clk uart1_clk = {
90 .name = "uart1_clk",
91 .pid = SAMA5D3_ID_UART1,
92 .type = CLK_TYPE_PERIPHERAL,
93 .div = AT91_PMC_PCR_DIV2,
94};
95static struct clk twi0_clk = {
96 .name = "twi0_clk",
97 .pid = SAMA5D3_ID_TWI0,
98 .type = CLK_TYPE_PERIPHERAL,
99 .div = AT91_PMC_PCR_DIV2,
100};
101static struct clk twi1_clk = {
102 .name = "twi1_clk",
103 .pid = SAMA5D3_ID_TWI1,
104 .type = CLK_TYPE_PERIPHERAL,
105 .div = AT91_PMC_PCR_DIV2,
106};
107static struct clk twi2_clk = {
108 .name = "twi2_clk",
109 .pid = SAMA5D3_ID_TWI2,
110 .type = CLK_TYPE_PERIPHERAL,
111 .div = AT91_PMC_PCR_DIV2,
112};
113static struct clk mmc0_clk = {
114 .name = "mci0_clk",
115 .pid = SAMA5D3_ID_HSMCI0,
116 .type = CLK_TYPE_PERIPHERAL,
117};
118static struct clk mmc1_clk = {
119 .name = "mci1_clk",
120 .pid = SAMA5D3_ID_HSMCI1,
121 .type = CLK_TYPE_PERIPHERAL,
122};
123static struct clk mmc2_clk = {
124 .name = "mci2_clk",
125 .pid = SAMA5D3_ID_HSMCI2,
126 .type = CLK_TYPE_PERIPHERAL,
127};
128static struct clk spi0_clk = {
129 .name = "spi0_clk",
130 .pid = SAMA5D3_ID_SPI0,
131 .type = CLK_TYPE_PERIPHERAL,
132};
133static struct clk spi1_clk = {
134 .name = "spi1_clk",
135 .pid = SAMA5D3_ID_SPI1,
136 .type = CLK_TYPE_PERIPHERAL,
137};
138static struct clk tcb0_clk = {
139 .name = "tcb0_clk",
140 .pid = SAMA5D3_ID_TC0,
141 .type = CLK_TYPE_PERIPHERAL,
142 .div = AT91_PMC_PCR_DIV2,
143};
144static struct clk tcb1_clk = {
145 .name = "tcb1_clk",
146 .pid = SAMA5D3_ID_TC1,
147 .type = CLK_TYPE_PERIPHERAL,
148 .div = AT91_PMC_PCR_DIV2,
149};
150static struct clk adc_clk = {
151 .name = "adc_clk",
152 .pid = SAMA5D3_ID_ADC,
153 .type = CLK_TYPE_PERIPHERAL,
154 .div = AT91_PMC_PCR_DIV2,
155};
156static struct clk adc_op_clk = {
157 .name = "adc_op_clk",
158 .type = CLK_TYPE_PERIPHERAL,
159 .rate_hz = 5000000,
160};
161static struct clk dma0_clk = {
162 .name = "dma0_clk",
163 .pid = SAMA5D3_ID_DMA0,
164 .type = CLK_TYPE_PERIPHERAL,
165};
166static struct clk dma1_clk = {
167 .name = "dma1_clk",
168 .pid = SAMA5D3_ID_DMA1,
169 .type = CLK_TYPE_PERIPHERAL,
170};
171static struct clk uhphs_clk = {
172 .name = "uhphs",
173 .pid = SAMA5D3_ID_UHPHS,
174 .type = CLK_TYPE_PERIPHERAL,
175};
176static struct clk udphs_clk = {
177 .name = "udphs_clk",
178 .pid = SAMA5D3_ID_UDPHS,
179 .type = CLK_TYPE_PERIPHERAL,
180};
181/* gmac only for sama5d33, sama5d34, sama5d35 */
182static struct clk macb0_clk = {
183 .name = "macb0_clk",
184 .pid = SAMA5D3_ID_GMAC,
185 .type = CLK_TYPE_PERIPHERAL,
186};
187/* emac only for sama5d31, sama5d35 */
188static struct clk macb1_clk = {
189 .name = "macb1_clk",
190 .pid = SAMA5D3_ID_EMAC,
191 .type = CLK_TYPE_PERIPHERAL,
192};
193/* lcd only for sama5d31, sama5d33, sama5d34 */
194static struct clk lcdc_clk = {
195 .name = "lcdc_clk",
196 .pid = SAMA5D3_ID_LCDC,
197