aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 5ff0bcb70b08..983a0c86ee33 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -6059,6 +6059,8 @@ static int bnx2x_int_mem_test(struct bnx2x *bp)
6059 6059
6060static void bnx2x_enable_blocks_attention(struct bnx2x *bp) 6060static void bnx2x_enable_blocks_attention(struct bnx2x *bp)
6061{ 6061{
6062 u32 val;
6063
6062 REG_WR(bp, PXP_REG_PXP_INT_MASK_0, 0); 6064 REG_WR(bp, PXP_REG_PXP_INT_MASK_0, 0);
6063 if (!CHIP_IS_E1x(bp)) 6065 if (!CHIP_IS_E1x(bp))
6064 REG_WR(bp, PXP_REG_PXP_INT_MASK_1, 0x40); 6066 REG_WR(bp, PXP_REG_PXP_INT_MASK_1, 0x40);
@@ -6092,17 +6094,14 @@ static void bnx2x_enable_blocks_attention(struct bnx2x *bp)
6092/* REG_WR(bp, CSEM_REG_CSEM_INT_MASK_0, 0); */ 6094/* REG_WR(bp, CSEM_REG_CSEM_INT_MASK_0, 0); */
6093/* REG_WR(bp, CSEM_REG_CSEM_INT_MASK_1, 0); */ 6095/* REG_WR(bp, CSEM_REG_CSEM_INT_MASK_1, 0); */
6094 6096
6095 if (CHIP_REV_IS_FPGA(bp)) 6097 val = PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_AFT |
6096 REG_WR(bp, PXP2_REG_PXP2_INT_MASK_0, 0x580000); 6098 PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_OF |
6097 else if (!CHIP_IS_E1x(bp)) 6099 PXP2_PXP2_INT_MASK_0_REG_PGL_PCIE_ATTN;
6098 REG_WR(bp, PXP2_REG_PXP2_INT_MASK_0, 6100 if (!CHIP_IS_E1x(bp))
6099 (PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_OF 6101 val |= PXP2_PXP2_INT_MASK_0_REG_PGL_READ_BLOCKED |
6100 | PXP2_PXP2_INT_MASK_0_REG_PGL_CPL_AFT 6102 PXP2_PXP2_INT_MASK_0_REG_PGL_WRITE_BLOCKED;
6101 | PXP2_PXP2_INT_MASK_0_REG_PGL_PCIE_ATTN 6103 REG_WR(bp, PXP2_REG_PXP2_INT_MASK_0, val);
6102 | PXP2_PXP2_INT_MASK_0_REG_PGL_READ_BLOCKED 6104
6103 | PXP2_PXP2_INT_MASK_0_REG_PGL_WRITE_BLOCKED));
6104 else
6105 REG_WR(bp, PXP2_REG_PXP2_INT_MASK_0, 0x480000);
6106 REG_WR(bp, TSDM_REG_TSDM_INT_MASK_0, 0); 6105 REG_WR(bp, TSDM_REG_TSDM_INT_MASK_0, 0);
6107 REG_WR(bp, TSDM_REG_TSDM_INT_MASK_1, 0); 6106 REG_WR(bp, TSDM_REG_TSDM_INT_MASK_1, 0);
6108 REG_WR(bp, TCM_REG_TCM_INT_MASK, 0); 6107 REG_WR(bp, TCM_REG_TCM_INT_MASK, 0);