diff options
-rw-r--r-- | drivers/gpu/drm/bridge/Kconfig | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/bridge/Makefile | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/bridge/dw_hdmi.c (renamed from drivers/gpu/drm/imx/imx-hdmi.c) | 278 | ||||
-rw-r--r-- | drivers/gpu/drm/bridge/dw_hdmi.h (renamed from drivers/gpu/drm/imx/imx-hdmi.h) | 43 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/Kconfig | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/Makefile | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/imx/dw_hdmi-imx.c (renamed from drivers/gpu/drm/imx/imx-hdmi_pltfm.c) | 110 | ||||
-rw-r--r-- | include/drm/bridge/dw_hdmi.h | 60 |
8 files changed, 262 insertions, 238 deletions
diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig index 884923f982d9..b70f3c8d4e8a 100644 --- a/drivers/gpu/drm/bridge/Kconfig +++ b/drivers/gpu/drm/bridge/Kconfig | |||
@@ -3,3 +3,8 @@ config DRM_PTN3460 | |||
3 | depends on DRM | 3 | depends on DRM |
4 | select DRM_KMS_HELPER | 4 | select DRM_KMS_HELPER |
5 | ---help--- | 5 | ---help--- |
6 | |||
7 | config DRM_DW_HDMI | ||
8 | tristate | ||
9 | depends on DRM | ||
10 | select DRM_KMS_HELPER | ||
diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile index b4733e1fbd2e..d8a8cfd12fbb 100644 --- a/drivers/gpu/drm/bridge/Makefile +++ b/drivers/gpu/drm/bridge/Makefile | |||
@@ -1,3 +1,4 @@ | |||
1 | ccflags-y := -Iinclude/drm | 1 | ccflags-y := -Iinclude/drm |
2 | 2 | ||
3 | obj-$(CONFIG_DRM_PTN3460) += ptn3460.o | 3 | obj-$(CONFIG_DRM_PTN3460) += ptn3460.o |
4 | obj-$(CONFIG_DRM_DW_HDMI) += dw_hdmi.o | ||
diff --git a/drivers/gpu/drm/imx/imx-hdmi.c b/drivers/gpu/drm/bridge/dw_hdmi.c index 998f3fd354ee..ee2cbee8bf69 100644 --- a/drivers/gpu/drm/imx/imx-hdmi.c +++ b/drivers/gpu/drm/bridge/dw_hdmi.c | |||
@@ -6,12 +6,11 @@ | |||
6 | * the Free Software Foundation; either version 2 of the License, or | 6 | * the Free Software Foundation; either version 2 of the License, or |
7 | * (at your option) any later version. | 7 | * (at your option) any later version. |
8 | * | 8 | * |
9 | * SH-Mobile High-Definition Multimedia Interface (HDMI) driver | 9 | * Designware High-Definition Multimedia Interface (HDMI) driver |
10 | * for SLISHDMI13T and SLIPHDMIT IP cores | ||
11 | * | 10 | * |
12 | * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 11 | * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de> |
13 | */ | 12 | */ |
14 | 13 | #include <linux/module.h> | |
15 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
16 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
17 | #include <linux/err.h> | 16 | #include <linux/err.h> |
@@ -24,8 +23,9 @@ | |||
24 | #include <drm/drm_crtc_helper.h> | 23 | #include <drm/drm_crtc_helper.h> |
25 | #include <drm/drm_edid.h> | 24 | #include <drm/drm_edid.h> |
26 | #include <drm/drm_encoder_slave.h> | 25 | #include <drm/drm_encoder_slave.h> |
26 | #include <drm/bridge/dw_hdmi.h> | ||
27 | 27 | ||
28 | #include "imx-hdmi.h" | 28 | #include "dw_hdmi.h" |
29 | 29 | ||
30 | #define HDMI_EDID_LEN 512 | 30 | #define HDMI_EDID_LEN 512 |
31 | 31 | ||
@@ -101,18 +101,19 @@ struct hdmi_data_info { | |||
101 | struct hdmi_vmode video_mode; | 101 | struct hdmi_vmode video_mode; |
102 | }; | 102 | }; |
103 | 103 | ||
104 | struct imx_hdmi { | 104 | struct dw_hdmi { |
105 | struct drm_connector connector; | 105 | struct drm_connector connector; |
106 | struct drm_encoder *encoder; | 106 | struct drm_encoder *encoder; |
107 | struct drm_bridge *bridge; | 107 | struct drm_bridge *bridge; |
108 | 108 | ||
109 | enum imx_hdmi_devtype dev_type; | 109 | enum dw_hdmi_devtype dev_type; |
110 | struct device *dev; | 110 | struct device *dev; |
111 | struct clk *isfr_clk; | 111 | struct clk *isfr_clk; |
112 | struct clk *iahb_clk; | 112 | struct clk *iahb_clk; |
113 | 113 | ||
114 | struct hdmi_data_info hdmi_data; | 114 | struct hdmi_data_info hdmi_data; |
115 | const struct imx_hdmi_plat_data *plat_data; | 115 | const struct dw_hdmi_plat_data *plat_data; |
116 | |||
116 | int vic; | 117 | int vic; |
117 | 118 | ||
118 | u8 edid[HDMI_EDID_LEN]; | 119 | u8 edid[HDMI_EDID_LEN]; |
@@ -129,17 +130,17 @@ struct imx_hdmi { | |||
129 | int ratio; | 130 | int ratio; |
130 | }; | 131 | }; |
131 | 132 | ||
132 | static inline void hdmi_writeb(struct imx_hdmi *hdmi, u8 val, int offset) | 133 | static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset) |
133 | { | 134 | { |
134 | writeb(val, hdmi->regs + offset); | 135 | writeb(val, hdmi->regs + offset); |
135 | } | 136 | } |
136 | 137 | ||
137 | static inline u8 hdmi_readb(struct imx_hdmi *hdmi, int offset) | 138 | static inline u8 hdmi_readb(struct dw_hdmi *hdmi, int offset) |
138 | { | 139 | { |
139 | return readb(hdmi->regs + offset); | 140 | return readb(hdmi->regs + offset); |
140 | } | 141 | } |
141 | 142 | ||
142 | static void hdmi_modb(struct imx_hdmi *hdmi, u8 data, u8 mask, unsigned reg) | 143 | static void hdmi_modb(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned reg) |
143 | { | 144 | { |
144 | u8 val = hdmi_readb(hdmi, reg) & ~mask; | 145 | u8 val = hdmi_readb(hdmi, reg) & ~mask; |
145 | 146 | ||
@@ -147,13 +148,13 @@ static void hdmi_modb(struct imx_hdmi *hdmi, u8 data, u8 mask, unsigned reg) | |||
147 | hdmi_writeb(hdmi, val, reg); | 148 | hdmi_writeb(hdmi, val, reg); |
148 | } | 149 | } |
149 | 150 | ||
150 | static void hdmi_mask_writeb(struct imx_hdmi *hdmi, u8 data, unsigned int reg, | 151 | static void hdmi_mask_writeb(struct dw_hdmi *hdmi, u8 data, unsigned int reg, |
151 | u8 shift, u8 mask) | 152 | u8 shift, u8 mask) |
152 | { | 153 | { |
153 | hdmi_modb(hdmi, data << shift, mask, reg); | 154 | hdmi_modb(hdmi, data << shift, mask, reg); |
154 | } | 155 | } |
155 | 156 | ||
156 | static void hdmi_set_clock_regenerator_n(struct imx_hdmi *hdmi, | 157 | static void hdmi_set_clock_regenerator_n(struct dw_hdmi *hdmi, |
157 | unsigned int value) | 158 | unsigned int value) |
158 | { | 159 | { |
159 | hdmi_writeb(hdmi, value & 0xff, HDMI_AUD_N1); | 160 | hdmi_writeb(hdmi, value & 0xff, HDMI_AUD_N1); |
@@ -164,7 +165,7 @@ static void hdmi_set_clock_regenerator_n(struct imx_hdmi *hdmi, | |||
164 | hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); | 165 | hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_N_SHIFT_MASK, HDMI_AUD_CTS3); |
165 | } | 166 | } |
166 | 167 | ||
167 | static void hdmi_regenerate_cts(struct imx_hdmi *hdmi, unsigned int cts) | 168 | static void hdmi_regenerate_cts(struct dw_hdmi *hdmi, unsigned int cts) |
168 | { | 169 | { |
169 | /* Must be set/cleared first */ | 170 | /* Must be set/cleared first */ |
170 | hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); | 171 | hdmi_modb(hdmi, 0, HDMI_AUD_CTS3_CTS_MANUAL, HDMI_AUD_CTS3); |
@@ -311,7 +312,7 @@ static unsigned int hdmi_compute_cts(unsigned int freq, unsigned long pixel_clk, | |||
311 | return (cts * ratio) / 100; | 312 | return (cts * ratio) / 100; |
312 | } | 313 | } |
313 | 314 | ||
314 | static void hdmi_set_clk_regenerator(struct imx_hdmi *hdmi, | 315 | static void hdmi_set_clk_regenerator(struct dw_hdmi *hdmi, |
315 | unsigned long pixel_clk) | 316 | unsigned long pixel_clk) |
316 | { | 317 | { |
317 | unsigned int clk_n, clk_cts; | 318 | unsigned int clk_n, clk_cts; |
@@ -335,12 +336,12 @@ static void hdmi_set_clk_regenerator(struct imx_hdmi *hdmi, | |||
335 | hdmi_regenerate_cts(hdmi, clk_cts); | 336 | hdmi_regenerate_cts(hdmi, clk_cts); |
336 | } | 337 | } |
337 | 338 | ||
338 | static void hdmi_init_clk_regenerator(struct imx_hdmi *hdmi) | 339 | static void hdmi_init_clk_regenerator(struct dw_hdmi *hdmi) |
339 | { | 340 | { |
340 | hdmi_set_clk_regenerator(hdmi, 74250000); | 341 | hdmi_set_clk_regenerator(hdmi, 74250000); |
341 | } | 342 | } |
342 | 343 | ||
343 | static void hdmi_clk_regenerator_update_pixel_clock(struct imx_hdmi *hdmi) | 344 | static void hdmi_clk_regenerator_update_pixel_clock(struct dw_hdmi *hdmi) |
344 | { | 345 | { |
345 | hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock); | 346 | hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock); |
346 | } | 347 | } |
@@ -352,7 +353,7 @@ static void hdmi_clk_regenerator_update_pixel_clock(struct imx_hdmi *hdmi) | |||
352 | * pin{31~24} <==> G[7:0] | 353 | * pin{31~24} <==> G[7:0] |
353 | * pin{15~8} <==> B[7:0] | 354 | * pin{15~8} <==> B[7:0] |
354 | */ | 355 | */ |
355 | static void hdmi_video_sample(struct imx_hdmi *hdmi) | 356 | static void hdmi_video_sample(struct dw_hdmi *hdmi) |
356 | { | 357 | { |
357 | int color_format = 0; | 358 | int color_format = 0; |
358 | u8 val; | 359 | u8 val; |
@@ -408,12 +409,12 @@ static void hdmi_video_sample(struct imx_hdmi *hdmi) | |||
408 | hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1); | 409 | hdmi_writeb(hdmi, 0x0, HDMI_TX_BCBDATA1); |
409 | } | 410 | } |
410 | 411 | ||
411 | static int is_color_space_conversion(struct imx_hdmi *hdmi) | 412 | static int is_color_space_conversion(struct dw_hdmi *hdmi) |
412 | { | 413 | { |
413 | return hdmi->hdmi_data.enc_in_format != hdmi->hdmi_data.enc_out_format; | 414 | return hdmi->hdmi_data.enc_in_format != hdmi->hdmi_data.enc_out_format; |
414 | } | 415 | } |
415 | 416 | ||
416 | static int is_color_space_decimation(struct imx_hdmi *hdmi) | 417 | static int is_color_space_decimation(struct dw_hdmi *hdmi) |
417 | { | 418 | { |
418 | if (hdmi->hdmi_data.enc_out_format != YCBCR422_8BITS) | 419 | if (hdmi->hdmi_data.enc_out_format != YCBCR422_8BITS) |
419 | return 0; | 420 | return 0; |
@@ -423,7 +424,7 @@ static int is_color_space_decimation(struct imx_hdmi *hdmi) | |||
423 | return 0; | 424 | return 0; |
424 | } | 425 | } |
425 | 426 | ||
426 | static int is_color_space_interpolation(struct imx_hdmi *hdmi) | 427 | static int is_color_space_interpolation(struct dw_hdmi *hdmi) |
427 | { | 428 | { |
428 | if (hdmi->hdmi_data.enc_in_format != YCBCR422_8BITS) | 429 | if (hdmi->hdmi_data.enc_in_format != YCBCR422_8BITS) |
429 | return 0; | 430 | return 0; |
@@ -433,7 +434,7 @@ static int is_color_space_interpolation(struct imx_hdmi *hdmi) | |||
433 | return 0; | 434 | return 0; |
434 | } | 435 | } |
435 | 436 | ||
436 | static void imx_hdmi_update_csc_coeffs(struct imx_hdmi *hdmi) | 437 | static void dw_hdmi_update_csc_coeffs(struct dw_hdmi *hdmi) |
437 | { | 438 | { |
438 | const u16 (*csc_coeff)[3][4] = &csc_coeff_default; | 439 | const u16 (*csc_coeff)[3][4] = &csc_coeff_default; |
439 | unsigned i; | 440 | unsigned i; |
@@ -474,7 +475,7 @@ static void imx_hdmi_update_csc_coeffs(struct imx_hdmi *hdmi) | |||
474 | HDMI_CSC_SCALE); | 475 | HDMI_CSC_SCALE); |
475 | } | 476 | } |
476 | 477 | ||
477 | static void hdmi_video_csc(struct imx_hdmi *hdmi) | 478 | static void hdmi_video_csc(struct dw_hdmi *hdmi) |
478 | { | 479 | { |
479 | int color_depth = 0; | 480 | int color_depth = 0; |
480 | int interpolation = HDMI_CSC_CFG_INTMODE_DISABLE; | 481 | int interpolation = HDMI_CSC_CFG_INTMODE_DISABLE; |
@@ -502,7 +503,7 @@ static void hdmi_video_csc(struct imx_hdmi *hdmi) | |||
502 | hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK, | 503 | hdmi_modb(hdmi, color_depth, HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK, |
503 | HDMI_CSC_SCALE); | 504 | HDMI_CSC_SCALE); |
504 | 505 | ||
505 | imx_hdmi_update_csc_coeffs(hdmi); | 506 | dw_hdmi_update_csc_coeffs(hdmi); |
506 | } | 507 | } |
507 | 508 | ||
508 | /* | 509 | /* |
@@ -510,7 +511,7 @@ static void hdmi_video_csc(struct imx_hdmi *hdmi) | |||
510 | * for example, if input is YCC422 mode or repeater is used, | 511 | * for example, if input is YCC422 mode or repeater is used, |
511 | * data should be repacked this module can be bypassed. | 512 | * data should be repacked this module can be bypassed. |
512 | */ | 513 | */ |
513 | static void hdmi_video_packetize(struct imx_hdmi *hdmi) | 514 | static void hdmi_video_packetize(struct dw_hdmi *hdmi) |
514 | { | 515 | { |
515 | unsigned int color_depth = 0; | 516 | unsigned int color_depth = 0; |
516 | unsigned int remap_size = HDMI_VP_REMAP_YCC422_16bit; | 517 | unsigned int remap_size = HDMI_VP_REMAP_YCC422_16bit; |
@@ -607,40 +608,40 @@ static void hdmi_video_packetize(struct imx_hdmi *hdmi) | |||
607 | HDMI_VP_CONF); | 608 | HDMI_VP_CONF); |
608 | } | 609 | } |
609 | 610 | ||
610 | static inline void hdmi_phy_test_clear(struct imx_hdmi *hdmi, | 611 | static inline void hdmi_phy_test_clear(struct dw_hdmi *hdmi, |
611 | unsigned char bit) | 612 | unsigned char bit) |
612 | { | 613 | { |
613 | hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET, | 614 | hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLR_OFFSET, |
614 | HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0); | 615 | HDMI_PHY_TST0_TSTCLR_MASK, HDMI_PHY_TST0); |
615 | } | 616 | } |
616 | 617 | ||
617 | static inline void hdmi_phy_test_enable(struct imx_hdmi *hdmi, | 618 | static inline void hdmi_phy_test_enable(struct dw_hdmi *hdmi, |
618 | unsigned char bit) | 619 | unsigned char bit) |
619 | { | 620 | { |
620 | hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET, | 621 | hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTEN_OFFSET, |
621 | HDMI_PHY_TST0_TSTEN_MASK, HDMI_PHY_TST0); | 622 | HDMI_PHY_TST0_TSTEN_MASK, HDMI_PHY_TST0); |
622 | } | 623 | } |
623 | 624 | ||
624 | static inline void hdmi_phy_test_clock(struct imx_hdmi *hdmi, | 625 | static inline void hdmi_phy_test_clock(struct dw_hdmi *hdmi, |
625 | unsigned char bit) | 626 | unsigned char bit) |
626 | { | 627 | { |
627 | hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET, | 628 | hdmi_modb(hdmi, bit << HDMI_PHY_TST0_TSTCLK_OFFSET, |
628 | HDMI_PHY_TST0_TSTCLK_MASK, HDMI_PHY_TST0); | 629 | HDMI_PHY_TST0_TSTCLK_MASK, HDMI_PHY_TST0); |
629 | } | 630 | } |
630 | 631 | ||
631 | static inline void hdmi_phy_test_din(struct imx_hdmi *hdmi, | 632 | static inline void hdmi_phy_test_din(struct dw_hdmi *hdmi, |
632 | unsigned char bit) | 633 | unsigned char bit) |
633 | { | 634 | { |
634 | hdmi_writeb(hdmi, bit, HDMI_PHY_TST1); | 635 | hdmi_writeb(hdmi, bit, HDMI_PHY_TST1); |
635 | } | 636 | } |
636 | 637 | ||
637 | static inline void hdmi_phy_test_dout(struct imx_hdmi *hdmi, | 638 | static inline void hdmi_phy_test_dout(struct dw_hdmi *hdmi, |
638 | unsigned char bit) | 639 | unsigned char bit) |
639 | { | 640 | { |
640 | hdmi_writeb(hdmi, bit, HDMI_PHY_TST2); | 641 | hdmi_writeb(hdmi, bit, HDMI_PHY_TST2); |
641 | } | 642 | } |
642 | 643 | ||
643 | static bool hdmi_phy_wait_i2c_done(struct imx_hdmi *hdmi, int msec) | 644 | static bool hdmi_phy_wait_i2c_done(struct dw_hdmi *hdmi, int msec) |
644 | { | 645 | { |
645 | while ((hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) { | 646 | while ((hdmi_readb(hdmi, HDMI_IH_I2CMPHY_STAT0) & 0x3) == 0) { |
646 | if (msec-- == 0) | 647 | if (msec-- == 0) |
@@ -650,7 +651,7 @@ static bool hdmi_phy_wait_i2c_done(struct imx_hdmi *hdmi, int msec) | |||
650 | return true; | 651 | return true; |
651 | } | 652 | } |
652 | 653 | ||
653 | static void __hdmi_phy_i2c_write(struct imx_hdmi *hdmi, unsigned short data, | 654 | static void __hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, |
654 | unsigned char addr) | 655 | unsigned char addr) |
655 | { | 656 | { |
656 | hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0); | 657 | hdmi_writeb(hdmi, 0xFF, HDMI_IH_I2CMPHY_STAT0); |
@@ -664,63 +665,64 @@ static void __hdmi_phy_i2c_write(struct imx_hdmi *hdmi, unsigned short data, | |||
664 | hdmi_phy_wait_i2c_done(hdmi, 1000); | 665 | hdmi_phy_wait_i2c_done(hdmi, 1000); |
665 | } | 666 | } |
666 | 667 | ||
667 | static int hdmi_phy_i2c_write(struct imx_hdmi *hdmi, unsigned short data, | 668 | static int hdmi_phy_i2c_write(struct dw_hdmi *hdmi, unsigned short data, |
668 | unsigned char addr) | 669 | unsigned char addr) |
669 | { | 670 | { |
670 | __hdmi_phy_i2c_write(hdmi, data, addr); | 671 | __hdmi_phy_i2c_write(hdmi, data, addr); |
671 | return 0; | 672 | return 0; |
672 | } | 673 | } |
673 | 674 | ||
674 | static void imx_hdmi_phy_enable_power(struct imx_hdmi *hdmi, u8 enable) | 675 | static void dw_hdmi_phy_enable_power(struct dw_hdmi *hdmi, u8 enable) |
675 | { | 676 | { |
676 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, | 677 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, |
677 | HDMI_PHY_CONF0_PDZ_OFFSET, | 678 | HDMI_PHY_CONF0_PDZ_OFFSET, |
678 | HDMI_PHY_CONF0_PDZ_MASK); | 679 | HDMI_PHY_CONF0_PDZ_MASK); |
679 | } | 680 | } |
680 | 681 | ||
681 | static void imx_hdmi_phy_enable_tmds(struct imx_hdmi *hdmi, u8 enable) | 682 | static void dw_hdmi_phy_enable_tmds(struct dw_hdmi *hdmi, u8 enable) |
682 | { | 683 | { |
683 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, | 684 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, |
684 | HDMI_PHY_CONF0_ENTMDS_OFFSET, | 685 | HDMI_PHY_CONF0_ENTMDS_OFFSET, |
685 | HDMI_PHY_CONF0_ENTMDS_MASK); | 686 | HDMI_PHY_CONF0_ENTMDS_MASK); |
686 | } | 687 | } |
687 | 688 | ||
688 | static void imx_hdmi_phy_gen2_pddq(struct imx_hdmi *hdmi, u8 enable) | 689 | static void dw_hdmi_phy_gen2_pddq(struct dw_hdmi *hdmi, u8 enable) |
689 | { | 690 | { |
690 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, | 691 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, |
691 | HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET, | 692 | HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET, |
692 | HDMI_PHY_CONF0_GEN2_PDDQ_MASK); | 693 | HDMI_PHY_CONF0_GEN2_PDDQ_MASK); |
693 | } | 694 | } |
694 | 695 | ||
695 | static void imx_hdmi_phy_gen2_txpwron(struct imx_hdmi *hdmi, u8 enable) | 696 | static void dw_hdmi_phy_gen2_txpwron(struct dw_hdmi *hdmi, u8 enable) |
696 | { | 697 | { |
697 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, | 698 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, |
698 | HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET, | 699 | HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET, |
699 | HDMI_PHY_CONF0_GEN2_TXPWRON_MASK); | 700 | HDMI_PHY_CONF0_GEN2_TXPWRON_MASK); |
700 | } | 701 | } |
701 | 702 | ||
702 | static void imx_hdmi_phy_sel_data_en_pol(struct imx_hdmi *hdmi, u8 enable) | 703 | static void dw_hdmi_phy_sel_data_en_pol(struct dw_hdmi *hdmi, u8 enable) |
703 | { | 704 | { |
704 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, | 705 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, |
705 | HDMI_PHY_CONF0_SELDATAENPOL_OFFSET, | 706 | HDMI_PHY_CONF0_SELDATAENPOL_OFFSET, |
706 | HDMI_PHY_CONF0_SELDATAENPOL_MASK); | 707 | HDMI_PHY_CONF0_SELDATAENPOL_MASK); |
707 | } | 708 | } |
708 | 709 | ||
709 | static void imx_hdmi_phy_sel_interface_control(struct imx_hdmi *hdmi, u8 enable) | 710 | static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable) |
710 | { | 711 | { |
711 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, | 712 | hdmi_mask_writeb(hdmi, enable, HDMI_PHY_CONF0, |
712 | HDMI_PHY_CONF0_SELDIPIF_OFFSET, | 713 | HDMI_PHY_CONF0_SELDIPIF_OFFSET, |
713 | HDMI_PHY_CONF0_SELDIPIF_MASK); | 714 | HDMI_PHY_CONF0_SELDIPIF_MASK); |
714 | } | 715 | } |
715 | 716 | ||
716 | static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep, | 717 | static int hdmi_phy_configure(struct dw_hdmi *hdmi, unsigned char prep, |
717 | unsigned char res, int cscon) | 718 | unsigned char res, int cscon) |
718 | { | 719 | { |
719 | unsigned res_idx, i; | 720 | unsigned res_idx, i; |
720 | u8 val, msec; | 721 | u8 val, msec; |
721 | const struct mpll_config *mpll_config = hdmi->plat_data->mpll_cfg; | 722 | const struct dw_hdmi_mpll_config *mpll_config = |
722 | const struct curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr; | 723 | hdmi->plat_data->mpll_cfg; |
723 | const struct sym_term *sym_term = hdmi->plat_data->sym_term; | 724 | const struct dw_hdmi_curr_ctrl *curr_ctrl = hdmi->plat_data->cur_ctr; |
725 | const struct dw_hdmi_sym_term *sym_term = hdmi->plat_data->sym_term; | ||
724 | 726 | ||
725 | if (prep) | 727 | if (prep) |
726 | return -EINVAL; | 728 | return -EINVAL; |
@@ -728,13 +730,13 @@ static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep, | |||
728 | switch (res) { | 730 | switch (res) { |
729 | case 0: /* color resolution 0 is 8 bit colour depth */ | 731 | case 0: /* color resolution 0 is 8 bit colour depth */ |
730 | case 8: | 732 | case 8: |
731 | res_idx = RES_8; | 733 | res_idx = DW_HDMI_RES_8; |
732 | break; | 734 | break; |
733 | case 10: | 735 | case 10: |
734 | res_idx = RES_10; | 736 | res_idx = DW_HDMI_RES_10; |
735 | break; | 737 | break; |
736 | case 12: | 738 | case 12: |
737 | res_idx = RES_12; | 739 | res_idx = DW_HDMI_RES_12; |
738 | break; | 740 | break; |
739 | default: | 741 | default: |
740 | return -EINVAL; | 742 | return -EINVAL; |
@@ -749,10 +751,10 @@ static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep, | |||
749 | hdmi_writeb(hdmi, val, HDMI_MC_FLOWCTRL); | 751 | hdmi_writeb(hdmi, val, HDMI_MC_FLOWCTRL); |
750 | 752 | ||
751 | /* gen2 tx power off */ | 753 | /* gen2 tx power off */ |
752 | imx_hdmi_phy_gen2_txpwron(hdmi, 0); | 754 | dw_hdmi_phy_gen2_txpwron(hdmi, 0); |
753 | 755 | ||
754 | /* gen2 pddq */ | 756 | /* gen2 pddq */ |
755 | imx_hdmi_phy_gen2_pddq(hdmi, 1); | 757 | dw_hdmi_phy_gen2_pddq(hdmi, 1); |
756 | 758 | ||
757 | /* PHY reset */ | 759 | /* PHY reset */ |
758 | hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_DEASSERT, HDMI_MC_PHYRSTZ); | 760 | hdmi_writeb(hdmi, HDMI_MC_PHYRSTZ_DEASSERT, HDMI_MC_PHYRSTZ); |
@@ -806,15 +808,15 @@ static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep, | |||
806 | /* REMOVE CLK TERM */ | 808 | /* REMOVE CLK TERM */ |
807 | hdmi_phy_i2c_write(hdmi, 0x8000, 0x05); /* CKCALCTRL */ | 809 | hdmi_phy_i2c_write(hdmi, 0x8000, 0x05); /* CKCALCTRL */ |
808 | 810 | ||
809 | imx_hdmi_phy_enable_power(hdmi, 1); | 811 | dw_hdmi_phy_enable_power(hdmi, 1); |
810 | 812 | ||
811 | /* toggle TMDS enable */ | 813 | /* toggle TMDS enable */ |
812 | imx_hdmi_phy_enable_tmds(hdmi, 0); | 814 | dw_hdmi_phy_enable_tmds(hdmi, 0); |
813 | imx_hdmi_phy_enable_tmds(hdmi, 1); | 815 | dw_hdmi_phy_enable_tmds(hdmi, 1); |
814 | 816 | ||
815 | /* gen2 tx power on */ | 817 | /* gen2 tx power on */ |
816 | imx_hdmi_phy_gen2_txpwron(hdmi, 1); | 818 | dw_hdmi_phy_gen2_txpwron(hdmi, 1); |
817 | imx_hdmi_phy_gen2_pddq(hdmi, 0); | 819 | dw_hdmi_phy_gen2_pddq(hdmi, 0); |
818 | 820 | ||
819 | /*Wait for PHY PLL lock */ | 821 | /*Wait for PHY PLL lock */ |
820 | msec = 5; | 822 | msec = 5; |
@@ -835,7 +837,7 @@ static int hdmi_phy_configure(struct imx_hdmi *hdmi, unsigned char prep, | |||
835 | return 0; | 837 | return 0; |
836 | } | 838 | } |
837 | 839 | ||
838 | static int imx_hdmi_phy_init(struct imx_hdmi *hdmi) | 840 | static int dw_hdmi_phy_init(struct dw_hdmi *hdmi) |
839 | { | 841 | { |
840 | int i, ret; | 842 | int i, ret; |
841 | bool cscon = false; | 843 | bool cscon = false; |
@@ -846,10 +848,10 @@ static int imx_hdmi_phy_init(struct imx_hdmi *hdmi) | |||
846 | 848 | ||
847 | /* HDMI Phy spec says to do the phy initialization sequence twice */ | 849 | /* HDMI Phy spec says to do the phy initialization sequence twice */ |
848 | for (i = 0; i < 2; i++) { | 850 | for (i = 0; i < 2; i++) { |
849 | imx_hdmi_phy_sel_data_en_pol(hdmi, 1); | 851 | dw_hdmi_phy_sel_data_en_pol(hdmi, 1); |
850 | imx_hdmi_phy_sel_interface_control(hdmi, 0); | 852 | dw_hdmi_phy_sel_interface_control(hdmi, 0); |
851 | imx_hdmi_phy_enable_tmds(hdmi, 0); | 853 | dw_hdmi_phy_enable_tmds(hdmi, 0); |
852 | imx_hdmi_phy_enable_power(hdmi, 0); | 854 | dw_hdmi_phy_enable_power(hdmi, 0); |
853 | 855 | ||
854 | /* Enable CSC */ | 856 | /* Enable CSC */ |
855 | ret = hdmi_phy_configure(hdmi, 0, 8, cscon); | 857 | ret = hdmi_phy_configure(hdmi, 0, 8, cscon); |
@@ -861,7 +863,7 @@ static int imx_hdmi_phy_init(struct imx_hdmi *hdmi) | |||
861 | return 0; | 863 | return 0; |
862 | } | 864 | } |
863 | 865 | ||
864 | static void hdmi_tx_hdcp_config(struct imx_hdmi *hdmi) | 866 | static void hdmi_tx_hdcp_config(struct dw_hdmi *hdmi) |
865 | { | 867 | { |
866 | u8 de; | 868 | u8 de; |
867 | 869 | ||
@@ -880,7 +882,7 @@ static void hdmi_tx_hdcp_config(struct imx_hdmi *hdmi) | |||
880 | HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK, HDMI_A_HDCPCFG1); | 882 | HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK, HDMI_A_HDCPCFG1); |
881 | } | 883 | } |
882 | 884 | ||
883 | static void hdmi_config_AVI(struct imx_hdmi *hdmi) | 885 | static void hdmi_config_AVI(struct dw_hdmi *hdmi) |
884 | { | 886 | { |
885 | u8 val, pix_fmt, under_scan; | 887 | u8 val, pix_fmt, under_scan; |
886 | u8 act_ratio, coded_ratio, colorimetry, ext_colorimetry; | 888 | u8 act_ratio, coded_ratio, colorimetry, ext_colorimetry; |
@@ -974,7 +976,7 @@ static void hdmi_config_AVI(struct imx_hdmi *hdmi) | |||
974 | hdmi_writeb(hdmi, 0, HDMI_FC_AVISRB1); | 976 | hdmi_writeb(hdmi, 0, HDMI_FC_AVISRB1); |
975 | } | 977 | } |
976 | 978 | ||
977 | static void hdmi_av_composer(struct imx_hdmi *hdmi, | 979 | static void hdmi_av_composer(struct dw_hdmi *hdmi, |
978 | const struct drm_display_mode *mode) | 980 | const struct drm_display_mode *mode) |
979 | { | 981 | { |
980 | u8 inv_val; | 982 | u8 inv_val; |
@@ -1058,19 +1060,19 @@ static void hdmi_av_composer(struct imx_hdmi *hdmi, | |||
1058 | hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH); | 1060 | hdmi_writeb(hdmi, vsync_len, HDMI_FC_VSYNCINWIDTH); |
1059 | } | 1061 | } |
1060 | 1062 | ||
1061 | static void imx_hdmi_phy_disable(struct imx_hdmi *hdmi) | 1063 | static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi) |
1062 | { | 1064 | { |
1063 | if (!hdmi->phy_enabled) | 1065 | if (!hdmi->phy_enabled) |
1064 | return; | 1066 | return; |
1065 | 1067 | ||
1066 | imx_hdmi_phy_enable_tmds(hdmi, 0); | 1068 | dw_hdmi_phy_enable_tmds(hdmi, 0); |
1067 | imx_hdmi_phy_enable_power(hdmi, 0); | 1069 | dw_hdmi_phy_enable_power(hdmi, 0); |
1068 | 1070 | ||
1069 | hdmi->phy_enabled = false; | 1071 | hdmi->phy_enabled = false; |
1070 | } | 1072 | } |
1071 | 1073 | ||
1072 | /* HDMI Initialization Step B.4 */ | 1074 | /* HDMI Initialization Step B.4 */ |
1073 | static void imx_hdmi_enable_video_path(struct imx_hdmi *hdmi) | 1075 | static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) |
1074 | { | 1076 | { |
1075 | u8 clkdis; | 1077 | u8 clkdis; |
1076 | 1078 | ||
@@ -1099,13 +1101,13 @@ static void imx_hdmi_enable_video_path(struct imx_hdmi *hdmi) | |||
1099 | } | 1101 | } |
1100 | } | 1102 | } |
1101 | 1103 | ||
1102 | static void hdmi_enable_audio_clk(struct imx_hdmi *hdmi) | 1104 | static void hdmi_enable_audio_clk(struct dw_hdmi *hdmi) |
1103 | { | 1105 | { |
1104 | hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS); | 1106 | hdmi_modb(hdmi, 0, HDMI_MC_CLKDIS_AUDCLK_DISABLE, HDMI_MC_CLKDIS); |
1105 | } | 1107 | } |
1106 | 1108 | ||
1107 | /* Workaround to clear the overflow condition */ | 1109 | /* Workaround to clear the overflow condition */ |
1108 | static void imx_hdmi_clear_overflow(struct imx_hdmi *hdmi) | 1110 | static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi) |
1109 | { | 1111 | { |
1110 | int count; | 1112 | int count; |
1111 | u8 val; | 1113 | u8 val; |
@@ -1123,19 +1125,19 @@ static void imx_hdmi_clear_overflow(struct imx_hdmi *hdmi) | |||
1123 | hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF); | 1125 | hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF); |
1124 | } | 1126 | } |
1125 | 1127 | ||
1126 | static void hdmi_enable_overflow_interrupts(struct imx_hdmi *hdmi) | 1128 | static void hdmi_enable_overflow_interrupts(struct dw_hdmi *hdmi) |
1127 | { | 1129 | { |
1128 | hdmi_writeb(hdmi, 0, HDMI_FC_MASK2); | 1130 | hdmi_writeb(hdmi, 0, HDMI_FC_MASK2); |
1129 | hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2); | 1131 | hdmi_writeb(hdmi, 0, HDMI_IH_MUTE_FC_STAT2); |
1130 | } | 1132 | } |
1131 | 1133 | ||
1132 | static void hdmi_disable_overflow_interrupts(struct imx_hdmi *hdmi) | 1134 | static void hdmi_disable_overflow_interrupts(struct dw_hdmi *hdmi) |
1133 | { | 1135 | { |
1134 | hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK, | 1136 | hdmi_writeb(hdmi, HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK, |
1135 | HDMI_IH_MUTE_FC_STAT2); | 1137 | HDMI_IH_MUTE_FC_STAT2); |
1136 | } | 1138 | } |
1137 | 1139 | ||
1138 | static int imx_hdmi_setup(struct imx_hdmi *hdmi, struct drm_display_mode *mode) | 1140 | static int dw_hdmi_setup(struct dw_hdmi *hdmi, struct drm_display_mode *mode) |
1139 | { | 1141 | { |
1140 | int ret; | 1142 | int ret; |
1141 | 1143 | ||
@@ -1187,12 +1189,12 @@ static int imx_hdmi_setup(struct imx_hdmi *hdmi, struct drm_display_mode *mode) | |||
1187 | hdmi_av_composer(hdmi, mode); | 1189 | hdmi_av_composer(hdmi, mode); |
1188 | 1190 | ||
1189 | /* HDMI Initializateion Step B.2 */ | 1191 | /* HDMI Initializateion Step B.2 */ |
1190 | ret = imx_hdmi_phy_init(hdmi); | 1192 | ret = dw_hdmi_phy_init(hdmi); |
1191 | if (ret) | 1193 | if (ret) |
1192 | return ret; | 1194 | return ret; |
1193 | 1195 | ||
1194 | /* HDMI Initialization Step B.3 */ | 1196 | /* HDMI Initialization Step B.3 */ |
1195 | imx_hdmi_enable_video_path(hdmi); | 1197 | dw_hdmi_enable_video_path(hdmi); |
1196 | 1198 | ||
1197 | /* not for DVI mode */ | 1199 | /* not for DVI mode */ |
1198 | if (hdmi->hdmi_data.video_mode.mdvi) { | 1200 | if (hdmi->hdmi_data.video_mode.mdvi) { |
@@ -1213,7 +1215,7 @@ static int imx_hdmi_setup(struct imx_hdmi *hdmi, struct drm_display_mode *mode) | |||
1213 | hdmi_video_sample(hdmi); | 1215 | hdmi_video_sample(hdmi); |
1214 | hdmi_tx_hdcp_config(hdmi); | 1216 | hdmi_tx_hdcp_config(hdmi); |
1215 | 1217 | ||
1216 | imx_hdmi_clear_overflow(hdmi); | 1218 | dw_hdmi_clear_overflow(hdmi); |
1217 | if (hdmi->cable_plugin && !hdmi->hdmi_data.video_mode.mdvi) | 1219 | if (hdmi->cable_plugin && !hdmi->hdmi_data.video_mode.mdvi) |
1218 | hdmi_enable_overflow_interrupts(hdmi); | 1220 | hdmi_enable_overflow_interrupts(hdmi); |
1219 | 1221 | ||
@@ -1221,7 +1223,7 @@ static int imx_hdmi_setup(struct imx_hdmi *hdmi, struct drm_display_mode *mode) | |||
1221 | } | 1223 | } |
1222 | 1224 | ||
1223 | /* Wait until we are registered to enable interrupts */ | 1225 | /* Wait until we are registered to enable interrupts */ |
1224 | static int imx_hdmi_fb_registered(struct imx_hdmi *hdmi) | 1226 | static int dw_hdmi_fb_registered(struct dw_hdmi *hdmi) |
1225 | { | 1227 | { |
1226 | hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL, | 1228 | hdmi_writeb(hdmi, HDMI_PHY_I2CM_INT_ADDR_DONE_POL, |
1227 | HDMI_PHY_I2CM_INT_ADDR); | 1229 | HDMI_PHY_I2CM_INT_ADDR); |
@@ -1239,7 +1241,7 @@ static int imx_hdmi_fb_registered(struct imx_hdmi *hdmi) | |||
1239 | return 0; | 1241 | return 0; |
1240 | } | 1242 | } |
1241 | 1243 | ||
1242 | static void initialize_hdmi_ih_mutes(struct imx_hdmi *hdmi) | 1244 | static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi) |
1243 | { | 1245 | { |
1244 | u8 ih_mute; | 1246 | u8 ih_mute; |
1245 | 1247 | ||
@@ -1291,73 +1293,73 @@ static void initialize_hdmi_ih_mutes(struct imx_hdmi *hdmi) | |||
1291 | hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE); | 1293 | hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE); |
1292 | } | 1294 | } |
1293 | 1295 | ||
1294 | static void imx_hdmi_poweron(struct imx_hdmi *hdmi) | 1296 | static void dw_hdmi_poweron(struct dw_hdmi *hdmi) |
1295 | { | 1297 | { |
1296 | imx_hdmi_setup(hdmi, &hdmi->previous_mode); | 1298 | dw_hdmi_setup(hdmi, &hdmi->previous_mode); |
1297 | } | 1299 | } |
1298 | 1300 | ||
1299 | static void imx_hdmi_poweroff(struct imx_hdmi *hdmi) | 1301 | static void dw_hdmi_poweroff(struct dw_hdmi *hdmi) |
1300 | { | 1302 | { |
1301 | imx_hdmi_phy_disable(hdmi); | 1303 | dw_hdmi_phy_disable(hdmi); |
1302 | } | 1304 | } |
1303 | 1305 | ||
1304 | static void imx_hdmi_bridge_mode_set(struct drm_bridge *bridge, | 1306 | static void dw_hdmi_bridge_mode_set(struct drm_bridge *bridge, |
1305 | struct drm_display_mode *mode, | 1307 | struct drm_display_mode *mode, |
1306 | struct drm_display_mode *adjusted_mode) | 1308 | struct drm_display_mode *adjusted_mode) |
1307 | { | 1309 | { |
1308 | struct imx_hdmi *hdmi = bridge->driver_private; | 1310 | struct dw_hdmi *hdmi = bridge->driver_private; |
1309 | 1311 | ||
1310 | imx_hdmi_setup(hdmi, mode); | 1312 | dw_hdmi_setup(hdmi, mode); |
1311 | 1313 | ||
1312 | /* Store the display mode for plugin/DKMS poweron events */ | 1314 | /* Store the display mode for plugin/DKMS poweron events */ |
1313 | memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode)); | 1315 | memcpy(&hdmi->previous_mode, mode, sizeof(hdmi->previous_mode)); |
1314 | } | 1316 | } |
1315 | 1317 | ||
1316 | static bool imx_hdmi_bridge_mode_fixup(struct drm_bridge *bridge, | 1318 | static bool dw_hdmi_bridge_mode_fixup(struct drm_bridge *bridge, |
1317 | const struct drm_display_mode *mode, | 1319 | const struct drm_display_mode *mode, |
1318 | struct drm_display_mode *adjusted_mode) | 1320 | struct drm_display_mode *adjusted_mode) |
1319 | { | 1321 | { |
1320 | return true; | 1322 | return true; |
1321 | } | 1323 | } |
1322 | 1324 | ||
1323 | static void imx_hdmi_bridge_disable(struct drm_bridge *bridge) | 1325 | static void dw_hdmi_bridge_disable(struct drm_bridge *bridge) |
1324 | { | 1326 | { |
1325 | struct imx_hdmi *hdmi = bridge->driver_private; | 1327 | struct dw_hdmi *hdmi = bridge->driver_private; |
1326 | 1328 | ||
1327 | imx_hdmi_poweroff(hdmi); | 1329 | dw_hdmi_poweroff(hdmi); |
1328 | } | 1330 | } |
1329 | 1331 | ||
1330 | static void imx_hdmi_bridge_enable(struct drm_bridge *bridge) | 1332 | static void dw_hdmi_bridge_enable(struct drm_bridge *bridge) |
1331 | { | 1333 | { |
1332 | struct imx_hdmi *hdmi = bridge->driver_private; | 1334 | struct dw_hdmi *hdmi = bridge->driver_private; |
1333 | 1335 | ||
1334 | imx_hdmi_poweron(hdmi); | 1336 | dw_hdmi_poweron(hdmi); |
1335 | } | 1337 | } |
1336 | 1338 | ||
1337 | static void imx_hdmi_bridge_destroy(struct drm_bridge *bridge) | 1339 | static void dw_hdmi_bridge_destroy(struct drm_bridge *bridge) |
1338 | { | 1340 | { |
1339 | drm_bridge_cleanup(bridge); | 1341 | drm_bridge_cleanup(bridge); |
1340 | kfree(bridge); | 1342 | kfree(bridge); |
1341 | } | 1343 | } |
1342 | 1344 | ||
1343 | static void imx_hdmi_bridge_nop(struct drm_bridge *bridge) | 1345 | static void dw_hdmi_bridge_nop(struct drm_bridge *bridge) |
1344 | { | 1346 | { |
1345 | /* do nothing */ | 1347 | /* do nothing */ |
1346 | } | 1348 | } |
1347 | 1349 | ||
1348 | static enum drm_connector_status imx_hdmi_connector_detect(struct drm_connector | 1350 | static enum drm_connector_status |
1349 | *connector, bool force) | 1351 | dw_hdmi_connector_detect(struct drm_connector *connector, bool force) |
1350 | { | 1352 | { |
1351 | struct imx_hdmi *hdmi = container_of(connector, struct imx_hdmi, | 1353 | struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, |
1352 | connector); | 1354 | connector); |
1353 | 1355 | ||
1354 | return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ? | 1356 | return hdmi_readb(hdmi, HDMI_PHY_STAT0) & HDMI_PHY_HPD ? |
1355 | connector_status_connected : connector_status_disconnected; | 1357 | connector_status_connected : connector_status_disconnected; |
1356 | } | 1358 | } |
1357 | 1359 | ||
1358 | static int imx_hdmi_connector_get_modes(struct drm_connector *connector) | 1360 | static int dw_hdmi_connector_get_modes(struct drm_connector *connector) |
1359 | { | 1361 | { |
1360 | struct imx_hdmi *hdmi = container_of(connector, struct imx_hdmi, | 1362 | struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, |
1361 | connector); | 1363 | connector); |
1362 | struct edid *edid; | 1364 | struct edid *edid; |
1363 | int ret; | 1365 | int ret; |
@@ -1380,46 +1382,46 @@ static int imx_hdmi_connector_get_modes(struct drm_connector *connector) | |||
1380 | return 0; | 1382 | return 0; |
1381 | } | 1383 | } |
1382 | 1384 | ||
1383 | static struct drm_encoder *imx_hdmi_connector_best_encoder(struct drm_connector | 1385 | static struct drm_encoder *dw_hdmi_connector_best_encoder(struct drm_connector |
1384 | *connector) | 1386 | *connector) |
1385 | { | 1387 | { |
1386 | struct imx_hdmi *hdmi = container_of(connector, struct imx_hdmi, | 1388 | struct dw_hdmi *hdmi = container_of(connector, struct dw_hdmi, |
1387 | connector); | 1389 | connector); |
1388 | 1390 | ||
1389 | return hdmi->encoder; | 1391 | return hdmi->encoder; |
1390 | } | 1392 | } |
1391 | 1393 | ||
1392 | static void imx_hdmi_connector_destroy(struct drm_connector *connector) | 1394 | static void dw_hdmi_connector_destroy(struct drm_connector *connector) |
1393 | { | 1395 | { |
1394 | drm_connector_unregister(connector); | 1396 | drm_connector_unregister(connector); |
1395 | drm_connector_cleanup(connector); | 1397 | drm_connector_cleanup(connector); |
1396 | } | 1398 | } |
1397 | 1399 | ||
1398 | static struct drm_connector_funcs imx_hdmi_connector_funcs = { | 1400 | static struct drm_connector_funcs dw_hdmi_connector_funcs = { |
1399 | .dpms = drm_helper_connector_dpms, | 1401 | .dpms = drm_helper_connector_dpms, |
1400 | .fill_modes = drm_helper_probe_single_connector_modes, | 1402 | .fill_modes = drm_helper_probe_single_connector_modes, |
1401 | .detect = imx_hdmi_connector_detect, | 1403 | .detect = dw_hdmi_connector_detect, |
1402 | .destroy = imx_hdmi_connector_destroy, | 1404 | .destroy = dw_hdmi_connector_destroy, |
1403 | }; | 1405 | }; |
1404 | 1406 | ||
1405 | static struct drm_connector_helper_funcs imx_hdmi_connector_helper_funcs = { | 1407 | static struct drm_connector_helper_funcs dw_hdmi_connector_helper_funcs = { |
1406 | .get_modes = imx_hdmi_connector_get_modes, | 1408 | .get_modes = dw_hdmi_connector_get_modes, |
1407 | .best_encoder = imx_hdmi_connector_best_encoder, | 1409 | .best_encoder = dw_hdmi_connector_best_encoder, |
1408 | }; | 1410 | }; |
1409 | 1411 | ||
1410 | struct drm_bridge_funcs imx_hdmi_bridge_funcs = { | 1412 | struct drm_bridge_funcs dw_hdmi_bridge_funcs = { |
1411 | .enable = imx_hdmi_bridge_enable, | 1413 | .enable = dw_hdmi_bridge_enable, |
1412 | .disable = imx_hdmi_bridge_disable, | 1414 | .disable = dw_hdmi_bridge_disable, |
1413 | .pre_enable = imx_hdmi_bridge_nop, | 1415 | .pre_enable = dw_hdmi_bridge_nop, |
1414 | .post_disable = imx_hdmi_bridge_nop, | 1416 | .post_disable = dw_hdmi_bridge_nop, |
1415 | .mode_set = imx_hdmi_bridge_mode_set, | 1417 | .mode_set = dw_hdmi_bridge_mode_set, |
1416 | .mode_fixup = imx_hdmi_bridge_mode_fixup, | 1418 | .mode_fixup = dw_hdmi_bridge_mode_fixup, |
1417 | .destroy = imx_hdmi_bridge_destroy, | 1419 | .destroy = dw_hdmi_bridge_destroy, |
1418 | }; | 1420 | }; |
1419 | 1421 | ||
1420 | static irqreturn_t imx_hdmi_hardirq(int irq, void *dev_id) | 1422 | static irqreturn_t dw_hdmi_hardirq(int irq, void *dev_id) |
1421 | { | 1423 | { |
1422 | struct imx_hdmi *hdmi = dev_id; | 1424 | struct dw_hdmi *hdmi = dev_id; |
1423 | u8 intr_stat; | 1425 | u8 intr_stat; |
1424 | 1426 | ||
1425 | intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0); | 1427 | intr_stat = hdmi_readb(hdmi, HDMI_IH_PHY_STAT0); |
@@ -1429,9 +1431,9 @@ static irqreturn_t imx_hdmi_hardirq(int irq, void *dev_id) | |||
1429 | return intr_stat ? IRQ_WAKE_THREAD : IRQ_NONE; | 1431 | return intr_stat ? IRQ_WAKE_THREAD : IRQ_NONE; |
1430 | } | 1432 | } |
1431 | 1433 | ||
1432 | static irqreturn_t imx_hdmi_irq(int irq, void *dev_id) | 1434 | static irqreturn_t dw_hdmi_irq(int irq, void *dev_id) |
1433 | { | 1435 | { |
1434 | struct imx_hdmi *hdmi = dev_id; | 1436 | struct dw_hdmi *hdmi = dev_id; |
1435 | u8 intr_stat; | 1437 | u8 intr_stat; |
1436 | u8 phy_int_pol; | 1438 | u8 phy_int_pol; |
1437 | 1439 | ||
@@ -1445,14 +1447,14 @@ static irqreturn_t imx_hdmi_irq(int irq, void *dev_id) | |||
1445 | 1447 | ||
1446 | hdmi_modb(hdmi, 0, HDMI_PHY_HPD, HDMI_PHY_POL0); | 1448 | hdmi_modb(hdmi, 0, HDMI_PHY_HPD, HDMI_PHY_POL0); |
1447 | 1449 | ||
1448 | imx_hdmi_poweron(hdmi); | 1450 | dw_hdmi_poweron(hdmi); |
1449 | } else { | 1451 | } else { |
1450 | dev_dbg(hdmi->dev, "EVENT=plugout\n"); | 1452 | dev_dbg(hdmi->dev, "EVENT=plugout\n"); |
1451 | 1453 | ||
1452 | hdmi_modb(hdmi, HDMI_PHY_HPD, HDMI_PHY_HPD, | 1454 | hdmi_modb(hdmi, HDMI_PHY_HPD, HDMI_PHY_HPD, |
1453 | HDMI_PHY_POL0); | 1455 | HDMI_PHY_POL0); |
1454 | 1456 | ||
1455 | imx_hdmi_poweroff(hdmi); | 1457 | dw_hdmi_poweroff(hdmi); |
1456 | } | 1458 | } |
1457 | drm_helper_hpd_irq_event(hdmi->connector.dev); | 1459 | drm_helper_hpd_irq_event(hdmi->connector.dev); |
1458 | } | 1460 | } |
@@ -1463,7 +1465,7 @@ static irqreturn_t imx_hdmi_irq(int irq, void *dev_id) | |||
1463 | return IRQ_HANDLED; | 1465 | return IRQ_HANDLED; |
1464 | } | 1466 | } |
1465 | 1467 | ||
1466 | static int imx_hdmi_register(struct drm_device *drm, struct imx_hdmi *hdmi) | 1468 | static int dw_hdmi_register(struct drm_device *drm, struct dw_hdmi *hdmi) |
1467 | { | 1469 | { |
1468 | struct drm_encoder *encoder = hdmi->encoder; | 1470 | struct drm_encoder *encoder = hdmi->encoder; |
1469 | struct drm_bridge *bridge; | 1471 | struct drm_bridge *bridge; |
@@ -1478,7 +1480,7 @@ static int imx_hdmi_register(struct drm_device *drm, struct imx_hdmi *hdmi) | |||
1478 | hdmi->bridge = bridge; | 1480 | hdmi->bridge = bridge; |
1479 | bridge->driver_private = hdmi; | 1481 | bridge->driver_private = hdmi; |
1480 | 1482 | ||
1481 | ret = drm_bridge_init(drm, bridge, &imx_hdmi_bridge_funcs); | 1483 | ret = drm_bridge_init(drm, bridge, &dw_hdmi_bridge_funcs); |
1482 | if (ret) { | 1484 | if (ret) { |
1483 | DRM_ERROR("Failed to initialize bridge with drm\n"); | 1485 | DRM_ERROR("Failed to initialize bridge with drm\n"); |
1484 | return -EINVAL; | 1486 | return -EINVAL; |
@@ -1488,8 +1490,8 @@ static int imx_hdmi_register(struct drm_device *drm, struct imx_hdmi *hdmi) | |||
1488 | hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD; | 1490 | hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD; |
1489 | 1491 | ||
1490 | drm_connector_helper_add(&hdmi->connector, | 1492 | drm_connector_helper_add(&hdmi->connector, |
1491 | &imx_hdmi_connector_helper_funcs); | 1493 | &dw_hdmi_connector_helper_funcs); |
1492 | drm_connector_init(drm, &hdmi->connector, &imx_hdmi_connector_funcs, | 1494 | drm_connector_init(drm, &hdmi->connector, &dw_hdmi_connector_funcs, |
1493 | DRM_MODE_CONNECTOR_HDMIA); | 1495 | DRM_MODE_CONNECTOR_HDMIA); |
1494 | 1496 | ||
1495 | hdmi->connector.encoder = encoder; | 1497 | hdmi->connector.encoder = encoder; |
@@ -1499,7 +1501,7 @@ static int imx_hdmi_register(struct drm_device *drm, struct imx_hdmi *hdmi) | |||
1499 | return 0; | 1501 | return 0; |
1500 | } | 1502 | } |
1501 | 1503 | ||
1502 | int imx_hdmi_bind(struct device *dev, struct device *master, | 1504 | int dw_hdmi_bind(struct device *dev, struct device *master, |
1503 | void *data, struct drm_encoder *encoder, | 1505 | void *data, struct drm_encoder *encoder, |
1504 | struct resource *iores, int irq, | 1506 | struct resource *iores, int irq, |
1505 | const struct dw_hdmi_plat_data *plat_data) | 1507 | const struct dw_hdmi_plat_data *plat_data) |
@@ -1507,7 +1509,7 @@ int imx_hdmi_bind(struct device *dev, struct device *master, | |||
1507 | struct drm_device *drm = data; | 1509 | struct drm_device *drm = data; |
1508 | struct device_node *np = dev->of_node; | 1510 | struct device_node *np = dev->of_node; |
1509 | struct device_node *ddc_node; | 1511 | struct device_node *ddc_node; |
1510 | struct imx_hdmi *hdmi; | 1512 | struct dw_hdmi *hdmi; |
1511 | int ret; | 1513 | int ret; |
1512 | 1514 | ||
1513 | hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); | 1515 | hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); |
@@ -1534,8 +1536,8 @@ int imx_hdmi_bind(struct device *dev, struct device *master, | |||
1534 | dev_dbg(hdmi->dev, "no ddc property found\n"); | 1536 | dev_dbg(hdmi->dev, "no ddc property found\n"); |
1535 | } | 1537 | } |
1536 | 1538 | ||
1537 | ret = devm_request_threaded_irq(dev, irq, imx_hdmi_hardirq, | 1539 | ret = devm_request_threaded_irq(dev, irq, dw_hdmi_hardirq, |
1538 | imx_hdmi_irq, IRQF_SHARED, | 1540 | dw_hdmi_irq, IRQF_SHARED, |
1539 | dev_name(dev), hdmi); | 1541 | dev_name(dev), hdmi); |
1540 | if (ret) | 1542 | if (ret) |
1541 | return ret; | 1543 | return ret; |
@@ -1595,11 +1597,11 @@ int imx_hdmi_bind(struct device *dev, struct device *master, | |||
1595 | /* Clear Hotplug interrupts */ | 1597 | /* Clear Hotplug interrupts */ |
1596 | hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0); | 1598 | hdmi_writeb(hdmi, HDMI_IH_PHY_STAT0_HPD, HDMI_IH_PHY_STAT0); |
1597 | 1599 | ||
1598 | ret = imx_hdmi_fb_registered(hdmi); | 1600 | ret = dw_hdmi_fb_registered(hdmi); |
1599 | if (ret) | 1601 | if (ret) |
1600 | goto err_iahb; | 1602 | goto err_iahb; |
1601 | 1603 | ||
1602 | ret = imx_hdmi_register(drm, hdmi); | 1604 | ret = dw_hdmi_register(drm, hdmi); |
1603 | if (ret) | 1605 | if (ret) |
1604 | goto err_iahb; | 1606 | goto err_iahb; |
1605 | 1607 | ||
@@ -1617,11 +1619,11 @@ err_isfr: | |||
1617 | 1619 | ||
1618 | return ret; | 1620 | return ret; |
1619 | } | 1621 | } |
1620 | EXPORT_SYMBOL_GPL(imx_hdmi_bind); | 1622 | EXPORT_SYMBOL_GPL(dw_hdmi_bind); |
1621 | 1623 | ||
1622 | void imx_hdmi_unbind(struct device *dev, struct device *master, void *data) | 1624 | void dw_hdmi_unbind(struct device *dev, struct device *master, void *data) |
1623 | { | 1625 | { |
1624 | struct imx_hdmi *hdmi = dev_get_drvdata(dev); | 1626 | struct dw_hdmi *hdmi = dev_get_drvdata(dev); |
1625 | 1627 | ||
1626 | /* Disable all interrupts */ | 1628 | /* Disable all interrupts */ |
1627 | hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0); | 1629 | hdmi_writeb(hdmi, ~0, HDMI_IH_MUTE_PHY_STAT0); |
@@ -1633,11 +1635,11 @@ void imx_hdmi_unbind(struct device *dev, struct device *master, void *data) | |||
1633 | clk_disable_unprepare(hdmi->isfr_clk); | 1635 | clk_disable_unprepare(hdmi->isfr_clk); |
1634 | i2c_put_adapter(hdmi->ddc); | 1636 | i2c_put_adapter(hdmi->ddc); |
1635 | } | 1637 | } |
1636 | EXPORT_SYMBOL_GPL(imx_hdmi_unbind); | 1638 | EXPORT_SYMBOL_GPL(dw_hdmi_unbind); |
1637 | 1639 | ||
1638 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); | 1640 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); |
1639 | MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>"); | 1641 | MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>"); |
1640 | MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>"); | 1642 | MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>"); |
1641 | MODULE_DESCRIPTION("i.MX6 HDMI transmitter driver"); | 1643 | MODULE_DESCRIPTION("DW HDMI transmitter driver"); |
1642 | MODULE_LICENSE("GPL"); | 1644 | MODULE_LICENSE("GPL"); |
1643 | MODULE_ALIAS("platform:imx-hdmi"); | 1645 | MODULE_ALIAS("platform:dw-hdmi"); |
diff --git a/drivers/gpu/drm/imx/imx-hdmi.h b/drivers/gpu/drm/bridge/dw_hdmi.h index db407f0a84f2..baa7849851d4 100644 --- a/drivers/gpu/drm/imx/imx-hdmi.h +++ b/drivers/gpu/drm/bridge/dw_hdmi.h | |||
@@ -1030,47 +1030,4 @@ enum { | |||
1030 | HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0, | 1030 | HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0, |
1031 | }; | 1031 | }; |
1032 | 1032 | ||
1033 | enum imx_hdmi_devtype { | ||
1034 | IMX6Q_HDMI, | ||
1035 | IMX6DL_HDMI, | ||
1036 | }; | ||
1037 | |||
1038 | struct imx_hdmi_plat_data { | ||
1039 | enum imx_hdmi_devtype dev_type; | ||
1040 | const struct mpll_config *mpll_cfg; | ||
1041 | const struct curr_ctrl *cur_ctr; | ||
1042 | const struct sym_term *sym_term; | ||
1043 | }; | ||
1044 | |||
1045 | enum { | ||
1046 | RES_8, | ||
1047 | RES_10, | ||
1048 | RES_12, | ||
1049 | RES_MAX, | ||
1050 | }; | ||
1051 | |||
1052 | struct mpll_config { | ||
1053 | unsigned long mpixelclock; | ||
1054 | struct { | ||
1055 | u16 cpce; | ||
1056 | u16 gmp; | ||
1057 | } res[RES_MAX]; | ||
1058 | }; | ||
1059 | |||
1060 | struct curr_ctrl { | ||
1061 | unsigned long mpixelclock; | ||
1062 | u16 curr[RES_MAX]; | ||
1063 | }; | ||
1064 | |||
1065 | struct sym_term { | ||
1066 | unsigned long mpixelclock; | ||
1067 | u16 sym_ctr; /*clock symbol and transmitter control*/ | ||
1068 | u16 term; /*transmission termination value*/ | ||
1069 | }; | ||
1070 | |||
1071 | int imx_hdmi_bind(struct device *dev, struct device *master, | ||
1072 | void *data, struct drm_encoder *encoder, | ||
1073 | struct resource *iores, int irq, | ||
1074 | const struct imx_hdmi_plat_data *plat_data); | ||
1075 | void imx_hdmi_unbind(struct device *dev, struct device *master, void *data); | ||
1076 | #endif /* __IMX_HDMI_H__ */ | 1033 | #endif /* __IMX_HDMI_H__ */ |
diff --git a/drivers/gpu/drm/imx/Kconfig b/drivers/gpu/drm/imx/Kconfig index ab31848e92cf..5d5e4092d40a 100644 --- a/drivers/gpu/drm/imx/Kconfig +++ b/drivers/gpu/drm/imx/Kconfig | |||
@@ -49,6 +49,7 @@ config DRM_IMX_IPUV3 | |||
49 | 49 | ||
50 | config DRM_IMX_HDMI | 50 | config DRM_IMX_HDMI |
51 | tristate "Freescale i.MX DRM HDMI" | 51 | tristate "Freescale i.MX DRM HDMI" |
52 | select DRM_DW_HDMI | ||
52 | depends on DRM_IMX | 53 | depends on DRM_IMX |
53 | help | 54 | help |
54 | Choose this if you want to use HDMI on i.MX6. | 55 | Choose this if you want to use HDMI on i.MX6. |
diff --git a/drivers/gpu/drm/imx/Makefile b/drivers/gpu/drm/imx/Makefile index 63cf56ad5c61..f3ecd8903d97 100644 --- a/drivers/gpu/drm/imx/Makefile +++ b/drivers/gpu/drm/imx/Makefile | |||
@@ -9,4 +9,4 @@ obj-$(CONFIG_DRM_IMX_LDB) += imx-ldb.o | |||
9 | 9 | ||
10 | imx-ipuv3-crtc-objs := ipuv3-crtc.o ipuv3-plane.o | 10 | imx-ipuv3-crtc-objs := ipuv3-crtc.o ipuv3-plane.o |
11 | obj-$(CONFIG_DRM_IMX_IPUV3) += imx-ipuv3-crtc.o | 11 | obj-$(CONFIG_DRM_IMX_IPUV3) += imx-ipuv3-crtc.o |
12 | obj-$(CONFIG_DRM_IMX_HDMI) += imx-hdmi.o imx-hdmi_pltfm.o | 12 | obj-$(CONFIG_DRM_IMX_HDMI) += dw_hdmi-imx.o |
diff --git a/drivers/gpu/drm/imx/imx-hdmi_pltfm.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c index 830531fd57f6..121d30ca2d44 100644 --- a/drivers/gpu/drm/imx/imx-hdmi_pltfm.c +++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc. | 1 | /* Copyright (C) 2011-2013 Freescale Semiconductor, Inc. |
2 | * | 2 | * |
3 | * derived from imx-hdmi.c | 3 | * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now) |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify | 5 | * This program is free software; you can redistribute it and/or modify |
6 | * it under the terms of the GNU General Public License version 2 as | 6 | * it under the terms of the GNU General Public License version 2 as |
@@ -11,6 +11,7 @@ | |||
11 | #include <linux/component.h> | 11 | #include <linux/component.h> |
12 | #include <linux/mfd/syscon.h> | 12 | #include <linux/mfd/syscon.h> |
13 | #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> | 13 | #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> |
14 | #include <drm/bridge/dw_hdmi.h> | ||
14 | #include <video/imx-ipu-v3.h> | 15 | #include <video/imx-ipu-v3.h> |
15 | #include <linux/regmap.h> | 16 | #include <linux/regmap.h> |
16 | #include <drm/drm_of.h> | 17 | #include <drm/drm_of.h> |
@@ -20,15 +21,14 @@ | |||
20 | #include <drm/drm_encoder_slave.h> | 21 | #include <drm/drm_encoder_slave.h> |
21 | 22 | ||
22 | #include "imx-drm.h" | 23 | #include "imx-drm.h" |
23 | #include "imx-hdmi.h" | ||
24 | 24 | ||
25 | struct imx_hdmi_priv { | 25 | struct imx_hdmi { |
26 | struct device *dev; | 26 | struct device *dev; |
27 | struct drm_encoder encoder; | 27 | struct drm_encoder encoder; |
28 | struct regmap *regmap; | 28 | struct regmap *regmap; |
29 | }; | 29 | }; |
30 | 30 | ||
31 | static const struct mpll_config imx_mpll_cfg[] = { | 31 | static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = { |
32 | { | 32 | { |
33 | 45250000, { | 33 | 45250000, { |
34 | { 0x01e0, 0x0000 }, | 34 | { 0x01e0, 0x0000 }, |
@@ -56,7 +56,7 @@ static const struct mpll_config imx_mpll_cfg[] = { | |||
56 | } | 56 | } |
57 | }; | 57 | }; |
58 | 58 | ||
59 | static const struct curr_ctrl imx_cur_ctr[] = { | 59 | static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = { |
60 | /* pixelclk bpp8 bpp10 bpp12 */ | 60 | /* pixelclk bpp8 bpp10 bpp12 */ |
61 | { | 61 | { |
62 | 54000000, { 0x091c, 0x091c, 0x06dc }, | 62 | 54000000, { 0x091c, 0x091c, 0x06dc }, |
@@ -73,13 +73,13 @@ static const struct curr_ctrl imx_cur_ctr[] = { | |||
73 | } | 73 | } |
74 | }; | 74 | }; |
75 | 75 | ||
76 | static const struct sym_term imx_sym_term[] = { | 76 | static const struct dw_hdmi_sym_term imx_sym_term[] = { |
77 | /*pixelclk symbol term*/ | 77 | /*pixelclk symbol term*/ |
78 | { 148500000, 0x800d, 0x0005 }, | 78 | { 148500000, 0x800d, 0x0005 }, |
79 | { ~0UL, 0x0000, 0x0000 } | 79 | { ~0UL, 0x0000, 0x0000 } |
80 | }; | 80 | }; |
81 | 81 | ||
82 | static int imx_hdmi_parse_dt(struct imx_hdmi_priv *hdmi) | 82 | static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi) |
83 | { | 83 | { |
84 | struct device_node *np = hdmi->dev->of_node; | 84 | struct device_node *np = hdmi->dev->of_node; |
85 | 85 | ||
@@ -92,28 +92,26 @@ static int imx_hdmi_parse_dt(struct imx_hdmi_priv *hdmi) | |||
92 | return 0; | 92 | return 0; |
93 | } | 93 | } |
94 | 94 | ||
95 | static void imx_hdmi_encoder_disable(struct drm_encoder *encoder) | 95 | static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder) |
96 | { | 96 | { |
97 | } | 97 | } |
98 | 98 | ||
99 | static bool imx_hdmi_encoder_mode_fixup(struct drm_encoder *encoder, | 99 | static bool dw_hdmi_imx_encoder_mode_fixup(struct drm_encoder *encoder, |
100 | const struct drm_display_mode *mode, | 100 | const struct drm_display_mode *mode, |
101 | struct drm_display_mode *adj_mode) | 101 | struct drm_display_mode *adj_mode) |
102 | { | 102 | { |
103 | return true; | 103 | return true; |
104 | } | 104 | } |
105 | 105 | ||
106 | static void imx_hdmi_encoder_mode_set(struct drm_encoder *encoder, | 106 | static void dw_hdmi_imx_encoder_mode_set(struct drm_encoder *encoder, |
107 | struct drm_display_mode *mode, | 107 | struct drm_display_mode *mode, |
108 | struct drm_display_mode *adj_mode) | 108 | struct drm_display_mode *adj_mode) |
109 | { | 109 | { |
110 | } | 110 | } |
111 | 111 | ||
112 | static void imx_hdmi_encoder_commit(struct drm_encoder *encoder) | 112 | static void dw_hdmi_imx_encoder_commit(struct drm_encoder *encoder) |
113 | { | 113 | { |
114 | struct imx_hdmi_priv *hdmi = container_of(encoder, | 114 | struct imx_hdmi *hdmi = container_of(encoder, struct imx_hdmi, encoder); |
115 | struct imx_hdmi_priv, | ||
116 | encoder); | ||
117 | int mux = imx_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder); | 115 | int mux = imx_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder); |
118 | 116 | ||
119 | regmap_update_bits(hdmi->regmap, IOMUXC_GPR3, | 117 | regmap_update_bits(hdmi->regmap, IOMUXC_GPR3, |
@@ -121,38 +119,38 @@ static void imx_hdmi_encoder_commit(struct drm_encoder *encoder) | |||
121 | mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT); | 119 | mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT); |
122 | } | 120 | } |
123 | 121 | ||
124 | static void imx_hdmi_encoder_prepare(struct drm_encoder *encoder) | 122 | static void dw_hdmi_imx_encoder_prepare(struct drm_encoder *encoder) |
125 | { | 123 | { |
126 | imx_drm_panel_format(encoder, V4L2_PIX_FMT_RGB24); | 124 | imx_drm_panel_format(encoder, V4L2_PIX_FMT_RGB24); |
127 | } | 125 | } |
128 | 126 | ||
129 | static struct drm_encoder_helper_funcs imx_hdmi_encoder_helper_funcs = { | 127 | static struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = { |
130 | .mode_fixup = imx_hdmi_encoder_mode_fixup, | 128 | .mode_fixup = dw_hdmi_imx_encoder_mode_fixup, |
131 | .mode_set = imx_hdmi_encoder_mode_set, | 129 | .mode_set = dw_hdmi_imx_encoder_mode_set, |
132 | .prepare = imx_hdmi_encoder_prepare, | 130 | .prepare = dw_hdmi_imx_encoder_prepare, |
133 | .commit = imx_hdmi_encoder_commit, | 131 | .commit = dw_hdmi_imx_encoder_commit, |
134 | .disable = imx_hdmi_encoder_disable, | 132 | .disable = dw_hdmi_imx_encoder_disable, |
135 | }; | 133 | }; |
136 | 134 | ||
137 | static struct drm_encoder_funcs imx_hdmi_encoder_funcs = { | 135 | static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = { |
138 | .destroy = drm_encoder_cleanup, | 136 | .destroy = drm_encoder_cleanup, |
139 | }; | 137 | }; |
140 | 138 | ||
141 | static struct imx_hdmi_plat_data imx6q_hdmi_drv_data = { | 139 | static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = { |
142 | .mpll_cfg = imx_mpll_cfg, | 140 | .mpll_cfg = imx_mpll_cfg, |
143 | .cur_ctr = imx_cur_ctr, | 141 | .cur_ctr = imx_cur_ctr, |
144 | .sym_term = imx_sym_term, | 142 | .sym_term = imx_sym_term, |
145 | .dev_type = IMX6Q_HDMI, | 143 | .dev_type = IMX6Q_HDMI, |
146 | }; | 144 | }; |
147 | 145 | ||
148 | static struct imx_hdmi_plat_data imx6dl_hdmi_drv_data = { | 146 | static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = { |
149 | .mpll_cfg = imx_mpll_cfg, | 147 | .mpll_cfg = imx_mpll_cfg, |
150 | .cur_ctr = imx_cur_ctr, | 148 | .cur_ctr = imx_cur_ctr, |
151 | .sym_term = imx_sym_term, | 149 | .sym_term = imx_sym_term, |
152 | .dev_type = IMX6DL_HDMI, | 150 | .dev_type = IMX6DL_HDMI, |
153 | }; | 151 | }; |
154 | 152 | ||
155 | static const struct of_device_id imx_hdmi_dt_ids[] = { | 153 | static const struct of_device_id dw_hdmi_imx_dt_ids[] = { |
156 | { .compatible = "fsl,imx6q-hdmi", | 154 | { .compatible = "fsl,imx6q-hdmi", |
157 | .data = &imx6q_hdmi_drv_data | 155 | .data = &imx6q_hdmi_drv_data |
158 | }, { | 156 | }, { |
@@ -161,17 +159,17 @@ static const struct of_device_id imx_hdmi_dt_ids[] = { | |||
161 | }, | 159 | }, |
162 | {}, | 160 | {}, |
163 | }; | 161 | }; |
164 | MODULE_DEVICE_TABLE(of, imx_hdmi_dt_ids); | 162 | MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids); |
165 | 163 | ||
166 | static int imx_hdmi_pltfm_bind(struct device *dev, struct device *master, | 164 | static int dw_hdmi_imx_bind(struct device *dev, struct device *master, |
167 | void *data) | 165 | void *data) |
168 | { | 166 | { |
169 | struct platform_device *pdev = to_platform_device(dev); | 167 | struct platform_device *pdev = to_platform_device(dev); |
170 | const struct imx_hdmi_plat_data *plat_data; | 168 | const struct dw_hdmi_plat_data *plat_data; |
171 | const struct of_device_id *match; | 169 | const struct of_device_id *match; |
172 | struct drm_device *drm = data; | 170 | struct drm_device *drm = data; |
173 | struct drm_encoder *encoder; | 171 | struct drm_encoder *encoder; |
174 | struct imx_hdmi_priv *hdmi; | 172 | struct imx_hdmi *hdmi; |
175 | struct resource *iores; | 173 | struct resource *iores; |
176 | int irq; | 174 | int irq; |
177 | int ret; | 175 | int ret; |
@@ -183,7 +181,7 @@ static int imx_hdmi_pltfm_bind(struct device *dev, struct device *master, | |||
183 | if (!hdmi) | 181 | if (!hdmi) |
184 | return -ENOMEM; | 182 | return -ENOMEM; |
185 | 183 | ||
186 | match = of_match_node(imx_hdmi_dt_ids, pdev->dev.of_node); | 184 | match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node); |
187 | plat_data = match->data; | 185 | plat_data = match->data; |
188 | hdmi->dev = &pdev->dev; | 186 | hdmi->dev = &pdev->dev; |
189 | encoder = &hdmi->encoder; | 187 | encoder = &hdmi->encoder; |
@@ -208,53 +206,53 @@ static int imx_hdmi_pltfm_bind(struct device *dev, struct device *master, | |||
208 | if (encoder->possible_crtcs == 0) | 206 | if (encoder->possible_crtcs == 0) |
209 | return -EPROBE_DEFER; | 207 | return -EPROBE_DEFER; |
210 | 208 | ||
211 | ret = imx_hdmi_parse_dt(hdmi); | 209 | ret = dw_hdmi_imx_parse_dt(hdmi); |
212 | if (ret < 0) | 210 | if (ret < 0) |
213 | return ret; | 211 | return ret; |
214 | 212 | ||
215 | drm_encoder_helper_add(encoder, &imx_hdmi_encoder_helper_funcs); | 213 | drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs); |
216 | drm_encoder_init(drm, encoder, &imx_hdmi_encoder_funcs, | 214 | drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs, |
217 | DRM_MODE_ENCODER_TMDS); | 215 | DRM_MODE_ENCODER_TMDS); |
218 | 216 | ||
219 | return imx_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data); | 217 | return dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data); |
220 | } | 218 | } |
221 | 219 | ||
222 | static void imx_hdmi_pltfm_unbind(struct device *dev, struct device *master, | 220 | static void dw_hdmi_imx_unbind(struct device *dev, struct device *master, |
223 | void *data) | 221 | void *data) |
224 | { | 222 | { |
225 | return imx_hdmi_unbind(dev, master, data); | 223 | return dw_hdmi_unbind(dev, master, data); |
226 | } | 224 | } |
227 | 225 | ||
228 | static const struct component_ops imx_hdmi_ops = { | 226 | static const struct component_ops dw_hdmi_imx_ops = { |
229 | .bind = imx_hdmi_pltfm_bind, | 227 | .bind = dw_hdmi_imx_bind, |
230 | .unbind = imx_hdmi_pltfm_unbind, | 228 | .unbind = dw_hdmi_imx_unbind, |
231 | }; | 229 | }; |
232 | 230 | ||
233 | static int imx_hdmi_probe(struct platform_device *pdev) | 231 | static int dw_hdmi_imx_probe(struct platform_device *pdev) |
234 | { | 232 | { |
235 | return component_add(&pdev->dev, &imx_hdmi_ops); | 233 | return component_add(&pdev->dev, &dw_hdmi_imx_ops); |
236 | } | 234 | } |
237 | 235 | ||
238 | static int imx_hdmi_remove(struct platform_device *pdev) | 236 | static int dw_hdmi_imx_remove(struct platform_device *pdev) |
239 | { | 237 | { |
240 | component_del(&pdev->dev, &imx_hdmi_ops); | 238 | component_del(&pdev->dev, &dw_hdmi_imx_ops); |
241 | 239 | ||
242 | return 0; | 240 | return 0; |
243 | } | 241 | } |
244 | 242 | ||
245 | static struct platform_driver imx_hdmi_pltfm_driver = { | 243 | static struct platform_driver dw_hdmi_imx_platform_driver = { |
246 | .probe = imx_hdmi_probe, | 244 | .probe = dw_hdmi_imx_probe, |
247 | .remove = imx_hdmi_remove, | 245 | .remove = dw_hdmi_imx_remove, |
248 | .driver = { | 246 | .driver = { |
249 | .name = "hdmi-imx", | 247 | .name = "dwhdmi-imx", |
250 | .of_match_table = imx_hdmi_dt_ids, | 248 | .of_match_table = dw_hdmi_imx_dt_ids, |
251 | }, | 249 | }, |
252 | }; | 250 | }; |
253 | 251 | ||
254 | module_platform_driver(imx_hdmi_pltfm_driver); | 252 | module_platform_driver(dw_hdmi_imx_platform_driver); |
255 | 253 | ||
256 | MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>"); | 254 | MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>"); |
257 | MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>"); | 255 | MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>"); |
258 | MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension"); | 256 | MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension"); |
259 | MODULE_LICENSE("GPL"); | 257 | MODULE_LICENSE("GPL"); |
260 | MODULE_ALIAS("platform:hdmi-imx"); | 258 | MODULE_ALIAS("platform:dwhdmi-imx"); |
diff --git a/include/drm/bridge/dw_hdmi.h b/include/drm/bridge/dw_hdmi.h new file mode 100644 index 000000000000..b64e58a92057 --- /dev/null +++ b/include/drm/bridge/dw_hdmi.h | |||
@@ -0,0 +1,60 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | */ | ||
9 | |||
10 | #ifndef __DW_HDMI__ | ||
11 | #define __DW_HDMI__ | ||
12 | |||
13 | #include <drm/drmP.h> | ||
14 | |||
15 | enum { | ||
16 | DW_HDMI_RES_8, | ||
17 | DW_HDMI_RES_10, | ||
18 | DW_HDMI_RES_12, | ||
19 | DW_HDMI_RES_MAX, | ||
20 | }; | ||
21 | |||
22 | enum dw_hdmi_devtype { | ||
23 | IMX6Q_HDMI, | ||
24 | IMX6DL_HDMI, | ||
25 | }; | ||
26 | |||
27 | struct dw_hdmi_mpll_config { | ||
28 | unsigned long mpixelclock; | ||
29 | struct { | ||
30 | u16 cpce; | ||
31 | u16 gmp; | ||
32 | } res[DW_HDMI_RES_MAX]; | ||
33 | }; | ||
34 | |||
35 | struct dw_hdmi_curr_ctrl { | ||
36 | unsigned long mpixelclock; | ||
37 | u16 curr[DW_HDMI_RES_MAX]; | ||
38 | }; | ||
39 | |||
40 | struct dw_hdmi_sym_term { | ||
41 | unsigned long mpixelclock; | ||
42 | u16 sym_ctr; /*clock symbol and transmitter control*/ | ||
43 | u16 term; /*transmission termination value*/ | ||
44 | }; | ||
45 | |||
46 | struct dw_hdmi_plat_data { | ||
47 | enum dw_hdmi_devtype dev_type; | ||
48 | const struct dw_hdmi_mpll_config *mpll_cfg; | ||
49 | const struct dw_hdmi_curr_ctrl *cur_ctr; | ||
50 | const struct dw_hdmi_sym_term *sym_term; | ||
51 | enum drm_mode_status (*mode_valid)(struct drm_connector *connector, | ||
52 | struct drm_display_mode *mode); | ||
53 | }; | ||
54 | |||
55 | void dw_hdmi_unbind(struct device *dev, struct device *master, void *data); | ||
56 | int dw_hdmi_bind(struct device *dev, struct device *master, | ||
57 | void *data, struct drm_encoder *encoder, | ||
58 | struct resource *iores, int irq, | ||
59 | const struct dw_hdmi_plat_data *plat_data); | ||
60 | #endif /* __IMX_HDMI_H__ */ | ||