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-rw-r--r--arch/arm/configs/at91sam9260_9g20_defconfig145
-rw-r--r--arch/arm/mach-at91/Kconfig.non_dt117
-rw-r--r--arch/arm/mach-at91/Makefile1
-rw-r--r--arch/arm/mach-at91/at91sam9260.c397
-rw-r--r--arch/arm/mach-at91/at91sam9260_devices.c1364
5 files changed, 0 insertions, 2024 deletions
diff --git a/arch/arm/configs/at91sam9260_9g20_defconfig b/arch/arm/configs/at91sam9260_9g20_defconfig
deleted file mode 100644
index 3ada05d639ad..000000000000
--- a/arch/arm/configs/at91sam9260_9g20_defconfig
+++ /dev/null
@@ -1,145 +0,0 @@
1# CONFIG_LOCALVERSION_AUTO is not set
2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y
4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_BLK_DEV_INITRD=y
6CONFIG_EMBEDDED=y
7CONFIG_SLAB=y
8CONFIG_MODULES=y
9CONFIG_MODULE_UNLOAD=y
10# CONFIG_BLK_DEV_BSG is not set
11# CONFIG_IOSCHED_DEADLINE is not set
12# CONFIG_IOSCHED_CFQ is not set
13CONFIG_ARCH_AT91=y
14CONFIG_ARCH_AT91SAM9260=y
15CONFIG_MACH_AT91SAM9260EK=y
16CONFIG_MACH_CAM60=y
17CONFIG_MACH_SAM9_L9260=y
18CONFIG_MACH_AFEB9260=y
19CONFIG_MACH_CPU9260=y
20CONFIG_MACH_FLEXIBITY=y
21CONFIG_MACH_AT91SAM9G20EK=y
22CONFIG_MACH_AT91SAM9G20EK_2MMC=y
23CONFIG_MACH_CPU9G20=y
24CONFIG_MACH_ACMENETUSFOXG20=y
25CONFIG_MACH_PORTUXG20=y
26CONFIG_MACH_STAMP9G20=y
27CONFIG_MACH_PCONTROL_G20=y
28CONFIG_MACH_GSIA18S=y
29CONFIG_MACH_SNAPPER_9260=y
30CONFIG_MACH_AT91SAM9_DT=y
31CONFIG_AT91_SLOW_CLOCK=y
32# CONFIG_ARM_THUMB is not set
33CONFIG_AEABI=y
34CONFIG_ZBOOT_ROM_TEXT=0x0
35CONFIG_ZBOOT_ROM_BSS=0x0
36CONFIG_ARM_APPENDED_DTB=y
37CONFIG_ARM_ATAG_DTB_COMPAT=y
38CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
39CONFIG_AUTO_ZRELADDR=y
40CONFIG_NET=y
41CONFIG_PACKET=y
42CONFIG_UNIX=y
43CONFIG_INET=y
44CONFIG_IP_PNP=y
45CONFIG_IP_PNP_DHCP=y
46CONFIG_IP_PNP_BOOTP=y
47# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
48# CONFIG_INET_XFRM_MODE_TUNNEL is not set
49# CONFIG_INET_XFRM_MODE_BEET is not set
50# CONFIG_INET_LRO is not set
51# CONFIG_IPV6 is not set
52CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
53CONFIG_DEVTMPFS=y
54CONFIG_DEVTMPFS_MOUNT=y
55CONFIG_MTD=y
56CONFIG_MTD_CMDLINE_PARTS=y
57CONFIG_MTD_BLOCK=y
58CONFIG_MTD_DATAFLASH=y
59CONFIG_MTD_NAND=y
60CONFIG_MTD_NAND_ATMEL=y
61CONFIG_MTD_UBI=y
62CONFIG_BLK_DEV_LOOP=y
63CONFIG_BLK_DEV_RAM=y
64CONFIG_BLK_DEV_RAM_SIZE=8192
65CONFIG_EEPROM_AT25=y
66CONFIG_SCSI=y
67CONFIG_BLK_DEV_SD=y
68# CONFIG_SCSI_LOWLEVEL is not set
69CONFIG_NETDEVICES=y
70CONFIG_MACB=y
71# CONFIG_NET_VENDOR_BROADCOM is not set
72# CONFIG_NET_VENDOR_FARADAY is not set
73# CONFIG_NET_VENDOR_INTEL is not set
74# CONFIG_NET_VENDOR_MARVELL is not set
75# CONFIG_NET_VENDOR_MICREL is not set
76# CONFIG_NET_VENDOR_MICROCHIP is not set
77# CONFIG_NET_VENDOR_NATSEMI is not set
78# CONFIG_NET_VENDOR_SEEQ is not set
79# CONFIG_NET_VENDOR_SMSC is not set
80# CONFIG_NET_VENDOR_STMICRO is not set
81CONFIG_SMSC_PHY=y
82# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
83CONFIG_KEYBOARD_GPIO=y
84# CONFIG_INPUT_MOUSE is not set
85CONFIG_SERIAL_ATMEL=y
86CONFIG_SERIAL_ATMEL_CONSOLE=y
87CONFIG_HW_RANDOM=y
88CONFIG_I2C=y
89CONFIG_I2C_CHARDEV=y
90CONFIG_I2C_GPIO=y
91CONFIG_SPI=y
92CONFIG_SPI_ATMEL=y
93CONFIG_SPI_SPIDEV=y
94CONFIG_GPIO_SYSFS=y
95CONFIG_POWER_SUPPLY=y
96CONFIG_POWER_RESET=y
97# CONFIG_HWMON is not set
98CONFIG_WATCHDOG=y
99CONFIG_WATCHDOG_NOWAYOUT=y
100CONFIG_AT91SAM9X_WATCHDOG=y
101CONFIG_SOUND=y
102CONFIG_SND=y
103CONFIG_SND_SEQUENCER=y
104CONFIG_SND_MIXER_OSS=y
105CONFIG_SND_PCM_OSS=y
106CONFIG_SND_SEQUENCER_OSS=y
107# CONFIG_SND_VERBOSE_PROCFS is not set
108CONFIG_USB=y
109CONFIG_USB_MON=y
110CONFIG_USB_OHCI_HCD=y
111CONFIG_USB_STORAGE=y
112CONFIG_USB_GADGET=y
113CONFIG_USB_AT91=y
114CONFIG_USB_G_SERIAL=y
115CONFIG_MMC=y
116CONFIG_MMC_ATMELMCI=y
117CONFIG_MMC_SPI=y
118CONFIG_NEW_LEDS=y
119CONFIG_LEDS_CLASS=y
120CONFIG_LEDS_GPIO=y
121CONFIG_LEDS_TRIGGERS=y
122CONFIG_LEDS_TRIGGER_TIMER=y
123CONFIG_LEDS_TRIGGER_HEARTBEAT=y
124CONFIG_RTC_CLASS=y
125CONFIG_RTC_DRV_RV3029C2=y
126CONFIG_RTC_DRV_AT91SAM9=y
127CONFIG_IIO=y
128CONFIG_AT91_ADC=y
129CONFIG_EXT4_FS=y
130CONFIG_VFAT_FS=y
131CONFIG_TMPFS=y
132CONFIG_UBIFS_FS=y
133CONFIG_UBIFS_FS_ADVANCED_COMPR=y
134CONFIG_NFS_FS=y
135CONFIG_ROOT_NFS=y
136CONFIG_NLS_CODEPAGE_437=y
137CONFIG_NLS_CODEPAGE_850=y
138CONFIG_NLS_ISO8859_1=y
139CONFIG_NLS_ISO8859_15=y
140CONFIG_NLS_UTF8=y
141CONFIG_DEBUG_INFO=y
142# CONFIG_ENABLE_WARN_DEPRECATED is not set
143# CONFIG_FTRACE is not set
144CONFIG_DEBUG_LL=y
145CONFIG_EARLY_PRINTK=y
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index a9458234ab23..079772047541 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -15,12 +15,6 @@ config ARCH_AT91RM9200
15 select AT91_USE_OLD_CLK 15 select AT91_USE_OLD_CLK
16 select OLD_IRQ_AT91 16 select OLD_IRQ_AT91
17 17
18config ARCH_AT91SAM9260
19 bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
20 select SOC_AT91SAM9260
21 select AT91_USE_OLD_CLK
22 select OLD_IRQ_AT91
23
24config ARCH_AT91SAM9261 18config ARCH_AT91SAM9261
25 bool "AT91SAM9261 or AT91SAM9G10" 19 bool "AT91SAM9261 or AT91SAM9G10"
26 select SOC_AT91SAM9261 20 select SOC_AT91SAM9261
@@ -29,10 +23,6 @@ config ARCH_AT91SAM9261
29 23
30endchoice 24endchoice
31 25
32config ARCH_AT91SAM9G20
33 bool
34 select ARCH_AT91SAM9260
35
36config ARCH_AT91SAM9G10 26config ARCH_AT91SAM9G10
37 bool 27 bool
38 select ARCH_AT91SAM9261 28 select ARCH_AT91SAM9261
@@ -123,113 +113,6 @@ endif
123 113
124# ---------------------------------------------------------- 114# ----------------------------------------------------------
125 115
126if ARCH_AT91SAM9260
127
128comment "AT91SAM9260 Variants"
129
130comment "AT91SAM9260 / AT91SAM9XE Board Type"
131
132config MACH_AT91SAM9260EK
133 bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
134 select HAVE_AT91_DATAFLASH_CARD
135 help
136 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
137 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
138
139config MACH_CAM60
140 bool "KwikByte KB9260 (CAM60) board"
141 help
142 Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260.
143 <http://www.kwikbyte.com/KB9260.html>
144
145config MACH_SAM9_L9260
146 bool "Olimex SAM9-L9260 board"
147 select HAVE_AT91_DATAFLASH_CARD
148 help
149 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
150 <http://www.olimex.com/dev/sam9-L9260.html>
151
152config MACH_AFEB9260
153 bool "Custom afeb9260 board v1"
154 help
155 Select this if you are using custom afeb9260 board based on
156 open hardware design. Select this for revision 1 of the board.
157 <svn://194.85.238.22/home/users/george/svn/arm9eb>
158 <http://groups.google.com/group/arm9fpga-evolution-board>
159
160config MACH_CPU9260
161 bool "Eukrea CPU9260 board"
162 help
163 Select this if you are using a Eukrea Electromatique's
164 CPU9260 Board <http://www.eukrea.com/>
165
166config MACH_FLEXIBITY
167 bool "Flexibity Connect board"
168 help
169 Select this if you are using Flexibity Connect board
170 <http://www.flexibity.com>
171
172comment "AT91SAM9G20 Board Type"
173
174config MACH_AT91SAM9G20EK
175 bool "Atmel AT91SAM9G20-EK Evaluation Kit"
176 select HAVE_AT91_DATAFLASH_CARD
177 help
178 Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit
179 that embeds only one SD/MMC slot.
180
181config MACH_AT91SAM9G20EK_2MMC
182 depends on MACH_AT91SAM9G20EK
183 bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots"
184 help
185 Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
186 with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
187 onwards.
188 <http://www.atmel.com/tools/SAM9G20-EK.aspx>
189
190config MACH_CPU9G20
191 bool "Eukrea CPU9G20 board"
192 help
193 Select this if you are using a Eukrea Electromatique's
194 CPU9G20 Board <http://www.eukrea.com/>
195
196config MACH_PORTUXG20
197 bool "taskit PortuxG20"
198 help
199 Select this if you are using taskit's PortuxG20.
200 <http://www.taskit.de/en/>
201
202config MACH_STAMP9G20
203 bool "taskit Stamp9G20 CPU module"
204 help
205 Select this if you are using taskit's Stamp9G20 CPU module on its
206 evaluation board.
207 <http://www.taskit.de/en/>
208
209config MACH_PCONTROL_G20
210 bool "PControl G20 CPU module"
211 help
212 Select this if you are using taskit's Stamp9G20 CPU module on this
213 carrier board, being the decentralized unit of a building automation
214 system; featuring nvram, eth-switch, iso-rs485, display, io
215
216config MACH_GSIA18S
217 bool "GS_IA18_S board"
218 help
219 This enables support for the GS_IA18_S board
220 produced by GeoSIG Ltd company. This is an internet accelerograph.
221 <http://www.geosig.com>
222
223config MACH_SNAPPER_9260
224 bool "Bluewater Systems Snapper 9260/9G20 module"
225 help
226 Select this if you are using the Bluewater Systems Snapper 9260 or
227 Snapper 9G20 modules.
228 <http://www.bluewatersys.com/>
229endif
230
231# ----------------------------------------------------------
232
233if ARCH_AT91SAM9261 116if ARCH_AT91SAM9261
234 117
235comment "AT91SAM9261 Board Type" 118comment "AT91SAM9261 Board Type"
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 88d49248fc5c..bfe918b5fbc5 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -21,7 +21,6 @@ obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
21obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o 21obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
22 22
23obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o 23obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
24obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
25obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o 24obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
26 25
27# AT91RM9200 board-specific support 26# AT91RM9200 board-specific support
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index aab1f969a7c3..78137c24d90b 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -10,305 +10,13 @@
10 * 10 *
11 */ 11 */
12 12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/clk/at91_pmc.h>
16
17#include <asm/proc-fns.h>
18#include <asm/irq.h>
19#include <asm/mach/arch.h>
20#include <asm/mach/map.h>
21#include <asm/system_misc.h> 13#include <asm/system_misc.h>
22#include <mach/cpu.h> 14#include <mach/cpu.h>
23#include <mach/at91_dbgu.h> 15#include <mach/at91_dbgu.h>
24#include <mach/at91sam9260.h>
25#include <mach/hardware.h> 16#include <mach/hardware.h>
26 17
27#include "at91_aic.h"
28#include "soc.h" 18#include "soc.h"
29#include "generic.h" 19#include "generic.h"
30#include "sam9_smc.h"
31#include "pm.h"
32
33#if defined(CONFIG_OLD_CLK_AT91)
34#include "clock.h"
35/* --------------------------------------------------------------------
36 * Clocks
37 * -------------------------------------------------------------------- */
38
39/*
40 * The peripheral clocks.
41 */
42static struct clk pioA_clk = {
43 .name = "pioA_clk",
44 .pmc_mask = 1 << AT91SAM9260_ID_PIOA,
45 .type = CLK_TYPE_PERIPHERAL,
46};
47static struct clk pioB_clk = {
48 .name = "pioB_clk",
49 .pmc_mask = 1 << AT91SAM9260_ID_PIOB,
50 .type = CLK_TYPE_PERIPHERAL,
51};
52static struct clk pioC_clk = {
53 .name = "pioC_clk",
54 .pmc_mask = 1 << AT91SAM9260_ID_PIOC,
55 .type = CLK_TYPE_PERIPHERAL,
56};
57static struct clk adc_clk = {
58 .name = "adc_clk",
59 .pmc_mask = 1 << AT91SAM9260_ID_ADC,
60 .type = CLK_TYPE_PERIPHERAL,
61};
62
63static struct clk adc_op_clk = {
64 .name = "adc_op_clk",
65 .type = CLK_TYPE_PERIPHERAL,
66 .rate_hz = 5000000,
67};
68
69static struct clk usart0_clk = {
70 .name = "usart0_clk",
71 .pmc_mask = 1 << AT91SAM9260_ID_US0,
72 .type = CLK_TYPE_PERIPHERAL,
73};
74static struct clk usart1_clk = {
75 .name = "usart1_clk",
76 .pmc_mask = 1 << AT91SAM9260_ID_US1,
77 .type = CLK_TYPE_PERIPHERAL,
78};
79static struct clk usart2_clk = {
80 .name = "usart2_clk",
81 .pmc_mask = 1 << AT91SAM9260_ID_US2,
82 .type = CLK_TYPE_PERIPHERAL,
83};
84static struct clk mmc_clk = {
85 .name = "mci_clk",
86 .pmc_mask = 1 << AT91SAM9260_ID_MCI,
87 .type = CLK_TYPE_PERIPHERAL,
88};
89static struct clk udc_clk = {
90 .name = "udc_clk",
91 .pmc_mask = 1 << AT91SAM9260_ID_UDP,
92 .type = CLK_TYPE_PERIPHERAL,
93};
94static struct clk twi_clk = {
95 .name = "twi_clk",
96 .pmc_mask = 1 << AT91SAM9260_ID_TWI,
97 .type = CLK_TYPE_PERIPHERAL,
98};
99static struct clk spi0_clk = {
100 .name = "spi0_clk",
101 .pmc_mask = 1 << AT91SAM9260_ID_SPI0,
102 .type = CLK_TYPE_PERIPHERAL,
103};
104static struct clk spi1_clk = {
105 .name = "spi1_clk",
106 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
107 .type = CLK_TYPE_PERIPHERAL,
108};
109static struct clk ssc_clk = {
110 .name = "ssc_clk",
111 .pmc_mask = 1 << AT91SAM9260_ID_SSC,
112 .type = CLK_TYPE_PERIPHERAL,
113};
114static struct clk tc0_clk = {
115 .name = "tc0_clk",
116 .pmc_mask = 1 << AT91SAM9260_ID_TC0,
117 .type = CLK_TYPE_PERIPHERAL,
118};
119static struct clk tc1_clk = {
120 .name = "tc1_clk",
121 .pmc_mask = 1 << AT91SAM9260_ID_TC1,
122 .type = CLK_TYPE_PERIPHERAL,
123};
124static struct clk tc2_clk = {
125 .name = "tc2_clk",
126 .pmc_mask = 1 << AT91SAM9260_ID_TC2,
127 .type = CLK_TYPE_PERIPHERAL,
128};
129static struct clk ohci_clk = {
130 .name = "ohci_clk",
131 .pmc_mask = 1 << AT91SAM9260_ID_UHP,
132 .type = CLK_TYPE_PERIPHERAL,
133};
134static struct clk macb_clk = {
135 .name = "pclk",
136 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
137 .type = CLK_TYPE_PERIPHERAL,
138};
139static struct clk isi_clk = {
140 .name = "isi_clk",
141 .pmc_mask = 1 << AT91SAM9260_ID_ISI,
142 .type = CLK_TYPE_PERIPHERAL,
143};
144static struct clk usart3_clk = {
145 .name = "usart3_clk",
146 .pmc_mask = 1 << AT91SAM9260_ID_US3,
147 .type = CLK_TYPE_PERIPHERAL,
148};
149static struct clk usart4_clk = {
150 .name = "usart4_clk",
151 .pmc_mask = 1 << AT91SAM9260_ID_US4,
152 .type = CLK_TYPE_PERIPHERAL,
153};
154static struct clk usart5_clk = {
155 .name = "usart5_clk",
156 .pmc_mask = 1 << AT91SAM9260_ID_US5,
157 .type = CLK_TYPE_PERIPHERAL,
158};
159static struct clk tc3_clk = {
160 .name = "tc3_clk",
161 .pmc_mask = 1 << AT91SAM9260_ID_TC3,
162 .type = CLK_TYPE_PERIPHERAL,
163};
164static struct clk tc4_clk = {
165 .name = "tc4_clk",
166 .pmc_mask = 1 << AT91SAM9260_ID_TC4,
167 .type = CLK_TYPE_PERIPHERAL,
168};
169static struct clk tc5_clk = {
170 .name = "tc5_clk",
171 .pmc_mask = 1 << AT91SAM9260_ID_TC5,
172 .type = CLK_TYPE_PERIPHERAL,
173};
174
175static struct clk *periph_clocks[] __initdata = {
176 &pioA_clk,
177 &pioB_clk,
178 &pioC_clk,
179 &adc_clk,
180 &adc_op_clk,
181 &usart0_clk,
182 &usart1_clk,
183 &usart2_clk,
184 &mmc_clk,
185 &udc_clk,
186 &twi_clk,
187 &spi0_clk,
188 &spi1_clk,
189 &ssc_clk,
190 &tc0_clk,
191 &tc1_clk,
192 &tc2_clk,
193 &ohci_clk,
194 &macb_clk,
195 &isi_clk,
196 &usart3_clk,
197 &usart4_clk,
198 &usart5_clk,
199 &tc3_clk,
200 &tc4_clk,
201 &tc5_clk,
202 // irq0 .. irq2
203};
204
205static struct clk_lookup periph_clocks_lookups[] = {
206 /* One additional fake clock for macb_hclk */
207 CLKDEV_CON_ID("hclk", &macb_clk),
208 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
209 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
210 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
211 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
212 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
213 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
214 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
215 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
216 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc_clk),
217 CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc_clk),
218 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
219 CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk),
220 /* more usart lookup table for DT entries */
221 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
222 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
223 CLKDEV_CON_DEV_ID("usart", "fffb4000.serial", &usart1_clk),
224 CLKDEV_CON_DEV_ID("usart", "fffb8000.serial", &usart2_clk),
225 CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
226 CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
227 CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
228 CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
229 /* more tc lookup table for DT entries */
230 CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
231 CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
232 CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
233 CLKDEV_CON_DEV_ID("t0_clk", "fffdc000.timer", &tc3_clk),
234 CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
235 CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
236 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
237 CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
238 CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
239 CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
240 /* fake hclk clock */
241 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
242 CLKDEV_CON_ID("pioA", &pioA_clk),
243 CLKDEV_CON_ID("pioB", &pioB_clk),
244 CLKDEV_CON_ID("pioC", &pioC_clk),
245 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
246 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
247 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
248};
249
250static struct clk_lookup usart_clocks_lookups[] = {
251 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
252 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
253 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
254 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
255 CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
256 CLKDEV_CON_DEV_ID("usart", "atmel_usart.5", &usart4_clk),
257 CLKDEV_CON_DEV_ID("usart", "atmel_usart.6", &usart5_clk),
258};
259
260/*
261 * The two programmable clocks.
262 * You must configure pin multiplexing to bring these signals out.
263 */
264static struct clk pck0 = {
265 .name = "pck0",
266 .pmc_mask = AT91_PMC_PCK0,
267 .type = CLK_TYPE_PROGRAMMABLE,
268 .id = 0,
269};
270static struct clk pck1 = {
271 .name = "pck1",
272 .pmc_mask = AT91_PMC_PCK1,
273 .type = CLK_TYPE_PROGRAMMABLE,
274 .id = 1,
275};
276
277static void __init at91sam9260_register_clocks(void)
278{
279 int i;
280
281 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
282 clk_register(periph_clocks[i]);
283
284 clkdev_add_table(periph_clocks_lookups,
285 ARRAY_SIZE(periph_clocks_lookups));
286 clkdev_add_table(usart_clocks_lookups,
287 ARRAY_SIZE(usart_clocks_lookups));
288
289 clk_register(&pck0);
290 clk_register(&pck1);
291}
292#else
293#define at91sam9260_register_clocks NULL
294#endif
295
296/* --------------------------------------------------------------------
297 * GPIO
298 * -------------------------------------------------------------------- */
299
300static struct at91_gpio_bank at91sam9260_gpio[] __initdata = {
301 {
302 .id = AT91SAM9260_ID_PIOA,
303 .regbase = AT91SAM9260_BASE_PIOA,
304 }, {
305 .id = AT91SAM9260_ID_PIOB,
306 .regbase = AT91SAM9260_BASE_PIOB,
307 }, {
308 .id = AT91SAM9260_ID_PIOC,
309 .regbase = AT91SAM9260_BASE_PIOC,
310 }
311};
312 20
313/* -------------------------------------------------------------------- 21/* --------------------------------------------------------------------
314 * AT91SAM9260 processor initialization 22 * AT91SAM9260 processor initialization
@@ -340,119 +48,14 @@ static void __init at91sam9260_map_io(void)
340 at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE); 48 at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE);
341} 49}
342 50
343static void __init at91sam9260_ioremap_registers(void)
344{
345 at91_ioremap_ramc(0, AT91SAM9260_BASE_SDRAMC, 512);
346 at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
347 at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
348 at91_ioremap_matrix(AT91SAM9260_BASE_MATRIX);
349 at91_pm_set_standby(at91sam9_sdram_standby);
350}
351
352static void __init at91sam9260_initialize(void) 51static void __init at91sam9260_initialize(void)
353{ 52{
354 arm_pm_idle = at91sam9_idle; 53 arm_pm_idle = at91sam9_idle;
355 54
356 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); 55 at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT);
357
358 /* Register GPIO subsystem */
359 at91_gpio_init(at91sam9260_gpio, 3);
360}
361
362static struct resource rstc_resources[] = {
363 [0] = {
364 .start = AT91SAM9260_BASE_RSTC,
365 .end = AT91SAM9260_BASE_RSTC + SZ_16 - 1,
366 .flags = IORESOURCE_MEM,
367 },
368 [1] = {
369 .start = AT91SAM9260_BASE_SDRAMC,
370 .end = AT91SAM9260_BASE_SDRAMC + SZ_512 - 1,
371 .flags = IORESOURCE_MEM,
372 },
373};
374
375static struct platform_device rstc_device = {
376 .name = "at91-sam9260-reset",
377 .resource = rstc_resources,
378 .num_resources = ARRAY_SIZE(rstc_resources),
379};
380
381static struct resource shdwc_resources[] = {
382 [0] = {
383 .start = AT91SAM9260_BASE_SHDWC,
384 .end = AT91SAM9260_BASE_SHDWC + SZ_16 - 1,
385 .flags = IORESOURCE_MEM,
386 },
387};
388
389static struct platform_device shdwc_device = {
390 .name = "at91-poweroff",
391 .resource = shdwc_resources,
392 .num_resources = ARRAY_SIZE(shdwc_resources),
393};
394
395static void __init at91sam9260_register_devices(void)
396{
397 platform_device_register(&rstc_device);
398 platform_device_register(&shdwc_device);
399}
400
401/* --------------------------------------------------------------------
402 * Interrupt initialization
403 * -------------------------------------------------------------------- */
404
405/*
406 * The default interrupt priority levels (0 = lowest, 7 = highest).
407 */
408static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
409 7, /* Advanced Interrupt Controller */
410 7, /* System Peripherals */
411 1, /* Parallel IO Controller A */
412 1, /* Parallel IO Controller B */
413 1, /* Parallel IO Controller C */
414 0, /* Analog-to-Digital Converter */
415 5, /* USART 0 */
416 5, /* USART 1 */
417 5, /* USART 2 */
418 0, /* Multimedia Card Interface */
419 2, /* USB Device Port */
420 6, /* Two-Wire Interface */
421 5, /* Serial Peripheral Interface 0 */
422 5, /* Serial Peripheral Interface 1 */
423 5, /* Serial Synchronous Controller */
424 0,
425 0,
426 0, /* Timer Counter 0 */
427 0, /* Timer Counter 1 */
428 0, /* Timer Counter 2 */
429 2, /* USB Host port */
430 3, /* Ethernet */
431 0, /* Image Sensor Interface */
432 5, /* USART 3 */
433 5, /* USART 4 */
434 5, /* USART 5 */
435 0, /* Timer Counter 3 */
436 0, /* Timer Counter 4 */
437 0, /* Timer Counter 5 */
438 0, /* Advanced Interrupt Controller */
439 0, /* Advanced Interrupt Controller */
440 0, /* Advanced Interrupt Controller */
441};
442
443static void __init at91sam9260_init_time(void)
444{
445 at91sam926x_pit_init(NR_IRQS_LEGACY + AT91_ID_SYS);
446} 56}
447 57
448AT91_SOC_START(at91sam9260) 58AT91_SOC_START(at91sam9260)
449 .map_io = at91sam9260_map_io, 59 .map_io = at91sam9260_map_io,
450 .default_irq_priority = at91sam9260_default_irq_priority,
451 .extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
452 | (1 << AT91SAM9260_ID_IRQ2),
453 .ioremap_registers = at91sam9260_ioremap_registers,
454 .register_clocks = at91sam9260_register_clocks,
455 .register_devices = at91sam9260_register_devices,
456 .init = at91sam9260_initialize, 60 .init = at91sam9260_initialize,
457 .init_time = at91sam9260_init_time,
458AT91_SOC_END 61AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
deleted file mode 100644
index ef88e0fe4e80..000000000000
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ /dev/null
@@ -1,1364 +0,0 @@
1/*
2 * arch/arm/mach-at91/at91sam9260_devices.c
3 *
4 * Copyright (C) 2006 Atmel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12#include <asm/mach/arch.h>
13#include <asm/mach/map.h>
14
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17#include <linux/platform_device.h>
18#include <linux/i2c-gpio.h>
19
20#include <linux/platform_data/at91_adc.h>
21
22#include <mach/cpu.h>
23#include <mach/at91sam9260.h>
24#include <mach/at91sam9260_matrix.h>
25#include <mach/at91_matrix.h>
26#include <mach/at91sam9_smc.h>
27#include <mach/hardware.h>
28
29#include "board.h"
30#include "generic.h"
31#include "gpio.h"
32
33/* --------------------------------------------------------------------
34 * USB Host
35 * -------------------------------------------------------------------- */
36
37#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
38static u64 ohci_dmamask = DMA_BIT_MASK(32);
39static struct at91_usbh_data usbh_data;
40
41static struct resource usbh_resources[] = {
42 [0] = {
43 .start = AT91SAM9260_UHP_BASE,
44 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
45 .flags = IORESOURCE_MEM,
46 },
47 [1] = {
48 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
49 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
50 .flags = IORESOURCE_IRQ,
51 },
52};
53
54static struct platform_device at91_usbh_device = {
55 .name = "at91_ohci",
56 .id = -1,
57 .dev = {
58 .dma_mask = &ohci_dmamask,
59 .coherent_dma_mask = DMA_BIT_MASK(32),
60 .platform_data = &usbh_data,
61 },
62 .resource = usbh_resources,
63 .num_resources = ARRAY_SIZE(usbh_resources),
64};
65
66void __init at91_add_device_usbh(struct at91_usbh_data *data)
67{
68 int i;
69
70 if (!data)
71 return;
72
73 /* Enable overcurrent notification */
74 for (i = 0; i < data->ports; i++) {
75 if (gpio_is_valid(data->overcurrent_pin[i]))
76 at91_set_gpio_input(data->overcurrent_pin[i], 1);
77 }
78
79 usbh_data = *data;
80 platform_device_register(&at91_usbh_device);
81}
82#else
83void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84#endif
85
86
87/* --------------------------------------------------------------------
88 * USB Device (Gadget)
89 * -------------------------------------------------------------------- */
90
91#if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
92static struct at91_udc_data udc_data;
93
94static struct resource udc_resources[] = {
95 [0] = {
96 .start = AT91SAM9260_BASE_UDP,
97 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
98 .flags = IORESOURCE_MEM,
99 },
100 [1] = {
101 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
102 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
103 .flags = IORESOURCE_IRQ,
104 },
105};
106
107static struct platform_device at91_udc_device = {
108 .name = "at91_udc",
109 .id = -1,
110 .dev = {
111 .platform_data = &udc_data,
112 },
113 .resource = udc_resources,
114 .num_resources = ARRAY_SIZE(udc_resources),
115};
116
117void __init at91_add_device_udc(struct at91_udc_data *data)
118{
119 if (!data)
120 return;
121
122 if (gpio_is_valid(data->vbus_pin)) {
123 at91_set_gpio_input(data->vbus_pin, 0);
124 at91_set_deglitch(data->vbus_pin, 1);
125 }
126
127 /* Pullup pin is handled internally by USB device peripheral */
128
129 udc_data = *data;
130 platform_device_register(&at91_udc_device);
131}
132#else
133void __init at91_add_device_udc(struct at91_udc_data *data) {}
134#endif
135
136
137/* --------------------------------------------------------------------
138 * Ethernet
139 * -------------------------------------------------------------------- */
140
141#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
142static u64 eth_dmamask = DMA_BIT_MASK(32);
143static struct macb_platform_data eth_data;
144
145static struct resource eth_resources[] = {
146 [0] = {
147 .start = AT91SAM9260_BASE_EMAC,
148 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
149 .flags = IORESOURCE_MEM,
150 },
151 [1] = {
152 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
153 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
154 .flags = IORESOURCE_IRQ,
155 },
156};
157
158static struct platform_device at91sam9260_eth_device = {
159 .name = "macb",
160 .id = -1,
161 .dev = {
162 .dma_mask = &eth_dmamask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
164 .platform_data = &eth_data,
165 },
166 .resource = eth_resources,
167 .num_resources = ARRAY_SIZE(eth_resources),
168};
169
170void __init at91_add_device_eth(struct macb_platform_data *data)
171{
172 if (!data)
173 return;
174
175 if (gpio_is_valid(data->phy_irq_pin)) {
176 at91_set_gpio_input(data->phy_irq_pin, 0);
177 at91_set_deglitch(data->phy_irq_pin, 1);
178 }
179
180 /* Pins used for MII and RMII */
181 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
182 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
183 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
184 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
185 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
186 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
187 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
188 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
189 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
190 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
191
192 if (!data->is_rmii) {
193 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
194 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
195 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
196 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
197 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
198 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
199 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
200 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
201 }
202
203 eth_data = *data;
204 platform_device_register(&at91sam9260_eth_device);
205}
206#else
207void __init at91_add_device_eth(struct macb_platform_data *data) {}
208#endif
209
210
211/* --------------------------------------------------------------------
212 * MMC / SD Slot for Atmel MCI Driver
213 * -------------------------------------------------------------------- */
214
215#if IS_ENABLED(CONFIG_MMC_ATMELMCI)
216static u64 mmc_dmamask = DMA_BIT_MASK(32);
217static struct mci_platform_data mmc_data;
218
219static struct resource mmc_resources[] = {
220 [0] = {
221 .start = AT91SAM9260_BASE_MCI,
222 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
223 .flags = IORESOURCE_MEM,
224 },
225 [1] = {
226 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
227 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
228 .flags = IORESOURCE_IRQ,
229 },
230};
231
232static struct platform_device at91sam9260_mmc_device = {
233 .name = "atmel_mci",
234 .id = -1,
235 .dev = {
236 .dma_mask = &mmc_dmamask,
237 .coherent_dma_mask = DMA_BIT_MASK(32),
238 .platform_data = &mmc_data,
239 },
240 .resource = mmc_resources,
241 .num_resources = ARRAY_SIZE(mmc_resources),
242};
243
244void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
245{
246 unsigned int i;
247 unsigned int slot_count = 0;
248
249 if (!data)
250 return;
251
252 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
253 if (data->slot[i].bus_width) {
254 /* input/irq */
255 if (gpio_is_valid(data->slot[i].detect_pin)) {
256 at91_set_gpio_input(data->slot[i].detect_pin, 1);
257 at91_set_deglitch(data->slot[i].detect_pin, 1);
258 }
259 if (gpio_is_valid(data->slot[i].wp_pin))
260 at91_set_gpio_input(data->slot[i].wp_pin, 1);
261
262 switch (i) {
263 case 0:
264 /* CMD */
265 at91_set_A_periph(AT91_PIN_PA7, 1);
266 /* DAT0, maybe DAT1..DAT3 */
267 at91_set_A_periph(AT91_PIN_PA6, 1);
268 if (data->slot[i].bus_width == 4) {
269 at91_set_A_periph(AT91_PIN_PA9, 1);
270 at91_set_A_periph(AT91_PIN_PA10, 1);
271 at91_set_A_periph(AT91_PIN_PA11, 1);
272 }
273 slot_count++;
274 break;
275 case 1:
276 /* CMD */
277 at91_set_B_periph(AT91_PIN_PA1, 1);
278 /* DAT0, maybe DAT1..DAT3 */
279 at91_set_B_periph(AT91_PIN_PA0, 1);
280 if (data->slot[i].bus_width == 4) {
281 at91_set_B_periph(AT91_PIN_PA5, 1);
282 at91_set_B_periph(AT91_PIN_PA4, 1);
283 at91_set_B_periph(AT91_PIN_PA3, 1);
284 }
285 slot_count++;
286 break;
287 default:
288 printk(KERN_ERR
289 "AT91: SD/MMC slot %d not available\n", i);
290 break;
291 }
292 }
293 }
294
295 if (slot_count) {
296 /* CLK */
297 at91_set_A_periph(AT91_PIN_PA8, 0);
298
299 mmc_data = *data;
300 platform_device_register(&at91sam9260_mmc_device);
301 }
302}
303#else
304void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
305#endif
306
307
308/* --------------------------------------------------------------------
309 * NAND / SmartMedia
310 * -------------------------------------------------------------------- */
311
312#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
313static struct atmel_nand_data nand_data;
314
315#define NAND_BASE AT91_CHIPSELECT_3
316
317static struct resource nand_resources[] = {
318 [0] = {
319 .start = NAND_BASE,
320 .end = NAND_BASE + SZ_256M - 1,
321 .flags = IORESOURCE_MEM,
322 },
323 [1] = {
324 .start = AT91SAM9260_BASE_ECC,
325 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
326 .flags = IORESOURCE_MEM,
327 }
328};
329
330static struct platform_device at91sam9260_nand_device = {
331 .name = "atmel_nand",
332 .id = -1,
333 .dev = {
334 .platform_data = &nand_data,
335 },
336 .resource = nand_resources,
337 .num_resources = ARRAY_SIZE(nand_resources),
338};
339
340void __init at91_add_device_nand(struct atmel_nand_data *data)
341{
342 unsigned long csa;
343
344 if (!data)
345 return;
346
347 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
348 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
349
350 /* enable pin */
351 if (gpio_is_valid(data->enable_pin))
352 at91_set_gpio_output(data->enable_pin, 1);
353
354 /* ready/busy pin */
355 if (gpio_is_valid(data->rdy_pin))
356 at91_set_gpio_input(data->rdy_pin, 1);
357
358 /* card detect pin */
359 if (gpio_is_valid(data->det_pin))
360 at91_set_gpio_input(data->det_pin, 1);
361
362 nand_data = *data;
363 platform_device_register(&at91sam9260_nand_device);
364}
365#else
366void __init at91_add_device_nand(struct atmel_nand_data *data) {}
367#endif
368
369
370/* --------------------------------------------------------------------
371 * TWI (i2c)
372 * -------------------------------------------------------------------- */
373
374/*
375 * Prefer the GPIO code since the TWI controller isn't robust
376 * (gets overruns and underruns under load) and can only issue
377 * repeated STARTs in one scenario (the driver doesn't yet handle them).
378 */
379
380#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
381
382static struct i2c_gpio_platform_data pdata = {
383 .sda_pin = AT91_PIN_PA23,
384 .sda_is_open_drain = 1,
385 .scl_pin = AT91_PIN_PA24,
386 .scl_is_open_drain = 1,
387 .udelay = 2, /* ~100 kHz */
388};
389
390static struct platform_device at91sam9260_twi_device = {
391 .name = "i2c-gpio",
392 .id = 0,
393 .dev.platform_data = &pdata,
394};
395
396void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
397{
398 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
399 at91_set_multi_drive(AT91_PIN_PA23, 1);
400
401 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
402 at91_set_multi_drive(AT91_PIN_PA24, 1);
403
404 i2c_register_board_info(0, devices, nr_devices);
405 platform_device_register(&at91sam9260_twi_device);
406}
407
408#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
409
410static struct resource twi_resources[] = {
411 [0] = {
412 .start = AT91SAM9260_BASE_TWI,
413 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
414 .flags = IORESOURCE_MEM,
415 },
416 [1] = {
417 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
418 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
419 .flags = IORESOURCE_IRQ,
420 },
421};
422
423static struct platform_device at91sam9260_twi_device = {
424 .id = 0,
425 .resource = twi_resources,
426 .num_resources = ARRAY_SIZE(twi_resources),
427};
428
429void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
430{
431 /* IP version is not the same on 9260 and g20 */
432 if (cpu_is_at91sam9g20()) {
433 at91sam9260_twi_device.name = "i2c-at91sam9g20";
434 } else {
435 at91sam9260_twi_device.name = "i2c-at91sam9260";
436 }
437
438 /* pins used for TWI interface */
439 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
440 at91_set_multi_drive(AT91_PIN_PA23, 1);
441
442 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
443 at91_set_multi_drive(AT91_PIN_PA24, 1);
444
445 i2c_register_board_info(0, devices, nr_devices);
446 platform_device_register(&at91sam9260_twi_device);
447}
448#else
449void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
450#endif
451
452
453/* --------------------------------------------------------------------
454 * SPI
455 * -------------------------------------------------------------------- */
456
457#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
458static u64 spi_dmamask = DMA_BIT_MASK(32);
459
460static struct resource spi0_resources[] = {
461 [0] = {
462 .start = AT91SAM9260_BASE_SPI0,
463 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
464 .flags = IORESOURCE_MEM,
465 },
466 [1] = {
467 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
468 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
469 .flags = IORESOURCE_IRQ,
470 },
471};
472
473static struct platform_device at91sam9260_spi0_device = {
474 .name = "atmel_spi",
475 .id = 0,
476 .dev = {
477 .dma_mask = &spi_dmamask,
478 .coherent_dma_mask = DMA_BIT_MASK(32),
479 },
480 .resource = spi0_resources,
481 .num_resources = ARRAY_SIZE(spi0_resources),
482};
483
484static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
485
486static struct resource spi1_resources[] = {
487 [0] = {
488 .start = AT91SAM9260_BASE_SPI1,
489 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
490 .flags = IORESOURCE_MEM,
491 },
492 [1] = {
493 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
494 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
495 .flags = IORESOURCE_IRQ,
496 },
497};
498
499static struct platform_device at91sam9260_spi1_device = {
500 .name = "atmel_spi",
501 .id = 1,
502 .dev = {
503 .dma_mask = &spi_dmamask,
504 .coherent_dma_mask = DMA_BIT_MASK(32),
505 },
506 .resource = spi1_resources,
507 .num_resources = ARRAY_SIZE(spi1_resources),
508};
509
510static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
511
512void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
513{
514 int i;
515 unsigned long cs_pin;
516 short enable_spi0 = 0;
517 short enable_spi1 = 0;
518
519 /* Choose SPI chip-selects */
520 for (i = 0; i < nr_devices; i++) {
521 if (devices[i].controller_data)
522 cs_pin = (unsigned long) devices[i].controller_data;
523 else if (devices[i].bus_num == 0)
524 cs_pin = spi0_standard_cs[devices[i].chip_select];
525 else
526 cs_pin = spi1_standard_cs[devices[i].chip_select];
527
528 if (!gpio_is_valid(cs_pin))
529 continue;
530
531 if (devices[i].bus_num == 0)
532 enable_spi0 = 1;
533 else
534 enable_spi1 = 1;
535
536 /* enable chip-select pin */
537 at91_set_gpio_output(cs_pin, 1);
538
539 /* pass chip-select pin to driver */
540 devices[i].controller_data = (void *) cs_pin;
541 }
542
543 spi_register_board_info(devices, nr_devices);
544
545 /* Configure SPI bus(es) */
546 if (enable_spi0) {
547 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
548 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
549 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
550
551 platform_device_register(&at91sam9260_spi0_device);
552 }
553 if (enable_spi1) {
554 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
555 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
556 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
557
558 platform_device_register(&at91sam9260_spi1_device);
559 }
560}
561#else
562void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
563#endif
564
565
566/* --------------------------------------------------------------------
567 * Timer/Counter blocks
568 * -------------------------------------------------------------------- */
569
570#ifdef CONFIG_ATMEL_TCLIB
571
572static struct resource tcb0_resources[] = {
573 [0] = {
574 .start = AT91SAM9260_BASE_TCB0,
575 .end = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
576 .flags = IORESOURCE_MEM,
577 },
578 [1] = {
579 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
580 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
581 .flags = IORESOURCE_IRQ,
582 },
583 [2] = {
584 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
585 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
586 .flags = IORESOURCE_IRQ,
587 },
588 [3] = {
589 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
590 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
591 .flags = IORESOURCE_IRQ,
592 },
593};
594
595static struct platform_device at91sam9260_tcb0_device = {
596 .name = "atmel_tcb",
597 .id = 0,
598 .resource = tcb0_resources,
599 .num_resources = ARRAY_SIZE(tcb0_resources),
600};
601
602static struct resource tcb1_resources[] = {
603 [0] = {
604 .start = AT91SAM9260_BASE_TCB1,
605 .end = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
606 .flags = IORESOURCE_MEM,
607 },
608 [1] = {
609 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
610 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
611 .flags = IORESOURCE_IRQ,
612 },
613 [2] = {
614 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
615 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
616 .flags = IORESOURCE_IRQ,
617 },
618 [3] = {
619 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
620 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
621 .flags = IORESOURCE_IRQ,
622 },
623};
624
625static struct platform_device at91sam9260_tcb1_device = {
626 .name = "atmel_tcb",
627 .id = 1,
628 .resource = tcb1_resources,
629 .num_resources = ARRAY_SIZE(tcb1_resources),
630};
631
632static void __init at91_add_device_tc(void)
633{
634 platform_device_register(&at91sam9260_tcb0_device);
635 platform_device_register(&at91sam9260_tcb1_device);
636}
637#else
638static void __init at91_add_device_tc(void) { }
639#endif
640
641
642/* --------------------------------------------------------------------
643 * RTT
644 * -------------------------------------------------------------------- */
645
646static struct resource rtt_resources[] = {
647 {
648 .start = AT91SAM9260_BASE_RTT,
649 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
650 .flags = IORESOURCE_MEM,
651 }, {
652 .flags = IORESOURCE_MEM,
653 }, {
654 .flags = IORESOURCE_IRQ,
655 },
656};
657
658static struct platform_device at91sam9260_rtt_device = {
659 .name = "at91_rtt",
660 .id = 0,
661 .resource = rtt_resources,
662};
663
664
665#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
666static void __init at91_add_device_rtt_rtc(void)
667{
668 at91sam9260_rtt_device.name = "rtc-at91sam9";
669 /*
670 * The second resource is needed:
671 * GPBR will serve as the storage for RTC time offset
672 */
673 at91sam9260_rtt_device.num_resources = 3;
674 rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
675 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
676 rtt_resources[1].end = rtt_resources[1].start + 3;
677 rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
678 rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
679}
680#else
681static void __init at91_add_device_rtt_rtc(void)
682{
683 /* Only one resource is needed: RTT not used as RTC */
684 at91sam9260_rtt_device.num_resources = 1;
685}
686#endif
687
688static void __init at91_add_device_rtt(void)
689{
690 at91_add_device_rtt_rtc();
691 platform_device_register(&at91sam9260_rtt_device);
692}
693
694
695/* --------------------------------------------------------------------
696 * Watchdog
697 * -------------------------------------------------------------------- */
698
699#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
700static struct resource wdt_resources[] = {
701 {
702 .start = AT91SAM9260_BASE_WDT,
703 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
704 .flags = IORESOURCE_MEM,
705 }
706};
707
708static struct platform_device at91sam9260_wdt_device = {
709 .name = "at91_wdt",
710 .id = -1,
711 .resource = wdt_resources,
712 .num_resources = ARRAY_SIZE(wdt_resources),
713};
714
715static void __init at91_add_device_watchdog(void)
716{
717 platform_device_register(&at91sam9260_wdt_device);
718}
719#else
720static void __init at91_add_device_watchdog(void) {}
721#endif
722
723
724/* --------------------------------------------------------------------
725 * SSC -- Synchronous Serial Controller
726 * -------------------------------------------------------------------- */
727
728#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
729static u64 ssc_dmamask = DMA_BIT_MASK(32);
730
731static struct resource ssc_resources[] = {
732 [0] = {
733 .start = AT91SAM9260_BASE_SSC,
734 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
735 .flags = IORESOURCE_MEM,
736 },
737 [1] = {
738 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
739 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
740 .flags = IORESOURCE_IRQ,
741 },
742};
743
744static struct platform_device at91sam9260_ssc_device = {
745 .name = "at91rm9200_ssc",
746 .id = 0,
747 .dev = {
748 .dma_mask = &ssc_dmamask,
749 .coherent_dma_mask = DMA_BIT_MASK(32),
750 },
751 .resource = ssc_resources,
752 .num_resources = ARRAY_SIZE(ssc_resources),
753};
754
755static inline void configure_ssc_pins(unsigned pins)
756{
757 if (pins & ATMEL_SSC_TF)
758 at91_set_A_periph(AT91_PIN_PB17, 1);
759 if (pins & ATMEL_SSC_TK)
760 at91_set_A_periph(AT91_PIN_PB16, 1);
761 if (pins & ATMEL_SSC_TD)
762 at91_set_A_periph(AT91_PIN_PB18, 1);
763 if (pins & ATMEL_SSC_RD)
764 at91_set_A_periph(AT91_PIN_PB19, 1);
765 if (pins & ATMEL_SSC_RK)
766 at91_set_A_periph(AT91_PIN_PB20, 1);
767 if (pins & ATMEL_SSC_RF)
768 at91_set_A_periph(AT91_PIN_PB21, 1);
769}
770
771/*
772 * SSC controllers are accessed through library code, instead of any
773 * kind of all-singing/all-dancing driver. For example one could be
774 * used by a particular I2S audio codec's driver, while another one
775 * on the same system might be used by a custom data capture driver.
776 */
777void __init at91_add_device_ssc(unsigned id, unsigned pins)
778{
779 struct platform_device *pdev;
780
781 /*
782 * NOTE: caller is responsible for passing information matching
783 * "pins" to whatever will be using each particular controller.
784 */
785 switch (id) {
786 case AT91SAM9260_ID_SSC:
787 pdev = &at91sam9260_ssc_device;
788 configure_ssc_pins(pins);
789 break;
790 default:
791 return;
792 }
793
794 platform_device_register(pdev);
795}
796
797#else
798void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
799#endif
800
801
802/* --------------------------------------------------------------------
803 * UART
804 * -------------------------------------------------------------------- */
805#if defined(CONFIG_SERIAL_ATMEL)
806static struct resource dbgu_resources[] = {
807 [0] = {
808 .start = AT91SAM9260_BASE_DBGU,
809 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
810 .flags = IORESOURCE_MEM,
811 },
812 [1] = {
813 .start = NR_IRQS_LEGACY + AT91_ID_SYS,
814 .end = NR_IRQS_LEGACY + AT91_ID_SYS,
815 .flags = IORESOURCE_IRQ,
816 },
817};
818
819static struct atmel_uart_data dbgu_data = {
820 .use_dma_tx = 0,
821 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
822};
823
824static u64 dbgu_dmamask = DMA_BIT_MASK(32);
825
826static struct platform_device at91sam9260_dbgu_device = {
827 .name = "atmel_usart",
828 .id = 0,
829 .dev = {
830 .dma_mask = &dbgu_dmamask,
831 .coherent_dma_mask = DMA_BIT_MASK(32),
832 .platform_data = &dbgu_data,
833 },
834 .resource = dbgu_resources,
835 .num_resources = ARRAY_SIZE(dbgu_resources),
836};
837
838static inline void configure_dbgu_pins(void)
839{
840 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
841 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
842}
843
844static struct resource uart0_resources[] = {
845 [0] = {
846 .start = AT91SAM9260_BASE_US0,
847 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
848 .flags = IORESOURCE_MEM,
849 },
850 [1] = {
851 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
852 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
853 .flags = IORESOURCE_IRQ,
854 },
855};
856
857static struct atmel_uart_data uart0_data = {
858 .use_dma_tx = 1,
859 .use_dma_rx = 1,
860};
861
862static u64 uart0_dmamask = DMA_BIT_MASK(32);
863
864static struct platform_device at91sam9260_uart0_device = {
865 .name = "atmel_usart",
866 .id = 1,
867 .dev = {
868 .dma_mask = &uart0_dmamask,
869 .coherent_dma_mask = DMA_BIT_MASK(32),
870 .platform_data = &uart0_data,
871 },
872 .resource = uart0_resources,
873 .num_resources = ARRAY_SIZE(uart0_resources),
874};
875
876static inline void configure_usart0_pins(unsigned pins)
877{
878 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
879 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
880
881 if (pins & ATMEL_UART_RTS)
882 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
883 if (pins & ATMEL_UART_CTS)
884 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
885 if (pins & ATMEL_UART_DTR)
886 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
887 if (pins & ATMEL_UART_DSR)
888 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
889 if (pins & ATMEL_UART_DCD)
890 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
891 if (pins & ATMEL_UART_RI)
892 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
893}
894
895static struct resource uart1_resources[] = {
896 [0] = {
897 .start = AT91SAM9260_BASE_US1,
898 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
899 .flags = IORESOURCE_MEM,
900 },
901 [1] = {
902 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
903 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
904 .flags = IORESOURCE_IRQ,
905 },
906};
907
908static struct atmel_uart_data uart1_data = {
909 .use_dma_tx = 1,
910 .use_dma_rx = 1,
911};
912
913static u64 uart1_dmamask = DMA_BIT_MASK(32);
914
915static struct platform_device at91sam9260_uart1_device = {
916 .name = "atmel_usart",
917 .id = 2,
918 .dev = {
919 .dma_mask = &uart1_dmamask,
920 .coherent_dma_mask = DMA_BIT_MASK(32),
921 .platform_data = &uart1_data,
922 },
923 .resource = uart1_resources,
924 .num_resources = ARRAY_SIZE(uart1_resources),
925};
926
927static inline void configure_usart1_pins(unsigned pins)
928{
929 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
930 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
931
932 if (pins & ATMEL_UART_RTS)
933 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
934 if (pins & ATMEL_UART_CTS)
935 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
936}
937
938static struct resource uart2_resources[] = {
939 [0] = {
940 .start = AT91SAM9260_BASE_US2,
941 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
942 .flags = IORESOURCE_MEM,
943 },
944 [1] = {
945 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
946 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
947 .flags = IORESOURCE_IRQ,
948 },
949};
950
951static struct atmel_uart_data uart2_data = {
952 .use_dma_tx = 1,
953 .use_dma_rx = 1,
954};
955
956static u64 uart2_dmamask = DMA_BIT_MASK(32);
957
958static struct platform_device at91sam9260_uart2_device = {
959 .name = "atmel_usart",
960 .id = 3,
961 .dev = {
962 .dma_mask = &uart2_dmamask,
963 .coherent_dma_mask = DMA_BIT_MASK(32),
964 .platform_data = &uart2_data,
965 },
966 .resource = uart2_resources,
967 .num_resources = ARRAY_SIZE(uart2_resources),
968};
969
970static inline void configure_usart2_pins(unsigned pins)
971{
972 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
973 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
974
975 if (pins & ATMEL_UART_RTS)
976 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
977 if (pins & ATMEL_UART_CTS)
978 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
979}
980
981static struct resource uart3_resources[] = {
982 [0] = {
983 .start = AT91SAM9260_BASE_US3,
984 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
985 .flags = IORESOURCE_MEM,
986 },
987 [1] = {
988 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
989 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
990 .flags = IORESOURCE_IRQ,
991 },
992};
993
994static struct atmel_uart_data uart3_data = {
995 .use_dma_tx = 1,
996 .use_dma_rx = 1,
997};
998
999static u64 uart3_dmamask = DMA_BIT_MASK(32);
1000
1001static struct platform_device at91sam9260_uart3_device = {
1002 .name = "atmel_usart",
1003 .id = 4,
1004 .dev = {
1005 .dma_mask = &uart3_dmamask,
1006 .coherent_dma_mask = DMA_BIT_MASK(32),
1007 .platform_data = &uart3_data,
1008 },
1009 .resource = uart3_resources,
1010 .num_resources = ARRAY_SIZE(uart3_resources),
1011};
1012
1013static inline void configure_usart3_pins(unsigned pins)
1014{
1015 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
1016 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
1017
1018 if (pins & ATMEL_UART_RTS)
1019 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
1020 if (pins & ATMEL_UART_CTS)
1021 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
1022}
1023
1024static struct resource uart4_resources[] = {
1025 [0] = {
1026 .start = AT91SAM9260_BASE_US4,
1027 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1028 .flags = IORESOURCE_MEM,
1029 },
1030 [1] = {
1031 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1032 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1033 .flags = IORESOURCE_IRQ,
1034 },
1035};
1036
1037static struct atmel_uart_data uart4_data = {
1038 .use_dma_tx = 1,
1039 .use_dma_rx = 1,
1040};
1041
1042static u64 uart4_dmamask = DMA_BIT_MASK(32);
1043
1044static struct platform_device at91sam9260_uart4_device = {
1045 .name = "atmel_usart",
1046 .id = 5,
1047 .dev = {
1048 .dma_mask = &uart4_dmamask,
1049 .coherent_dma_mask = DMA_BIT_MASK(32),
1050 .platform_data = &uart4_data,
1051 },
1052 .resource = uart4_resources,
1053 .num_resources = ARRAY_SIZE(uart4_resources),
1054};
1055
1056static inline void configure_usart4_pins(void)
1057{
1058 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1059 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1060}
1061
1062static struct resource uart5_resources[] = {
1063 [0] = {
1064 .start = AT91SAM9260_BASE_US5,
1065 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1066 .flags = IORESOURCE_MEM,
1067 },
1068 [1] = {
1069 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1070 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1071 .flags = IORESOURCE_IRQ,
1072 },
1073};
1074
1075static struct atmel_uart_data uart5_data = {
1076 .use_dma_tx = 1,
1077 .use_dma_rx = 1,
1078};
1079
1080static u64 uart5_dmamask = DMA_BIT_MASK(32);
1081
1082static struct platform_device at91sam9260_uart5_device = {
1083 .name = "atmel_usart",
1084 .id = 6,
1085 .dev = {
1086 .dma_mask = &uart5_dmamask,
1087 .coherent_dma_mask = DMA_BIT_MASK(32),
1088 .platform_data = &uart5_data,
1089 },
1090 .resource = uart5_resources,
1091 .num_resources = ARRAY_SIZE(uart5_resources),
1092};
1093
1094static inline void configure_usart5_pins(void)
1095{
1096 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1097 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1098}
1099
1100static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1101
1102void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1103{
1104 struct platform_device *pdev;
1105 struct atmel_uart_data *pdata;
1106
1107 switch (id) {
1108 case 0: /* DBGU */
1109 pdev = &at91sam9260_dbgu_device;
1110 configure_dbgu_pins();
1111 break;
1112 case AT91SAM9260_ID_US0:
1113 pdev = &at91sam9260_uart0_device;
1114 configure_usart0_pins(pins);
1115 break;
1116 case AT91SAM9260_ID_US1:
1117 pdev = &at91sam9260_uart1_device;
1118 configure_usart1_pins(pins);
1119 break;
1120 case AT91SAM9260_ID_US2:
1121 pdev = &at91sam9260_uart2_device;
1122 configure_usart2_pins(pins);
1123 break;
1124 case AT91SAM9260_ID_US3:
1125 pdev = &at91sam9260_uart3_device;
1126 configure_usart3_pins(pins);
1127 break;
1128 case AT91SAM9260_ID_US4:
1129 pdev = &at91sam9260_uart4_device;
1130 configure_usart4_pins();
1131 break;
1132 case AT91SAM9260_ID_US5:
1133 pdev = &at91sam9260_uart5_device;
1134 configure_usart5_pins();
1135 break;
1136 default:
1137 return;
1138 }
1139 pdata = pdev->dev.platform_data;
1140 pdata->num = portnr; /* update to mapped ID */
1141
1142 if (portnr < ATMEL_MAX_UART)
1143 at91_uarts[portnr] = pdev;
1144}
1145
1146void __init at91_add_device_serial(void)
1147{
1148 int i;
1149
1150 for (i = 0; i < ATMEL_MAX_UART; i++) {
1151 if (at91_uarts[i])
1152 platform_device_register(at91_uarts[i]);
1153 }
1154}
1155#else
1156void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1157void __init at91_add_device_serial(void) {}
1158#endif
1159
1160/* --------------------------------------------------------------------
1161 * CF/IDE
1162 * -------------------------------------------------------------------- */
1163
1164#if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1165 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1166
1167static struct at91_cf_data cf0_data;
1168
1169static struct resource cf0_resources[] = {
1170 [0] = {
1171 .start = AT91_CHIPSELECT_4,
1172 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
1173 .flags = IORESOURCE_MEM,
1174 }
1175};
1176
1177static struct platform_device cf0_device = {
1178 .id = 0,
1179 .dev = {
1180 .platform_data = &cf0_data,
1181 },
1182 .resource = cf0_resources,
1183 .num_resources = ARRAY_SIZE(cf0_resources),
1184};
1185
1186static struct at91_cf_data cf1_data;
1187
1188static struct resource cf1_resources[] = {
1189 [0] = {
1190 .start = AT91_CHIPSELECT_5,
1191 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
1192 .flags = IORESOURCE_MEM,
1193 }
1194};
1195
1196static struct platform_device cf1_device = {
1197 .id = 1,
1198 .dev = {
1199 .platform_data = &cf1_data,
1200 },
1201 .resource = cf1_resources,
1202 .num_resources = ARRAY_SIZE(cf1_resources),
1203};
1204
1205void __init at91_add_device_cf(struct at91_cf_data *data)
1206{
1207 struct platform_device *pdev;
1208 unsigned long csa;
1209
1210 if (!data)
1211 return;
1212
1213 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1214
1215 switch (data->chipselect) {
1216 case 4:
1217 at91_set_multi_drive(AT91_PIN_PC8, 0);
1218 at91_set_A_periph(AT91_PIN_PC8, 0);
1219 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1220 cf0_data = *data;
1221 pdev = &cf0_device;
1222 break;
1223 case 5:
1224 at91_set_multi_drive(AT91_PIN_PC9, 0);
1225 at91_set_A_periph(AT91_PIN_PC9, 0);
1226 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1227 cf1_data = *data;
1228 pdev = &cf1_device;
1229 break;
1230 default:
1231 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1232 data->chipselect);
1233 return;
1234 }
1235
1236 at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1237
1238 if (gpio_is_valid(data->rst_pin)) {
1239 at91_set_multi_drive(data->rst_pin, 0);
1240 at91_set_gpio_output(data->rst_pin, 1);
1241 }
1242
1243 if (gpio_is_valid(data->irq_pin)) {
1244 at91_set_gpio_input(data->irq_pin, 0);
1245 at91_set_deglitch(data->irq_pin, 1);
1246 }
1247
1248 if (gpio_is_valid(data->det_pin)) {
1249 at91_set_gpio_input(data->det_pin, 0);
1250 at91_set_deglitch(data->det_pin, 1);
1251 }
1252
1253 at91_set_B_periph(AT91_PIN_PC6, 0); /* CFCE1 */
1254 at91_set_B_periph(AT91_PIN_PC7, 0); /* CFCE2 */
1255 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */
1256 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */
1257
1258 if (IS_ENABLED(CONFIG_PATA_AT91) && (data->flags & AT91_CF_TRUE_IDE))
1259 pdev->name = "pata_at91";
1260 else
1261 pdev->name = "at91_cf";
1262
1263 platform_device_register(pdev);
1264}
1265
1266#else
1267void __init at91_add_device_cf(struct at91_cf_data * data) {}
1268#endif
1269
1270/* --------------------------------------------------------------------
1271 * ADCs
1272 * -------------------------------------------------------------------- */
1273
1274#if IS_ENABLED(CONFIG_AT91_ADC)
1275static struct at91_adc_data adc_data;
1276
1277static struct resource adc_resources[] = {
1278 [0] = {
1279 .start = AT91SAM9260_BASE_ADC,
1280 .end = AT91SAM9260_BASE_ADC + SZ_16K - 1,
1281 .flags = IORESOURCE_MEM,
1282 },
1283 [1] = {
1284 .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1285 .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1286 .flags = IORESOURCE_IRQ,
1287 },
1288};
1289
1290static struct platform_device at91_adc_device = {
1291 .name = "at91sam9260-adc",
1292 .id = -1,
1293 .dev = {
1294 .platform_data = &adc_data,
1295 },
1296 .resource = adc_resources,
1297 .num_resources = ARRAY_SIZE(adc_resources),
1298};
1299
1300static struct at91_adc_trigger at91_adc_triggers[] = {
1301 [0] = {
1302 .name = "timer-counter-0",
1303 .value = 0x1,
1304 },
1305 [1] = {
1306 .name = "timer-counter-1",
1307 .value = 0x3,
1308 },
1309 [2] = {
1310 .name = "timer-counter-2",
1311 .value = 0x5,
1312 },
1313 [3] = {
1314 .name = "external",
1315 .value = 0xd,
1316 .is_external = true,
1317 },
1318};
1319
1320void __init at91_add_device_adc(struct at91_adc_data *data)
1321{
1322 if (!data)
1323 return;
1324
1325 if (test_bit(0, &data->channels_used))
1326 at91_set_A_periph(AT91_PIN_PC0, 0);
1327 if (test_bit(1, &data->channels_used))
1328 at91_set_A_periph(AT91_PIN_PC1, 0);
1329 if (test_bit(2, &data->channels_used))
1330 at91_set_A_periph(AT91_PIN_PC2, 0);
1331 if (test_bit(3, &data->channels_used))
1332 at91_set_A_periph(AT91_PIN_PC3, 0);
1333
1334 if (data->use_external_triggers)
1335 at91_set_A_periph(AT91_PIN_PA22, 0);
1336
1337 data->startup_time = 10;
1338 data->trigger_number = 4;
1339 data->trigger_list = at91_adc_triggers;
1340
1341 adc_data = *data;
1342 platform_device_register(&at91_adc_device);
1343}
1344#else
1345void __init at91_add_device_adc(struct at91_adc_data *data) {}
1346#endif
1347
1348/* -------------------------------------------------------------------- */
1349/*
1350 * These devices are always present and don't need any board-specific
1351 * setup.
1352 */
1353static int __init at91_add_standard_devices(void)
1354{
1355 if (of_have_populated_dt())
1356 return 0;
1357
1358 at91_add_device_rtt();
1359 at91_add_device_watchdog();
1360 at91_add_device_tc();
1361 return 0;
1362}
1363
1364arch_initcall(at91_add_standard_devices);
generated by cgit v1.2.2 (git 2.25.0) at 2025-06-03 13:22:18 -0400