aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index b4a4f36d2f00..5f614828d365 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3148,6 +3148,13 @@ static void i965_write_fence_reg(struct drm_device *dev, int reg,
3148 u32 size = i915_gem_obj_ggtt_size(obj); 3148 u32 size = i915_gem_obj_ggtt_size(obj);
3149 uint64_t val; 3149 uint64_t val;
3150 3150
3151 /* Adjust fence size to match tiled area */
3152 if (obj->tiling_mode != I915_TILING_NONE) {
3153 uint32_t row_size = obj->stride *
3154 (obj->tiling_mode == I915_TILING_Y ? 32 : 8);
3155 size = (size / row_size) * row_size;
3156 }
3157
3151 val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) & 3158 val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) &
3152 0xfffff000) << 32; 3159 0xfffff000) << 32;
3153 val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000; 3160 val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000;