diff options
| -rw-r--r-- | arch/arm/mach-tegra/Kconfig | 40 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 5 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/uncompress.h | 52 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/iomap.h | 14 |
4 files changed, 15 insertions, 96 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 9ff6f6ea3617..97fcd16e2dab 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig | |||
| @@ -58,11 +58,16 @@ config TEGRA_AHB | |||
| 58 | perfomance parameters(priority, prefech size). | 58 | perfomance parameters(priority, prefech size). |
| 59 | 59 | ||
| 60 | choice | 60 | choice |
| 61 | prompt "Default low-level debug console UART" | 61 | prompt "Low-level debug console UART" |
| 62 | default TEGRA_DEBUG_UART_NONE | ||
| 63 | 62 | ||
| 64 | config TEGRA_DEBUG_UART_NONE | 63 | config TEGRA_DEBUG_UART_AUTO_ODMDATA |
| 65 | bool "None" | 64 | bool "Via ODMDATA" |
| 65 | help | ||
| 66 | Automatically determines which UART to use for low-level debug based | ||
| 67 | on the ODMDATA value. This value is part of the BCT, and is written | ||
| 68 | to the boot memory device using nvflash, or other flashing tool. | ||
| 69 | When bits 19:18 are 3, then bits 17:15 indicate which UART to use; | ||
| 70 | 0/1/2/3/4 are UART A/B/C/D/E. | ||
| 66 | 71 | ||
| 67 | config TEGRA_DEBUG_UARTA | 72 | config TEGRA_DEBUG_UARTA |
| 68 | bool "UART-A" | 73 | bool "UART-A" |
| @@ -81,33 +86,6 @@ config TEGRA_DEBUG_UARTE | |||
| 81 | 86 | ||
| 82 | endchoice | 87 | endchoice |
| 83 | 88 | ||
| 84 | choice | ||
| 85 | prompt "Automatic low-level debug console UART" | ||
| 86 | default TEGRA_DEBUG_UART_AUTO_NONE | ||
| 87 | |||
| 88 | config TEGRA_DEBUG_UART_AUTO_NONE | ||
| 89 | bool "None" | ||
| 90 | |||
| 91 | config TEGRA_DEBUG_UART_AUTO_ODMDATA | ||
| 92 | bool "Via ODMDATA" | ||
| 93 | help | ||
| 94 | Automatically determines which UART to use for low-level debug based | ||
| 95 | on the ODMDATA value. This value is part of the BCT, and is written | ||
| 96 | to the boot memory device using nvflash, or other flashing tool. | ||
| 97 | When bits 19:18 are 3, then bits 17:15 indicate which UART to use; | ||
| 98 | 0/1/2/3/4 are UART A/B/C/D/E. | ||
| 99 | |||
| 100 | config TEGRA_DEBUG_UART_AUTO_SCRATCH | ||
| 101 | bool "Via UART scratch register" | ||
| 102 | help | ||
| 103 | Automatically determines which UART to use for low-level debug based | ||
| 104 | on the UART scratch register value. Some bootloaders put ASCII 'D' | ||
| 105 | in this register when they initialize their own console UART output. | ||
| 106 | Using this option allows the kernel to automatically pick the same | ||
| 107 | UART. | ||
| 108 | |||
| 109 | endchoice | ||
| 110 | |||
| 111 | config TEGRA_EMC_SCALING_ENABLE | 89 | config TEGRA_EMC_SCALING_ENABLE |
| 112 | bool "Enable scaling the memory frequency" | 90 | bool "Enable scaling the memory frequency" |
| 113 | 91 | ||
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 3e03e5f15c14..8b41e4c0d53f 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
| @@ -44,14 +44,13 @@ | |||
| 44 | * kernel is loaded. The data is declared here rather than debug-macro.S so | 44 | * kernel is loaded. The data is declared here rather than debug-macro.S so |
| 45 | * that multiple inclusions of debug-macro.S point at the same data. | 45 | * that multiple inclusions of debug-macro.S point at the same data. |
| 46 | */ | 46 | */ |
| 47 | #define TEGRA_DEBUG_UART_OFFSET (TEGRA_DEBUG_UART_BASE & 0xFFFF) | ||
| 48 | u32 tegra_uart_config[3] = { | 47 | u32 tegra_uart_config[3] = { |
| 49 | /* Debug UART initialization required */ | 48 | /* Debug UART initialization required */ |
| 50 | 1, | 49 | 1, |
| 51 | /* Debug UART physical address */ | 50 | /* Debug UART physical address */ |
| 52 | (u32)(IO_APB_PHYS + TEGRA_DEBUG_UART_OFFSET), | 51 | 0, |
| 53 | /* Debug UART virtual address */ | 52 | /* Debug UART virtual address */ |
| 54 | (u32)(IO_APB_VIRT + TEGRA_DEBUG_UART_OFFSET), | 53 | 0, |
| 55 | }; | 54 | }; |
| 56 | 55 | ||
| 57 | #ifdef CONFIG_OF | 56 | #ifdef CONFIG_OF |
diff --git a/arch/arm/mach-tegra/include/mach/uncompress.h b/arch/arm/mach-tegra/include/mach/uncompress.h index 27725750ca3e..4150c71c006f 100644 --- a/arch/arm/mach-tegra/include/mach/uncompress.h +++ b/arch/arm/mach-tegra/include/mach/uncompress.h | |||
| @@ -139,51 +139,19 @@ int auto_odmdata(void) | |||
| 139 | } | 139 | } |
| 140 | #endif | 140 | #endif |
| 141 | 141 | ||
| 142 | #ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH | ||
| 143 | int auto_scratch(void) | ||
| 144 | { | ||
| 145 | int i; | ||
| 146 | |||
| 147 | /* | ||
| 148 | * Look for the first UART that: | ||
| 149 | * a) Is not in reset. | ||
| 150 | * b) Is clocked. | ||
| 151 | * c) Has a 'D' in the scratchpad register. | ||
| 152 | * | ||
| 153 | * Note that on Tegra30, the first two conditions are required, since | ||
| 154 | * if not true, accesses to the UART scratch register will hang. | ||
| 155 | * Tegra20 doesn't have this issue. | ||
| 156 | * | ||
| 157 | * The intent is that the bootloader will tell the kernel which UART | ||
| 158 | * to use by setting up those conditions. If nothing found, we'll fall | ||
| 159 | * back to what's specified in TEGRA_DEBUG_UART_BASE. | ||
| 160 | */ | ||
| 161 | for (i = 0; i < ARRAY_SIZE(uarts); i++) { | ||
| 162 | if (!uart_clocked(i)) | ||
| 163 | continue; | ||
| 164 | |||
| 165 | uart = (volatile u8 *)uarts[i].base; | ||
| 166 | if (uart[UART_SCR << DEBUG_UART_SHIFT] != 'D') | ||
| 167 | continue; | ||
| 168 | |||
| 169 | return i; | ||
| 170 | } | ||
| 171 | |||
| 172 | return -1; | ||
| 173 | } | ||
| 174 | #endif | ||
| 175 | |||
| 176 | /* | 142 | /* |
| 177 | * Setup before decompression. This is where we do UART selection for | 143 | * Setup before decompression. This is where we do UART selection for |
| 178 | * earlyprintk and init the uart_base register. | 144 | * earlyprintk and init the uart_base register. |
| 179 | */ | 145 | */ |
| 180 | static inline void arch_decomp_setup(void) | 146 | static inline void arch_decomp_setup(void) |
| 181 | { | 147 | { |
| 182 | int uart_id, auto_uart_id; | 148 | int uart_id; |
| 183 | volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE; | 149 | volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE; |
| 184 | u32 chip, div; | 150 | u32 chip, div; |
| 185 | 151 | ||
| 186 | #if defined(CONFIG_TEGRA_DEBUG_UARTA) | 152 | #if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA) |
| 153 | uart_id = auto_odmdata(); | ||
| 154 | #elif defined(CONFIG_TEGRA_DEBUG_UARTA) | ||
| 187 | uart_id = 0; | 155 | uart_id = 0; |
| 188 | #elif defined(CONFIG_TEGRA_DEBUG_UARTB) | 156 | #elif defined(CONFIG_TEGRA_DEBUG_UARTB) |
| 189 | uart_id = 1; | 157 | uart_id = 1; |
| @@ -193,19 +161,7 @@ static inline void arch_decomp_setup(void) | |||
| 193 | uart_id = 3; | 161 | uart_id = 3; |
| 194 | #elif defined(CONFIG_TEGRA_DEBUG_UARTE) | 162 | #elif defined(CONFIG_TEGRA_DEBUG_UARTE) |
| 195 | uart_id = 4; | 163 | uart_id = 4; |
| 196 | #else | ||
| 197 | uart_id = -1; | ||
| 198 | #endif | ||
| 199 | |||
| 200 | #if defined(CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA) | ||
| 201 | auto_uart_id = auto_odmdata(); | ||
| 202 | #elif defined(CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH) | ||
| 203 | auto_uart_id = auto_scratch(); | ||
| 204 | #else | ||
| 205 | auto_uart_id = -1; | ||
| 206 | #endif | 164 | #endif |
| 207 | if (auto_uart_id != -1) | ||
| 208 | uart_id = auto_uart_id; | ||
| 209 | 165 | ||
| 210 | if (uart_id < 0 || uart_id >= ARRAY_SIZE(uarts) || | 166 | if (uart_id < 0 || uart_id >= ARRAY_SIZE(uarts) || |
| 211 | !uart_clocked(uart_id)) | 167 | !uart_clocked(uart_id)) |
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h index 53151030a07d..db8be51cad80 100644 --- a/arch/arm/mach-tegra/iomap.h +++ b/arch/arm/mach-tegra/iomap.h | |||
| @@ -261,20 +261,6 @@ | |||
| 261 | #define TEGRA_SDMMC4_BASE 0xC8000600 | 261 | #define TEGRA_SDMMC4_BASE 0xC8000600 |
| 262 | #define TEGRA_SDMMC4_SIZE SZ_512 | 262 | #define TEGRA_SDMMC4_SIZE SZ_512 |
| 263 | 263 | ||
| 264 | #if defined(CONFIG_TEGRA_DEBUG_UART_NONE) | ||
| 265 | # define TEGRA_DEBUG_UART_BASE 0 | ||
| 266 | #elif defined(CONFIG_TEGRA_DEBUG_UARTA) | ||
| 267 | # define TEGRA_DEBUG_UART_BASE TEGRA_UARTA_BASE | ||
| 268 | #elif defined(CONFIG_TEGRA_DEBUG_UARTB) | ||
| 269 | # define TEGRA_DEBUG_UART_BASE TEGRA_UARTB_BASE | ||
| 270 | #elif defined(CONFIG_TEGRA_DEBUG_UARTC) | ||
| 271 | # define TEGRA_DEBUG_UART_BASE TEGRA_UARTC_BASE | ||
| 272 | #elif defined(CONFIG_TEGRA_DEBUG_UARTD) | ||
| 273 | # define TEGRA_DEBUG_UART_BASE TEGRA_UARTD_BASE | ||
| 274 | #elif defined(CONFIG_TEGRA_DEBUG_UARTE) | ||
| 275 | # define TEGRA_DEBUG_UART_BASE TEGRA_UARTE_BASE | ||
| 276 | #endif | ||
| 277 | |||
| 278 | /* On TEGRA, many peripherals are very closely packed in | 264 | /* On TEGRA, many peripherals are very closely packed in |
| 279 | * two 256MB io windows (that actually only use about 64KB | 265 | * two 256MB io windows (that actually only use about 64KB |
| 280 | * at the start of each). | 266 | * at the start of each). |
