2 files changed, 26 insertions, 10 deletions

diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 9c69e7e145c5..4fee63cb53ff 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1366,12 +1366,17 @@ static void __init pcibios_allocate_resources(int pass)
 
         for_each_pci_dev(dev) {
                 pci_read_config_word(dev, PCI_COMMAND, &command);
-                for (idx = 0; idx < 6; idx++) {
+                for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
                         r = &dev->resource[idx];
                         if (r->parent)          /* Already allocated */
                                 continue;
                         if (!r->flags || (r->flags & IORESOURCE_UNSET))
                                 continue;       /* Not assigned at all */
+                        /* We only allocate ROMs on pass 1 just in case they
+                         * have been screwed up by firmware
+                         */
+                        if (idx == PCI_ROM_RESOURCE )
+                                disabled = 1;
                         if (r->flags & IORESOURCE_IO)
                                 disabled = !(command & PCI_COMMAND_IO);
                         else
@@ -1382,17 +1387,19 @@ static void __init pcibios_allocate_resources(int pass)
                 if (pass)
                         continue;
                 r = &dev->resource[PCI_ROM_RESOURCE];
-                if (r->flags & IORESOURCE_ROM_ENABLE) {
+                if (r->flags) {
                         /* Turn the ROM off, leave the resource region,
                          * but keep it unregistered.
                          */
                         u32 reg;
-                        pr_debug("PCI: Switching off ROM of %s\n",
-                                 pci_name(dev));
-                        r->flags &= ~IORESOURCE_ROM_ENABLE;
                         pci_read_config_dword(dev, dev->rom_base_reg, &reg);
-                        pci_write_config_dword(dev, dev->rom_base_reg,
-                                               reg & ~PCI_ROM_ADDRESS_ENABLE);
+                        if (reg & PCI_ROM_ADDRESS_ENABLE) {
+                                pr_debug("PCI: Switching off ROM of %s\n",
+                                         pci_name(dev));
+                                r->flags &= ~IORESOURCE_ROM_ENABLE;
+                                pci_write_config_dword(dev, dev->rom_base_reg,
+                                                       reg & ~PCI_ROM_ADDRESS_ENABLE);
+                        }
                 }
         }
 }
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index be574fc0d92f..96edb6f8babb 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -64,7 +64,7 @@ static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
         return def;
 }
 
-static unsigned int pci_parse_of_flags(u32 addr0)
+static unsigned int pci_parse_of_flags(u32 addr0, int bridge)
 {
         unsigned int flags = 0;
 
@@ -75,8 +75,17 @@ static unsigned int pci_parse_of_flags(u32 addr0)
                 if (addr0 & 0x40000000)
                         flags |= IORESOURCE_PREFETCH
                                  | PCI_BASE_ADDRESS_MEM_PREFETCH;
+                /* Note: We don't know whether the ROM has been left enabled
+                 * by the firmware or not. We mark it as disabled (ie, we do
+                 * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
+                 * do a config space read, it will be force-enabled if needed
+                 */
+                if (!bridge && (addr0 & 0xff) == 0x30)
+                        flags |= IORESOURCE_READONLY;
         } else if (addr0 & 0x01000000)
                 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
+        if (flags)
+                flags |= IORESOURCE_SIZEALIGN;
         return flags;
 }
 
@@ -95,7 +104,7 @@ static void pci_parse_of_addrs(struct device_node *node, struct pci_dev *dev)
                 return;
         pr_debug("    parse addresses (%d bytes) @ %p\n", proplen, addrs);
         for (; proplen >= 20; proplen -= 20, addrs += 5) {
-                flags = pci_parse_of_flags(addrs[0]);
+                flags = pci_parse_of_flags(addrs[0], 0);
                 if (!flags)
                         continue;
                 base = of_read_number(&addrs[1], 2);
@@ -293,7 +302,7 @@ void __devinit of_scan_pci_bridge(struct device_node *node,
         }
         i = 1;
         for (; len >= 32; len -= 32, ranges += 8) {
-                flags = pci_parse_of_flags(ranges[0]);
+                flags = pci_parse_of_flags(ranges[0], 1);
                 size = of_read_number(&ranges[6], 2);
                 if (flags == 0 || size == 0)
                         continue;