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-rw-r--r--arch/arm/boot/dts/omap54xx-clocks.dtsi41
1 files changed, 37 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index 58c27466f012..83b425fb3ac2 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -167,10 +167,18 @@
167 ti,index-starts-at-one; 167 ti,index-starts-at-one;
168 }; 168 };
169 169
170 dpll_core_byp_mux: dpll_core_byp_mux {
171 #clock-cells = <0>;
172 compatible = "ti,mux-clock";
173 clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>;
174 ti,bit-shift = <23>;
175 reg = <0x012c>;
176 };
177
170 dpll_core_ck: dpll_core_ck { 178 dpll_core_ck: dpll_core_ck {
171 #clock-cells = <0>; 179 #clock-cells = <0>;
172 compatible = "ti,omap4-dpll-core-clock"; 180 compatible = "ti,omap4-dpll-core-clock";
173 clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>; 181 clocks = <&sys_clkin>, <&dpll_core_byp_mux>;
174 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>; 182 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
175 }; 183 };
176 184
@@ -294,10 +302,18 @@
294 clock-div = <1>; 302 clock-div = <1>;
295 }; 303 };
296 304
305 dpll_iva_byp_mux: dpll_iva_byp_mux {
306 #clock-cells = <0>;
307 compatible = "ti,mux-clock";
308 clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>;
309 ti,bit-shift = <23>;
310 reg = <0x01ac>;
311 };
312
297 dpll_iva_ck: dpll_iva_ck { 313 dpll_iva_ck: dpll_iva_ck {
298 #clock-cells = <0>; 314 #clock-cells = <0>;
299 compatible = "ti,omap4-dpll-clock"; 315 compatible = "ti,omap4-dpll-clock";
300 clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>; 316 clocks = <&sys_clkin>, <&dpll_iva_byp_mux>;
301 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; 317 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
302 }; 318 };
303 319
@@ -599,10 +615,19 @@
599 }; 615 };
600}; 616};
601&cm_core_clocks { 617&cm_core_clocks {
618
619 dpll_per_byp_mux: dpll_per_byp_mux {
620 #clock-cells = <0>;
621 compatible = "ti,mux-clock";
622 clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>;
623 ti,bit-shift = <23>;
624 reg = <0x014c>;
625 };
626
602 dpll_per_ck: dpll_per_ck { 627 dpll_per_ck: dpll_per_ck {
603 #clock-cells = <0>; 628 #clock-cells = <0>;
604 compatible = "ti,omap4-dpll-clock"; 629 compatible = "ti,omap4-dpll-clock";
605 clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>; 630 clocks = <&sys_clkin>, <&dpll_per_byp_mux>;
606 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>; 631 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
607 }; 632 };
608 633
@@ -714,10 +739,18 @@
714 ti,index-starts-at-one; 739 ti,index-starts-at-one;
715 }; 740 };
716 741
742 dpll_usb_byp_mux: dpll_usb_byp_mux {
743 #clock-cells = <0>;
744 compatible = "ti,mux-clock";
745 clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>;
746 ti,bit-shift = <23>;
747 reg = <0x018c>;
748 };
749
717 dpll_usb_ck: dpll_usb_ck { 750 dpll_usb_ck: dpll_usb_ck {
718 #clock-cells = <0>; 751 #clock-cells = <0>;
719 compatible = "ti,omap4-dpll-j-type-clock"; 752 compatible = "ti,omap4-dpll-j-type-clock";
720 clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>; 753 clocks = <&sys_clkin>, <&dpll_usb_byp_mux>;
721 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>; 754 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
722 }; 755 };
723 756