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-rw-r--r--drivers/usb/gadget/pch_udc.c117
1 files changed, 67 insertions, 50 deletions
diff --git a/drivers/usb/gadget/pch_udc.c b/drivers/usb/gadget/pch_udc.c
index 0c8dd81dddca..dfe927b01ffb 100644
--- a/drivers/usb/gadget/pch_udc.c
+++ b/drivers/usb/gadget/pch_udc.c
@@ -198,10 +198,10 @@
198#define PCH_UDC_BRLEN 0x0F /* Burst length */ 198#define PCH_UDC_BRLEN 0x0F /* Burst length */
199#define PCH_UDC_THLEN 0x1F /* Threshold length */ 199#define PCH_UDC_THLEN 0x1F /* Threshold length */
200/* Value of EP Buffer Size */ 200/* Value of EP Buffer Size */
201#define UDC_EP0IN_BUFF_SIZE 64 201#define UDC_EP0IN_BUFF_SIZE 16
202#define UDC_EPIN_BUFF_SIZE 512 202#define UDC_EPIN_BUFF_SIZE 256
203#define UDC_EP0OUT_BUFF_SIZE 64 203#define UDC_EP0OUT_BUFF_SIZE 16
204#define UDC_EPOUT_BUFF_SIZE 512 204#define UDC_EPOUT_BUFF_SIZE 256
205/* Value of EP maximum packet size */ 205/* Value of EP maximum packet size */
206#define UDC_EP0IN_MAX_PKT_SIZE 64 206#define UDC_EP0IN_MAX_PKT_SIZE 64
207#define UDC_EP0OUT_MAX_PKT_SIZE 64 207#define UDC_EP0OUT_MAX_PKT_SIZE 64
@@ -351,7 +351,7 @@ struct pch_udc_dev {
351 struct pci_pool *data_requests; 351 struct pci_pool *data_requests;
352 struct pci_pool *stp_requests; 352 struct pci_pool *stp_requests;
353 dma_addr_t dma_addr; 353 dma_addr_t dma_addr;
354 unsigned long ep0out_buf[64]; 354 void *ep0out_buf;
355 struct usb_ctrlrequest setup_data; 355 struct usb_ctrlrequest setup_data;
356 unsigned long phys_addr; 356 unsigned long phys_addr;
357 void __iomem *base_addr; 357 void __iomem *base_addr;
@@ -1219,11 +1219,11 @@ static void complete_req(struct pch_udc_ep *ep, struct pch_udc_request *req,
1219 dev = ep->dev; 1219 dev = ep->dev;
1220 if (req->dma_mapped) { 1220 if (req->dma_mapped) {
1221 if (ep->in) 1221 if (ep->in)
1222 pci_unmap_single(dev->pdev, req->req.dma, 1222 dma_unmap_single(&dev->pdev->dev, req->req.dma,
1223 req->req.length, PCI_DMA_TODEVICE); 1223 req->req.length, DMA_TO_DEVICE);
1224 else 1224 else
1225 pci_unmap_single(dev->pdev, req->req.dma, 1225 dma_unmap_single(&dev->pdev->dev, req->req.dma,
1226 req->req.length, PCI_DMA_FROMDEVICE); 1226 req->req.length, DMA_FROM_DEVICE);
1227 req->dma_mapped = 0; 1227 req->dma_mapped = 0;
1228 req->req.dma = DMA_ADDR_INVALID; 1228 req->req.dma = DMA_ADDR_INVALID;
1229 } 1229 }
@@ -1414,7 +1414,6 @@ static void pch_udc_start_rxrequest(struct pch_udc_ep *ep,
1414 1414
1415 pch_udc_clear_dma(ep->dev, DMA_DIR_RX); 1415 pch_udc_clear_dma(ep->dev, DMA_DIR_RX);
1416 td_data = req->td_data; 1416 td_data = req->td_data;
1417 ep->td_data = req->td_data;
1418 /* Set the status bits for all descriptors */ 1417 /* Set the status bits for all descriptors */
1419 while (1) { 1418 while (1) {
1420 td_data->status = (td_data->status & ~PCH_UDC_BUFF_STS) | 1419 td_data->status = (td_data->status & ~PCH_UDC_BUFF_STS) |
@@ -1613,15 +1612,19 @@ static int pch_udc_pcd_queue(struct usb_ep *usbep, struct usb_request *usbreq,
1613 if (usbreq->length && 1612 if (usbreq->length &&
1614 ((usbreq->dma == DMA_ADDR_INVALID) || !usbreq->dma)) { 1613 ((usbreq->dma == DMA_ADDR_INVALID) || !usbreq->dma)) {
1615 if (ep->in) 1614 if (ep->in)
1616 usbreq->dma = pci_map_single(dev->pdev, usbreq->buf, 1615 usbreq->dma = dma_map_single(&dev->pdev->dev,
1617 usbreq->length, PCI_DMA_TODEVICE); 1616 usbreq->buf,
1617 usbreq->length,
1618 DMA_TO_DEVICE);
1618 else 1619 else
1619 usbreq->dma = pci_map_single(dev->pdev, usbreq->buf, 1620 usbreq->dma = dma_map_single(&dev->pdev->dev,
1620 usbreq->length, PCI_DMA_FROMDEVICE); 1621 usbreq->buf,
1622 usbreq->length,
1623 DMA_FROM_DEVICE);
1621 req->dma_mapped = 1; 1624 req->dma_mapped = 1;
1622 } 1625 }
1623 if (usbreq->length > 0) { 1626 if (usbreq->length > 0) {
1624 retval = prepare_dma(ep, req, gfp); 1627 retval = prepare_dma(ep, req, GFP_ATOMIC);
1625 if (retval) 1628 if (retval)
1626 goto probe_end; 1629 goto probe_end;
1627 } 1630 }
@@ -1646,7 +1649,6 @@ static int pch_udc_pcd_queue(struct usb_ep *usbep, struct usb_request *usbreq,
1646 pch_udc_wait_ep_stall(ep); 1649 pch_udc_wait_ep_stall(ep);
1647 pch_udc_ep_clear_nak(ep); 1650 pch_udc_ep_clear_nak(ep);
1648 pch_udc_enable_ep_interrupts(ep->dev, (1 << ep->num)); 1651 pch_udc_enable_ep_interrupts(ep->dev, (1 << ep->num));
1649 pch_udc_set_dma(dev, DMA_DIR_TX);
1650 } 1652 }
1651 } 1653 }
1652 /* Now add this request to the ep's pending requests */ 1654 /* Now add this request to the ep's pending requests */
@@ -1926,6 +1928,7 @@ static void pch_udc_complete_receiver(struct pch_udc_ep *ep)
1926 PCH_UDC_BS_DMA_DONE) 1928 PCH_UDC_BS_DMA_DONE)
1927 return; 1929 return;
1928 pch_udc_clear_dma(ep->dev, DMA_DIR_RX); 1930 pch_udc_clear_dma(ep->dev, DMA_DIR_RX);
1931 pch_udc_ep_set_ddptr(ep, 0);
1929 if ((req->td_data_last->status & PCH_UDC_RXTX_STS) != 1932 if ((req->td_data_last->status & PCH_UDC_RXTX_STS) !=
1930 PCH_UDC_RTS_SUCC) { 1933 PCH_UDC_RTS_SUCC) {
1931 dev_err(&dev->pdev->dev, "Invalid RXTX status (0x%08x) " 1934 dev_err(&dev->pdev->dev, "Invalid RXTX status (0x%08x) "
@@ -1963,7 +1966,7 @@ static void pch_udc_svc_data_in(struct pch_udc_dev *dev, int ep_num)
1963 u32 epsts; 1966 u32 epsts;
1964 struct pch_udc_ep *ep; 1967 struct pch_udc_ep *ep;
1965 1968
1966 ep = &dev->ep[2*ep_num]; 1969 ep = &dev->ep[UDC_EPIN_IDX(ep_num)];
1967 epsts = ep->epsts; 1970 epsts = ep->epsts;
1968 ep->epsts = 0; 1971 ep->epsts = 0;
1969 1972
@@ -2008,7 +2011,7 @@ static void pch_udc_svc_data_out(struct pch_udc_dev *dev, int ep_num)
2008 struct pch_udc_ep *ep; 2011 struct pch_udc_ep *ep;
2009 struct pch_udc_request *req = NULL; 2012 struct pch_udc_request *req = NULL;
2010 2013
2011 ep = &dev->ep[2*ep_num + 1]; 2014 ep = &dev->ep[UDC_EPOUT_IDX(ep_num)];
2012 epsts = ep->epsts; 2015 epsts = ep->epsts;
2013 ep->epsts = 0; 2016 ep->epsts = 0;
2014 2017
@@ -2025,10 +2028,11 @@ static void pch_udc_svc_data_out(struct pch_udc_dev *dev, int ep_num)
2025 } 2028 }
2026 if (epsts & UDC_EPSTS_HE) 2029 if (epsts & UDC_EPSTS_HE)
2027 return; 2030 return;
2028 if (epsts & UDC_EPSTS_RSS) 2031 if (epsts & UDC_EPSTS_RSS) {
2029 pch_udc_ep_set_stall(ep); 2032 pch_udc_ep_set_stall(ep);
2030 pch_udc_enable_ep_interrupts(ep->dev, 2033 pch_udc_enable_ep_interrupts(ep->dev,
2031 PCH_UDC_EPINT(ep->in, ep->num)); 2034 PCH_UDC_EPINT(ep->in, ep->num));
2035 }
2032 if (epsts & UDC_EPSTS_RCS) { 2036 if (epsts & UDC_EPSTS_RCS) {
2033 if (!dev->prot_stall) { 2037 if (!dev->prot_stall) {
2034 pch_udc_ep_clear_stall(ep); 2038 pch_udc_ep_clear_stall(ep);
@@ -2060,8 +2064,10 @@ static void pch_udc_svc_control_in(struct pch_udc_dev *dev)
2060{ 2064{
2061 u32 epsts; 2065 u32 epsts;
2062 struct pch_udc_ep *ep; 2066 struct pch_udc_ep *ep;
2067 struct pch_udc_ep *ep_out;
2063 2068
2064 ep = &dev->ep[UDC_EP0IN_IDX]; 2069 ep = &dev->ep[UDC_EP0IN_IDX];
2070 ep_out = &dev->ep[UDC_EP0OUT_IDX];
2065 epsts = ep->epsts; 2071 epsts = ep->epsts;
2066 ep->epsts = 0; 2072 ep->epsts = 0;
2067 2073
@@ -2073,8 +2079,16 @@ static void pch_udc_svc_control_in(struct pch_udc_dev *dev)
2073 return; 2079 return;
2074 if (epsts & UDC_EPSTS_HE) 2080 if (epsts & UDC_EPSTS_HE)
2075 return; 2081 return;
2076 if ((epsts & UDC_EPSTS_TDC) && (!dev->stall)) 2082 if ((epsts & UDC_EPSTS_TDC) && (!dev->stall)) {
2077 pch_udc_complete_transfer(ep); 2083 pch_udc_complete_transfer(ep);
2084 pch_udc_clear_dma(dev, DMA_DIR_RX);
2085 ep_out->td_data->status = (ep_out->td_data->status &
2086 ~PCH_UDC_BUFF_STS) |
2087 PCH_UDC_BS_HST_RDY;
2088 pch_udc_ep_clear_nak(ep_out);
2089 pch_udc_set_dma(dev, DMA_DIR_RX);
2090 pch_udc_ep_set_rrdy(ep_out);
2091 }
2078 /* On IN interrupt, provide data if we have any */ 2092 /* On IN interrupt, provide data if we have any */
2079 if ((epsts & UDC_EPSTS_IN) && !(epsts & UDC_EPSTS_TDC) && 2093 if ((epsts & UDC_EPSTS_IN) && !(epsts & UDC_EPSTS_TDC) &&
2080 !(epsts & UDC_EPSTS_TXEMPTY)) 2094 !(epsts & UDC_EPSTS_TXEMPTY))
@@ -2102,11 +2116,9 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev)
2102 dev->stall = 0; 2116 dev->stall = 0;
2103 dev->ep[UDC_EP0IN_IDX].halted = 0; 2117 dev->ep[UDC_EP0IN_IDX].halted = 0;
2104 dev->ep[UDC_EP0OUT_IDX].halted = 0; 2118 dev->ep[UDC_EP0OUT_IDX].halted = 0;
2105 /* In data not ready */
2106 pch_udc_ep_set_nak(&(dev->ep[UDC_EP0IN_IDX]));
2107 dev->setup_data = ep->td_stp->request; 2119 dev->setup_data = ep->td_stp->request;
2108 pch_udc_init_setup_buff(ep->td_stp); 2120 pch_udc_init_setup_buff(ep->td_stp);
2109 pch_udc_clear_dma(dev, DMA_DIR_TX); 2121 pch_udc_clear_dma(dev, DMA_DIR_RX);
2110 pch_udc_ep_fifo_flush(&(dev->ep[UDC_EP0IN_IDX]), 2122 pch_udc_ep_fifo_flush(&(dev->ep[UDC_EP0IN_IDX]),
2111 dev->ep[UDC_EP0IN_IDX].in); 2123 dev->ep[UDC_EP0IN_IDX].in);
2112 if ((dev->setup_data.bRequestType & USB_DIR_IN)) 2124 if ((dev->setup_data.bRequestType & USB_DIR_IN))
@@ -2122,14 +2134,23 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev)
2122 setup_supported = dev->driver->setup(&dev->gadget, 2134 setup_supported = dev->driver->setup(&dev->gadget,
2123 &dev->setup_data); 2135 &dev->setup_data);
2124 spin_lock(&dev->lock); 2136 spin_lock(&dev->lock);
2137
2138 if (dev->setup_data.bRequestType & USB_DIR_IN) {
2139 ep->td_data->status = (ep->td_data->status &
2140 ~PCH_UDC_BUFF_STS) |
2141 PCH_UDC_BS_HST_RDY;
2142 pch_udc_ep_set_ddptr(ep, ep->td_data_phys);
2143 }
2125 /* ep0 in returns data on IN phase */ 2144 /* ep0 in returns data on IN phase */
2126 if (setup_supported >= 0 && setup_supported < 2145 if (setup_supported >= 0 && setup_supported <
2127 UDC_EP0IN_MAX_PKT_SIZE) { 2146 UDC_EP0IN_MAX_PKT_SIZE) {
2128 pch_udc_ep_clear_nak(&(dev->ep[UDC_EP0IN_IDX])); 2147 pch_udc_ep_clear_nak(&(dev->ep[UDC_EP0IN_IDX]));
2129 /* Gadget would have queued a request when 2148 /* Gadget would have queued a request when
2130 * we called the setup */ 2149 * we called the setup */
2131 pch_udc_set_dma(dev, DMA_DIR_RX); 2150 if (!(dev->setup_data.bRequestType & USB_DIR_IN)) {
2132 pch_udc_ep_clear_nak(ep); 2151 pch_udc_set_dma(dev, DMA_DIR_RX);
2152 pch_udc_ep_clear_nak(ep);
2153 }
2133 } else if (setup_supported < 0) { 2154 } else if (setup_supported < 0) {
2134 /* if unsupported request, then stall */ 2155 /* if unsupported request, then stall */
2135 pch_udc_ep_set_stall(&(dev->ep[UDC_EP0IN_IDX])); 2156 pch_udc_ep_set_stall(&(dev->ep[UDC_EP0IN_IDX]));
@@ -2142,22 +2163,13 @@ static void pch_udc_svc_control_out(struct pch_udc_dev *dev)
2142 } 2163 }
2143 } else if ((((stat & UDC_EPSTS_OUT_MASK) >> UDC_EPSTS_OUT_SHIFT) == 2164 } else if ((((stat & UDC_EPSTS_OUT_MASK) >> UDC_EPSTS_OUT_SHIFT) ==
2144 UDC_EPSTS_OUT_DATA) && !dev->stall) { 2165 UDC_EPSTS_OUT_DATA) && !dev->stall) {
2145 if (list_empty(&ep->queue)) { 2166 pch_udc_clear_dma(dev, DMA_DIR_RX);
2146 dev_err(&dev->pdev->dev, "%s: No request\n", __func__); 2167 pch_udc_ep_set_ddptr(ep, 0);
2147 ep->td_data->status = (ep->td_data->status & 2168 if (!list_empty(&ep->queue)) {
2148 ~PCH_UDC_BUFF_STS) |
2149 PCH_UDC_BS_HST_RDY;
2150 pch_udc_set_dma(dev, DMA_DIR_RX);
2151 } else {
2152 /* control write */
2153 /* next function will pickuo an clear the status */
2154 ep->epsts = stat; 2169 ep->epsts = stat;
2155 2170 pch_udc_svc_data_out(dev, PCH_UDC_EP0);
2156 pch_udc_svc_data_out(dev, 0);
2157 /* re-program desc. pointer for possible ZLPs */
2158 pch_udc_ep_set_ddptr(ep, ep->td_data_phys);
2159 pch_udc_set_dma(dev, DMA_DIR_RX);
2160 } 2171 }
2172 pch_udc_set_dma(dev, DMA_DIR_RX);
2161 } 2173 }
2162 pch_udc_ep_set_rrdy(ep); 2174 pch_udc_ep_set_rrdy(ep);
2163} 2175}
@@ -2174,7 +2186,7 @@ static void pch_udc_postsvc_epinters(struct pch_udc_dev *dev, int ep_num)
2174 struct pch_udc_ep *ep; 2186 struct pch_udc_ep *ep;
2175 struct pch_udc_request *req; 2187 struct pch_udc_request *req;
2176 2188
2177 ep = &dev->ep[2*ep_num]; 2189 ep = &dev->ep[UDC_EPIN_IDX(ep_num)];
2178 if (!list_empty(&ep->queue)) { 2190 if (!list_empty(&ep->queue)) {
2179 req = list_entry(ep->queue.next, struct pch_udc_request, queue); 2191 req = list_entry(ep->queue.next, struct pch_udc_request, queue);
2180 pch_udc_enable_ep_interrupts(ep->dev, 2192 pch_udc_enable_ep_interrupts(ep->dev,
@@ -2196,13 +2208,13 @@ static void pch_udc_read_all_epstatus(struct pch_udc_dev *dev, u32 ep_intr)
2196 for (i = 0; i < PCH_UDC_USED_EP_NUM; i++) { 2208 for (i = 0; i < PCH_UDC_USED_EP_NUM; i++) {
2197 /* IN */ 2209 /* IN */
2198 if (ep_intr & (0x1 << i)) { 2210 if (ep_intr & (0x1 << i)) {
2199 ep = &dev->ep[2*i]; 2211 ep = &dev->ep[UDC_EPIN_IDX(i)];
2200 ep->epsts = pch_udc_read_ep_status(ep); 2212 ep->epsts = pch_udc_read_ep_status(ep);
2201 pch_udc_clear_ep_status(ep, ep->epsts); 2213 pch_udc_clear_ep_status(ep, ep->epsts);
2202 } 2214 }
2203 /* OUT */ 2215 /* OUT */
2204 if (ep_intr & (0x10000 << i)) { 2216 if (ep_intr & (0x10000 << i)) {
2205 ep = &dev->ep[2*i+1]; 2217 ep = &dev->ep[UDC_EPOUT_IDX(i)];
2206 ep->epsts = pch_udc_read_ep_status(ep); 2218 ep->epsts = pch_udc_read_ep_status(ep);
2207 pch_udc_clear_ep_status(ep, ep->epsts); 2219 pch_udc_clear_ep_status(ep, ep->epsts);
2208 } 2220 }
@@ -2563,9 +2575,6 @@ static void pch_udc_pcd_reinit(struct pch_udc_dev *dev)
2563 dev->ep[UDC_EP0IN_IDX].ep.maxpacket = UDC_EP0IN_MAX_PKT_SIZE; 2575 dev->ep[UDC_EP0IN_IDX].ep.maxpacket = UDC_EP0IN_MAX_PKT_SIZE;
2564 dev->ep[UDC_EP0OUT_IDX].ep.maxpacket = UDC_EP0OUT_MAX_PKT_SIZE; 2576 dev->ep[UDC_EP0OUT_IDX].ep.maxpacket = UDC_EP0OUT_MAX_PKT_SIZE;
2565 2577
2566 dev->dma_addr = pci_map_single(dev->pdev, dev->ep0out_buf, 256,
2567 PCI_DMA_FROMDEVICE);
2568
2569 /* remove ep0 in and out from the list. They have own pointer */ 2578 /* remove ep0 in and out from the list. They have own pointer */
2570 list_del_init(&dev->ep[UDC_EP0IN_IDX].ep.ep_list); 2579 list_del_init(&dev->ep[UDC_EP0IN_IDX].ep.ep_list);
2571 list_del_init(&dev->ep[UDC_EP0OUT_IDX].ep.ep_list); 2580 list_del_init(&dev->ep[UDC_EP0OUT_IDX].ep.ep_list);
@@ -2637,6 +2646,13 @@ static int init_dma_pools(struct pch_udc_dev *dev)
2637 dev->ep[UDC_EP0IN_IDX].td_stp_phys = 0; 2646 dev->ep[UDC_EP0IN_IDX].td_stp_phys = 0;
2638 dev->ep[UDC_EP0IN_IDX].td_data = NULL; 2647 dev->ep[UDC_EP0IN_IDX].td_data = NULL;
2639 dev->ep[UDC_EP0IN_IDX].td_data_phys = 0; 2648 dev->ep[UDC_EP0IN_IDX].td_data_phys = 0;
2649
2650 dev->ep0out_buf = kzalloc(UDC_EP0OUT_BUFF_SIZE * 4, GFP_KERNEL);
2651 if (!dev->ep0out_buf)
2652 return -ENOMEM;
2653 dev->dma_addr = dma_map_single(&dev->pdev->dev, dev->ep0out_buf,
2654 UDC_EP0OUT_BUFF_SIZE * 4,
2655 DMA_FROM_DEVICE);
2640 return 0; 2656 return 0;
2641} 2657}
2642 2658
@@ -2750,6 +2766,11 @@ static void pch_udc_remove(struct pci_dev *pdev)
2750 pci_pool_destroy(dev->stp_requests); 2766 pci_pool_destroy(dev->stp_requests);
2751 } 2767 }
2752 2768
2769 if (dev->dma_addr)
2770 dma_unmap_single(&dev->pdev->dev, dev->dma_addr,
2771 UDC_EP0OUT_BUFF_SIZE * 4, DMA_FROM_DEVICE);
2772 kfree(dev->ep0out_buf);
2773
2753 pch_udc_exit(dev); 2774 pch_udc_exit(dev);
2754 2775
2755 if (dev->irq_registered) 2776 if (dev->irq_registered)
@@ -2792,11 +2813,7 @@ static int pch_udc_resume(struct pci_dev *pdev)
2792 int ret; 2813 int ret;
2793 2814
2794 pci_set_power_state(pdev, PCI_D0); 2815 pci_set_power_state(pdev, PCI_D0);
2795 ret = pci_restore_state(pdev); 2816 pci_restore_state(pdev);
2796 if (ret) {
2797 dev_err(&pdev->dev, "%s: pci_restore_state failed\n", __func__);
2798 return ret;
2799 }
2800 ret = pci_enable_device(pdev); 2817 ret = pci_enable_device(pdev);
2801 if (ret) { 2818 if (ret) {
2802 dev_err(&pdev->dev, "%s: pci_enable_device failed\n", __func__); 2819 dev_err(&pdev->dev, "%s: pci_enable_device failed\n", __func__);