diff options
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.c | 56 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.h | 1 |
2 files changed, 19 insertions, 38 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c index c4b65fa7aaf1..ca6db204d644 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.c +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c | |||
| @@ -296,7 +296,9 @@ static void | |||
| 296 | nvc0_graph_init_gpc_0(struct drm_device *dev) | 296 | nvc0_graph_init_gpc_0(struct drm_device *dev) |
| 297 | { | 297 | { |
| 298 | struct nvc0_graph_priv *priv = nv_engine(dev, NVOBJ_ENGINE_GR); | 298 | struct nvc0_graph_priv *priv = nv_engine(dev, NVOBJ_ENGINE_GR); |
| 299 | int gpc; | 299 | u32 data[TP_MAX / 8]; |
| 300 | u8 tpnr[GPC_MAX]; | ||
| 301 | int i, gpc, tpc; | ||
| 300 | 302 | ||
| 301 | /* | 303 | /* |
| 302 | * TP ROP UNKVAL(magic_not_rop_nr) | 304 | * TP ROP UNKVAL(magic_not_rop_nr) |
| @@ -305,26 +307,30 @@ nvc0_graph_init_gpc_0(struct drm_device *dev) | |||
| 305 | * 465: 3/4/4/0 4 7 | 307 | * 465: 3/4/4/0 4 7 |
| 306 | * 470: 3/3/4/4 5 5 | 308 | * 470: 3/3/4/4 5 5 |
| 307 | * 480: 3/4/4/4 6 6 | 309 | * 480: 3/4/4/4 6 6 |
| 308 | 310 | * | |
| 309 | * magicgpc918 | 311 | * magicgpc918 |
| 310 | * 450: 00200000 00000000001000000000000000000000 | 312 | * 450: 00200000 00000000001000000000000000000000 |
| 311 | * 460: 00124925 00000000000100100100100100100101 | 313 | * 460: 00124925 00000000000100100100100100100101 |
| 312 | * 465: 000ba2e9 00000000000010111010001011101001 | 314 | * 465: 000ba2e9 00000000000010111010001011101001 |
| 313 | * 470: 00092493 00000000000010010010010010010011 | 315 | * 470: 00092493 00000000000010010010010010010011 |
| 314 | * 480: 00088889 00000000000010001000100010001001 | 316 | * 480: 00088889 00000000000010001000100010001001 |
| 315 | |||
| 316 | * filled values up to tp_total, remainder 0 | ||
| 317 | * 450: 00003210 00000000 00000000 00000000 | ||
| 318 | * 460: 02321100 00000000 00000000 00000000 | ||
| 319 | * 465: 22111000 00000233 00000000 00000000 | ||
| 320 | * 470: 11110000 00233222 00000000 00000000 | ||
| 321 | * 480: 11110000 03332222 00000000 00000000 | ||
| 322 | */ | 317 | */ |
| 323 | 318 | ||
| 324 | nv_wr32(dev, GPC_BCAST(0x0980), priv->magicgpc980[0]); | 319 | memset(data, 0x00, sizeof(data)); |
| 325 | nv_wr32(dev, GPC_BCAST(0x0984), priv->magicgpc980[1]); | 320 | memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr)); |
| 326 | nv_wr32(dev, GPC_BCAST(0x0988), priv->magicgpc980[2]); | 321 | for (i = 0, gpc = -1; i < priv->tp_total; i++) { |
| 327 | nv_wr32(dev, GPC_BCAST(0x098c), priv->magicgpc980[3]); | 322 | do { |
| 323 | gpc = (gpc + 1) % priv->gpc_nr; | ||
| 324 | } while (!tpnr[gpc]); | ||
| 325 | tpc = priv->tp_nr[gpc] - tpnr[gpc]--; | ||
| 326 | |||
| 327 | data[i / 8] |= tpc << ((i % 8) * 4); | ||
| 328 | } | ||
| 329 | |||
| 330 | nv_wr32(dev, GPC_BCAST(0x0980), data[0]); | ||
| 331 | nv_wr32(dev, GPC_BCAST(0x0984), data[1]); | ||
| 332 | nv_wr32(dev, GPC_BCAST(0x0988), data[2]); | ||
| 333 | nv_wr32(dev, GPC_BCAST(0x098c), data[3]); | ||
| 328 | 334 | ||
| 329 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) { | 335 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) { |
| 330 | nv_wr32(dev, GPC_UNIT(gpc, 0x0914), priv->magic_not_rop_nr << 8 | | 336 | nv_wr32(dev, GPC_UNIT(gpc, 0x0914), priv->magic_not_rop_nr << 8 | |
| @@ -730,43 +736,23 @@ nvc0_graph_create(struct drm_device *dev) | |||
| 730 | if (priv->tp_total == 11) { /* 465, 3/4/4/0, 4 */ | 736 | if (priv->tp_total == 11) { /* 465, 3/4/4/0, 4 */ |
| 731 | priv->magic_not_rop_nr = 0x07; | 737 | priv->magic_not_rop_nr = 0x07; |
| 732 | /* filled values up to tp_total, the rest 0 */ | 738 | /* filled values up to tp_total, the rest 0 */ |
| 733 | priv->magicgpc980[0] = 0x22111000; | ||
| 734 | priv->magicgpc980[1] = 0x00000233; | ||
| 735 | priv->magicgpc980[2] = 0x00000000; | ||
| 736 | priv->magicgpc980[3] = 0x00000000; | ||
| 737 | priv->magicgpc918 = 0x000ba2e9; | 739 | priv->magicgpc918 = 0x000ba2e9; |
| 738 | } else | 740 | } else |
| 739 | if (priv->tp_total == 14) { /* 470, 3/3/4/4, 5 */ | 741 | if (priv->tp_total == 14) { /* 470, 3/3/4/4, 5 */ |
| 740 | priv->magic_not_rop_nr = 0x05; | 742 | priv->magic_not_rop_nr = 0x05; |
| 741 | priv->magicgpc980[0] = 0x11110000; | ||
| 742 | priv->magicgpc980[1] = 0x00233222; | ||
| 743 | priv->magicgpc980[2] = 0x00000000; | ||
| 744 | priv->magicgpc980[3] = 0x00000000; | ||
| 745 | priv->magicgpc918 = 0x00092493; | 743 | priv->magicgpc918 = 0x00092493; |
| 746 | } else | 744 | } else |
| 747 | if (priv->tp_total == 15) { /* 480, 3/4/4/4, 6 */ | 745 | if (priv->tp_total == 15) { /* 480, 3/4/4/4, 6 */ |
| 748 | priv->magic_not_rop_nr = 0x06; | 746 | priv->magic_not_rop_nr = 0x06; |
| 749 | priv->magicgpc980[0] = 0x11110000; | ||
| 750 | priv->magicgpc980[1] = 0x03332222; | ||
| 751 | priv->magicgpc980[2] = 0x00000000; | ||
| 752 | priv->magicgpc980[3] = 0x00000000; | ||
| 753 | priv->magicgpc918 = 0x00088889; | 747 | priv->magicgpc918 = 0x00088889; |
| 754 | } | 748 | } |
| 755 | break; | 749 | break; |
| 756 | case 0xc3: /* 450, 4/0/0/0, 2 */ | 750 | case 0xc3: /* 450, 4/0/0/0, 2 */ |
| 757 | priv->magic_not_rop_nr = 0x03; | 751 | priv->magic_not_rop_nr = 0x03; |
| 758 | priv->magicgpc980[0] = 0x00003210; | ||
| 759 | priv->magicgpc980[1] = 0x00000000; | ||
| 760 | priv->magicgpc980[2] = 0x00000000; | ||
| 761 | priv->magicgpc980[3] = 0x00000000; | ||
| 762 | priv->magicgpc918 = 0x00200000; | 752 | priv->magicgpc918 = 0x00200000; |
| 763 | break; | 753 | break; |
| 764 | case 0xc4: /* 460, 3/4/0/0, 4 */ | 754 | case 0xc4: /* 460, 3/4/0/0, 4 */ |
| 765 | priv->magic_not_rop_nr = 0x01; | 755 | priv->magic_not_rop_nr = 0x01; |
| 766 | priv->magicgpc980[0] = 0x02321100; | ||
| 767 | priv->magicgpc980[1] = 0x00000000; | ||
| 768 | priv->magicgpc980[2] = 0x00000000; | ||
| 769 | priv->magicgpc980[3] = 0x00000000; | ||
| 770 | priv->magicgpc918 = 0x00124925; | 756 | priv->magicgpc918 = 0x00124925; |
| 771 | break; | 757 | break; |
| 772 | } | 758 | } |
| @@ -777,10 +763,6 @@ nvc0_graph_create(struct drm_device *dev) | |||
| 777 | priv->tp_nr[3], priv->rop_nr); | 763 | priv->tp_nr[3], priv->rop_nr); |
| 778 | /* use 0xc3's values... */ | 764 | /* use 0xc3's values... */ |
| 779 | priv->magic_not_rop_nr = 0x03; | 765 | priv->magic_not_rop_nr = 0x03; |
| 780 | priv->magicgpc980[0] = 0x00003210; | ||
| 781 | priv->magicgpc980[1] = 0x00000000; | ||
| 782 | priv->magicgpc980[2] = 0x00000000; | ||
| 783 | priv->magicgpc980[3] = 0x00000000; | ||
| 784 | priv->magicgpc918 = 0x00200000; | 766 | priv->magicgpc918 = 0x00200000; |
| 785 | } | 767 | } |
| 786 | 768 | ||
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.h b/drivers/gpu/drm/nouveau/nvc0_graph.h index f59d848b52eb..f5d184e0689d 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.h +++ b/drivers/gpu/drm/nouveau/nvc0_graph.h | |||
| @@ -58,7 +58,6 @@ struct nvc0_graph_priv { | |||
| 58 | struct nouveau_gpuobj *unk4188b8; | 58 | struct nouveau_gpuobj *unk4188b8; |
| 59 | 59 | ||
| 60 | u8 magic_not_rop_nr; | 60 | u8 magic_not_rop_nr; |
| 61 | u32 magicgpc980[4]; | ||
| 62 | u32 magicgpc918; | 61 | u32 magicgpc918; |
| 63 | }; | 62 | }; |
| 64 | 63 | ||
