1 files changed, 13 insertions, 13 deletions
diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c
index 42ef81461bfc..7fd176fa367a 100644
--- a/arch/mips/kernel/irq-gt641xx.c
+++ b/arch/mips/kernel/irq-gt641xx.c
@@ -29,64 +29,64 @@
 static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock);
-static void ack_gt641xx_irq(unsigned int irq)
+static void ack_gt641xx_irq(struct irq_data *d)
 {
        unsigned long flags;
        u32 cause;
        raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
        cause = GT_READ(GT_INTRCAUSE_OFS);
-        cause &= ~GT641XX_IRQ_TO_BIT(irq);
+        cause &= ~GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRCAUSE_OFS, cause);
        raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
 }
-static void mask_gt641xx_irq(unsigned int irq)
+static void mask_gt641xx_irq(struct irq_data *d)
 {
        unsigned long flags;
        u32 mask;
        raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
        mask = GT_READ(GT_INTRMASK_OFS);
-        mask &= ~GT641XX_IRQ_TO_BIT(irq);
+        mask &= ~GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRMASK_OFS, mask);
        raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
 }
-static void mask_ack_gt641xx_irq(unsigned int irq)
+static void mask_ack_gt641xx_irq(struct irq_data *d)
 {
        unsigned long flags;
        u32 cause, mask;
        raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
        mask = GT_READ(GT_INTRMASK_OFS);
-        mask &= ~GT641XX_IRQ_TO_BIT(irq);
+        mask &= ~GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRMASK_OFS, mask);
        cause = GT_READ(GT_INTRCAUSE_OFS);
-        cause &= ~GT641XX_IRQ_TO_BIT(irq);
+        cause &= ~GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRCAUSE_OFS, cause);
        raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
 }
-static void unmask_gt641xx_irq(unsigned int irq)
+static void unmask_gt641xx_irq(struct irq_data *d)
 {
        unsigned long flags;
        u32 mask;
        raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
        mask = GT_READ(GT_INTRMASK_OFS);
-        mask |= GT641XX_IRQ_TO_BIT(irq);
+        mask |= GT641XX_IRQ_TO_BIT(d->irq);
        GT_WRITE(GT_INTRMASK_OFS, mask);
        raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
 }
 static struct irq_chip gt641xx_irq_chip = {
        .name           = "GT641xx",
-        .ack            = ack_gt641xx_irq,
+        .irq_ack        = ack_gt641xx_irq,
-        .mask           = mask_gt641xx_irq,
+        .irq_mask       = mask_gt641xx_irq,
-        .mask_ack       = mask_ack_gt641xx_irq,
+        .irq_mask_ack   = mask_ack_gt641xx_irq,
-        .unmask         = unmask_gt641xx_irq,
+        .irq_unmask     = unmask_gt641xx_irq,
 };
 void gt641xx_irq_dispatch(void)

diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c index 42ef81461bfc..7fd176fa367a 100644 --- a/arch/mips/kernel/irq-gt641xx.c +++ b/arch/mips/kernel/irq-gt641xx.c
@@ -29,64 +29,64 @@
29		29
30	static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock);	30	static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock);
31		31
32	static void ack_gt641xx_irq(unsigned int irq)	32	static void ack_gt641xx_irq(struct irq_data *d)
33	{	33	{
34	unsigned long flags;	34	unsigned long flags;
35	u32 cause;	35	u32 cause;
36		36
37	raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);	37	raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
38	cause = GT_READ(GT_INTRCAUSE_OFS);	38	cause = GT_READ(GT_INTRCAUSE_OFS);
39	cause &= ~GT641XX_IRQ_TO_BIT(irq);	39	cause &= ~GT641XX_IRQ_TO_BIT(d->irq);
40	GT_WRITE(GT_INTRCAUSE_OFS, cause);	40	GT_WRITE(GT_INTRCAUSE_OFS, cause);
41	raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);	41	raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
42	}	42	}
43		43
44	static void mask_gt641xx_irq(unsigned int irq)	44	static void mask_gt641xx_irq(struct irq_data *d)
45	{	45	{
46	unsigned long flags;	46	unsigned long flags;
47	u32 mask;	47	u32 mask;
48		48
49	raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);	49	raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
50	mask = GT_READ(GT_INTRMASK_OFS);	50	mask = GT_READ(GT_INTRMASK_OFS);
51	mask &= ~GT641XX_IRQ_TO_BIT(irq);	51	mask &= ~GT641XX_IRQ_TO_BIT(d->irq);
52	GT_WRITE(GT_INTRMASK_OFS, mask);	52	GT_WRITE(GT_INTRMASK_OFS, mask);
53	raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);	53	raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
54	}	54	}
55		55
56	static void mask_ack_gt641xx_irq(unsigned int irq)	56	static void mask_ack_gt641xx_irq(struct irq_data *d)
57	{	57	{
58	unsigned long flags;	58	unsigned long flags;
59	u32 cause, mask;	59	u32 cause, mask;
60		60
61	raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);	61	raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
62	mask = GT_READ(GT_INTRMASK_OFS);	62	mask = GT_READ(GT_INTRMASK_OFS);
63	mask &= ~GT641XX_IRQ_TO_BIT(irq);	63	mask &= ~GT641XX_IRQ_TO_BIT(d->irq);
64	GT_WRITE(GT_INTRMASK_OFS, mask);	64	GT_WRITE(GT_INTRMASK_OFS, mask);
65		65
66	cause = GT_READ(GT_INTRCAUSE_OFS);	66	cause = GT_READ(GT_INTRCAUSE_OFS);
67	cause &= ~GT641XX_IRQ_TO_BIT(irq);	67	cause &= ~GT641XX_IRQ_TO_BIT(d->irq);
68	GT_WRITE(GT_INTRCAUSE_OFS, cause);	68	GT_WRITE(GT_INTRCAUSE_OFS, cause);
69	raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);	69	raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
70	}	70	}
71		71
72	static void unmask_gt641xx_irq(unsigned int irq)	72	static void unmask_gt641xx_irq(struct irq_data *d)
73	{	73	{
74	unsigned long flags;	74	unsigned long flags;
75	u32 mask;	75	u32 mask;
76		76
77	raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);	77	raw_spin_lock_irqsave(&gt641xx_irq_lock, flags);
78	mask = GT_READ(GT_INTRMASK_OFS);	78	mask = GT_READ(GT_INTRMASK_OFS);
79	mask \|= GT641XX_IRQ_TO_BIT(irq);	79	mask \|= GT641XX_IRQ_TO_BIT(d->irq);
80	GT_WRITE(GT_INTRMASK_OFS, mask);	80	GT_WRITE(GT_INTRMASK_OFS, mask);
81	raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);	81	raw_spin_unlock_irqrestore(&gt641xx_irq_lock, flags);
82	}	82	}
83		83
84	static struct irq_chip gt641xx_irq_chip = {	84	static struct irq_chip gt641xx_irq_chip = {
85	.name = "GT641xx",	85	.name = "GT641xx",
86	.ack = ack_gt641xx_irq,	86	.irq_ack = ack_gt641xx_irq,
87	.mask = mask_gt641xx_irq,	87	.irq_mask = mask_gt641xx_irq,
88	.mask_ack = mask_ack_gt641xx_irq,	88	.irq_mask_ack = mask_ack_gt641xx_irq,
89	.unmask = unmask_gt641xx_irq,	89	.irq_unmask = unmask_gt641xx_irq,
90	};	90	};
91		91
92	void gt641xx_irq_dispatch(void)	92	void gt641xx_irq_dispatch(void)