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-rw-r--r--sound/pci/Kconfig4
-rw-r--r--sound/pci/oxygen/cs4362a.h69
-rw-r--r--sound/pci/oxygen/cs4398.h69
-rw-r--r--sound/pci/oxygen/virtuoso.c227
4 files changed, 365 insertions, 4 deletions
diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig
index b5903eed6ef5..581debf37dcb 100644
--- a/sound/pci/Kconfig
+++ b/sound/pci/Kconfig
@@ -914,12 +914,12 @@ config SND_VIA82XX_MODEM
914 will be called snd-via82xx-modem. 914 will be called snd-via82xx-modem.
915 915
916config SND_VIRTUOSO 916config SND_VIRTUOSO
917 tristate "Asus Virtuoso 200 (Xonar)" 917 tristate "Asus Virtuoso 100/200 (Xonar)"
918 depends on SND 918 depends on SND
919 select SND_OXYGEN_LIB 919 select SND_OXYGEN_LIB
920 help 920 help
921 Say Y here to include support for sound cards based on the 921 Say Y here to include support for sound cards based on the
922 Asus AV200 chip, i.e., Xonar D2 and Xonar D2X. 922 Asus AV100/AV200 chips, i.e., Xonar D2, DX and D2X.
923 923
924 To compile this driver as a module, choose M here: the module 924 To compile this driver as a module, choose M here: the module
925 will be called snd-virtuoso. 925 will be called snd-virtuoso.
diff --git a/sound/pci/oxygen/cs4362a.h b/sound/pci/oxygen/cs4362a.h
new file mode 100644
index 000000000000..6a4fedf5e1ec
--- /dev/null
+++ b/sound/pci/oxygen/cs4362a.h
@@ -0,0 +1,69 @@
1/* register 01h */
2#define CS4362A_PDN 0x01
3#define CS4362A_DAC1_DIS 0x02
4#define CS4362A_DAC2_DIS 0x04
5#define CS4362A_DAC3_DIS 0x08
6#define CS4362A_MCLKDIV 0x20
7#define CS4362A_FREEZE 0x40
8#define CS4362A_CPEN 0x80
9/* register 02h */
10#define CS4362A_DIF_MASK 0x70
11#define CS4362A_DIF_LJUST 0x00
12#define CS4362A_DIF_I2S 0x10
13#define CS4362A_DIF_RJUST_16 0x20
14#define CS4362A_DIF_RJUST_24 0x30
15#define CS4362A_DIF_RJUST_20 0x40
16#define CS4362A_DIF_RJUST_18 0x50
17/* register 03h */
18#define CS4362A_MUTEC_MASK 0x03
19#define CS4362A_MUTEC_6 0x00
20#define CS4362A_MUTEC_1 0x01
21#define CS4362A_MUTEC_3 0x03
22#define CS4362A_AMUTE 0x04
23#define CS4362A_MUTEC_POL 0x08
24#define CS4362A_RMP_UP 0x10
25#define CS4362A_SNGLVOL 0x20
26#define CS4362A_ZERO_CROSS 0x40
27#define CS4362A_SOFT_RAMP 0x80
28/* register 04h */
29#define CS4362A_RMP_DN 0x01
30#define CS4362A_DEM_MASK 0x06
31#define CS4362A_DEM_NONE 0x00
32#define CS4362A_DEM_44100 0x02
33#define CS4362A_DEM_48000 0x04
34#define CS4362A_DEM_32000 0x06
35#define CS4362A_FILT_SEL 0x10
36/* register 05h */
37#define CS4362A_INV_A1 0x01
38#define CS4362A_INV_B1 0x02
39#define CS4362A_INV_A2 0x04
40#define CS4362A_INV_B2 0x08
41#define CS4362A_INV_A3 0x10
42#define CS4362A_INV_B3 0x20
43/* register 06h */
44#define CS4362A_FM_MASK 0x03
45#define CS4362A_FM_SINGLE 0x00
46#define CS4362A_FM_DOUBLE 0x01
47#define CS4362A_FM_QUAD 0x02
48#define CS4362A_FM_DSD 0x03
49#define CS4362A_ATAPI_MASK 0x7c
50#define CS4362A_ATAPI_B_MUTE 0x00
51#define CS4362A_ATAPI_B_R 0x04
52#define CS4362A_ATAPI_B_L 0x08
53#define CS4362A_ATAPI_B_LR 0x0c
54#define CS4362A_ATAPI_A_MUTE 0x00
55#define CS4362A_ATAPI_A_R 0x10
56#define CS4362A_ATAPI_A_L 0x20
57#define CS4362A_ATAPI_A_LR 0x30
58#define CS4362A_ATAPI_MIX_LR_VOL 0x40
59#define CS4362A_A_EQ_B 0x80
60/* register 07h */
61#define CS4362A_VOL_MASK 0x7f
62#define CS4362A_MUTE 0x80
63/* register 08h: like 07h */
64/* registers 09h..0Bh: like 06h..08h */
65/* registers 0Ch..0Eh: like 06h..08h */
66/* register 12h */
67#define CS4362A_REV_MASK 0x07
68#define CS4362A_PART_MASK 0xf8
69#define CS4362A_PART_CS4362A 0x50
diff --git a/sound/pci/oxygen/cs4398.h b/sound/pci/oxygen/cs4398.h
new file mode 100644
index 000000000000..5faf5efc8826
--- /dev/null
+++ b/sound/pci/oxygen/cs4398.h
@@ -0,0 +1,69 @@
1/* register 1 */
2#define CS4398_REV_MASK 0x07
3#define CS4398_PART_MASK 0xf8
4#define CS4398_PART_CS4398 0x70
5/* register 2 */
6#define CS4398_FM_MASK 0x03
7#define CS4398_FM_SINGLE 0x00
8#define CS4398_FM_DOUBLE 0x01
9#define CS4398_FM_QUAD 0x02
10#define CS4398_FM_DSD 0x03
11#define CS4398_DEM_MASK 0x0c
12#define CS4398_DEM_NONE 0x00
13#define CS4398_DEM_44100 0x04
14#define CS4398_DEM_48000 0x08
15#define CS4398_DEM_32000 0x0c
16#define CS4398_DIF_MASK 0x70
17#define CS4398_DIF_LJUST 0x00
18#define CS4398_DIF_I2S 0x10
19#define CS4398_DIF_RJUST_16 0x20
20#define CS4398_DIF_RJUST_24 0x30
21#define CS4398_DIF_RJUST_20 0x40
22#define CS4398_DIF_RJUST_18 0x50
23#define CS4398_DSD_SRC 0x80
24/* register 3 */
25#define CS4398_ATAPI_MASK 0x1f
26#define CS4398_ATAPI_B_MUTE 0x00
27#define CS4398_ATAPI_B_R 0x01
28#define CS4398_ATAPI_B_L 0x02
29#define CS4398_ATAPI_B_LR 0x03
30#define CS4398_ATAPI_A_MUTE 0x00
31#define CS4398_ATAPI_A_R 0x04
32#define CS4398_ATAPI_A_L 0x08
33#define CS4398_ATAPI_A_LR 0x0c
34#define CS4398_ATAPI_MIX_LR_VOL 0x10
35#define CS4398_INVERT_B 0x20
36#define CS4398_INVERT_A 0x40
37#define CS4398_VOL_B_EQ_A 0x80
38/* register 4 */
39#define CS4398_MUTEP_MASK 0x03
40#define CS4398_MUTEP_AUTO 0x00
41#define CS4398_MUTEP_LOW 0x02
42#define CS4398_MUTEP_HIGH 0x03
43#define CS4398_MUTE_B 0x08
44#define CS4398_MUTE_A 0x10
45#define CS4398_MUTEC_A_EQ_B 0x20
46#define CS4398_DAMUTE 0x40
47#define CS4398_PAMUTE 0x80
48/* register 5 */
49#define CS4398_VOL_A_MASK 0xff
50/* register 6 */
51#define CS4398_VOL_B_MASK 0xff
52/* register 7 */
53#define CS4398_DIR_DSD 0x01
54#define CS4398_FILT_SEL 0x04
55#define CS4398_RMP_DN 0x10
56#define CS4398_RMP_UP 0x20
57#define CS4398_ZERO_CROSS 0x40
58#define CS4398_SOFT_RAMP 0x80
59/* register 8 */
60#define CS4398_MCLKDIV3 0x08
61#define CS4398_MCLKDIV2 0x10
62#define CS4398_FREEZE 0x20
63#define CS4398_CPEN 0x40
64#define CS4398_PDN 0x80
65/* register 9 */
66#define CS4398_DSD_PM_EN 0x01
67#define CS4398_DSD_PM_MODE 0x02
68#define CS4398_INVALID_DSD 0x04
69#define CS4398_STATIC_DSD 0x08
diff --git a/sound/pci/oxygen/virtuoso.c b/sound/pci/oxygen/virtuoso.c
index 9459ca0a1202..1db4aa5dfad4 100644
--- a/sound/pci/oxygen/virtuoso.c
+++ b/sound/pci/oxygen/virtuoso.c
@@ -18,6 +18,9 @@
18 */ 18 */
19 19
20/* 20/*
21 * Xonar D2/D2X
22 * ------------
23 *
21 * CMI8788: 24 * CMI8788:
22 * 25 *
23 * SPI 0 -> 1st PCM1796 (front) 26 * SPI 0 -> 1st PCM1796 (front)
@@ -32,6 +35,33 @@
32 * GPIO 8 -> enable output to speakers 35 * GPIO 8 -> enable output to speakers
33 */ 36 */
34 37
38/*
39 * Xonar DX
40 * --------
41 *
42 * CMI8788:
43 *
44 * I²C <-> CS4398 (front)
45 * <-> CS4362A (surround, center/LFE, back)
46 *
47 * GPI 0 <- external power present
48 *
49 * GPIO 0 -> enable output to speakers
50 * GPIO 1 -> ALT?
51 * GPIO 2 -> M0 of CS5361
52 * GPIO 3 -> M1 of CS5361
53 * GPIO 8 -> line-in/mic-in/digital-out switch?
54 *
55 * CS4398:
56 *
57 * AD0 <- 1
58 * AD1 <- 1
59 *
60 * CS4362A:
61 *
62 * AD0 <- 0
63 */
64
35#include <linux/pci.h> 65#include <linux/pci.h>
36#include <linux/delay.h> 66#include <linux/delay.h>
37#include <linux/mutex.h> 67#include <linux/mutex.h>
@@ -44,11 +74,13 @@
44#include "oxygen.h" 74#include "oxygen.h"
45#include "cm9780.h" 75#include "cm9780.h"
46#include "pcm1796.h" 76#include "pcm1796.h"
77#include "cs4398.h"
78#include "cs4362a.h"
47 79
48MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); 80MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
49MODULE_DESCRIPTION("Asus AV200 driver"); 81MODULE_DESCRIPTION("Asus AVx00 driver");
50MODULE_LICENSE("GPL"); 82MODULE_LICENSE("GPL");
51MODULE_SUPPORTED_DEVICE("{{Asus,AV200}}"); 83MODULE_SUPPORTED_DEVICE("{{Asus,AV100},{Asus,AV200}}");
52 84
53static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 85static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
54static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 86static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
@@ -64,10 +96,12 @@ MODULE_PARM_DESC(enable, "enable card");
64enum { 96enum {
65 MODEL_D2, 97 MODEL_D2,
66 MODEL_D2X, 98 MODEL_D2X,
99 MODEL_DX,
67}; 100};
68 101
69static struct pci_device_id xonar_ids[] __devinitdata = { 102static struct pci_device_id xonar_ids[] __devinitdata = {
70 { OXYGEN_PCI_SUBID(0x1043, 0x8269), .driver_data = MODEL_D2 }, 103 { OXYGEN_PCI_SUBID(0x1043, 0x8269), .driver_data = MODEL_D2 },
104 { OXYGEN_PCI_SUBID(0x1043, 0x8275), .driver_data = MODEL_DX },
71 { OXYGEN_PCI_SUBID(0x1043, 0x82b7), .driver_data = MODEL_D2X }, 105 { OXYGEN_PCI_SUBID(0x1043, 0x82b7), .driver_data = MODEL_D2X },
72 { } 106 { }
73}; 107};
@@ -83,6 +117,14 @@ MODULE_DEVICE_TABLE(pci, xonar_ids);
83#define GPIO_D2_ALT 0x0080 117#define GPIO_D2_ALT 0x0080
84#define GPIO_D2_OUTPUT_ENABLE 0x0100 118#define GPIO_D2_OUTPUT_ENABLE 0x0100
85 119
120#define GPI_DX_EXT_POWER 0x01
121#define GPIO_DX_OUTPUT_ENABLE 0x0001
122#define GPIO_DX_UNKNOWN1 0x0002
123#define GPIO_DX_UNKNOWN2 0x0100
124
125#define I2C_DEVICE_CS4398 0x9e /* 10011, AD1=1, AD0=1, /W=0 */
126#define I2C_DEVICE_CS4362A 0x30 /* 001100, AD0=0, /W=0 */
127
86struct xonar_data { 128struct xonar_data {
87 unsigned int anti_pop_delay; 129 unsigned int anti_pop_delay;
88 u16 output_enable_bit; 130 u16 output_enable_bit;
@@ -107,6 +149,16 @@ static void pcm1796_write(struct oxygen *chip, unsigned int codec,
107 (reg << 8) | value); 149 (reg << 8) | value);
108} 150}
109 151
152static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
153{
154 oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
155}
156
157static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
158{
159 oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
160}
161
110static void xonar_common_init(struct oxygen *chip) 162static void xonar_common_init(struct oxygen *chip)
111{ 163{
112 struct xonar_data *data = chip->model_data; 164 struct xonar_data *data = chip->model_data;
@@ -164,6 +216,66 @@ static void xonar_d2x_init(struct oxygen *chip)
164 xonar_d2_init(chip); 216 xonar_d2_init(chip);
165} 217}
166 218
219static void xonar_dx_init(struct oxygen *chip)
220{
221 struct xonar_data *data = chip->model_data;
222 unsigned int i;
223
224 for (i = 0; i < 8; ++i)
225 chip->dac_volume[i] = 127;
226 data->anti_pop_delay = 800;
227 data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
228 data->ext_power_reg = OXYGEN_GPI_DATA;
229 data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
230 data->ext_power_bit = GPI_DX_EXT_POWER;
231
232 /* XXX the DACs' datasheets say fast mode is not allowed */
233 oxygen_set_bits16(chip, OXYGEN_2WIRE_BUS_STATUS,
234 OXYGEN_2WIRE_SPEED_FAST);
235
236 /* set CPEN (control port mode) and power down */
237 cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
238 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
239 /* configure */
240 cs4398_write(chip, 2, CS4398_FM_SINGLE |
241 CS4398_DEM_NONE | CS4398_DIF_LJUST);
242 cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
243 cs4398_write(chip, 4, CS4398_MUTEP_LOW | CS4398_PAMUTE);
244 cs4398_write(chip, 5, 0);
245 cs4398_write(chip, 6, 0);
246 cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
247 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
248 cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
249 cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
250 CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
251 cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
252 cs4362a_write(chip, 0x05, 0);
253 cs4362a_write(chip, 0x06, CS4362A_FM_SINGLE |
254 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
255 cs4362a_write(chip, 0x09, CS4362A_FM_SINGLE |
256 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
257 cs4362a_write(chip, 0x0c, CS4362A_FM_SINGLE |
258 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
259 cs4362a_write(chip, 0x07, 0);
260 cs4362a_write(chip, 0x08, 0);
261 cs4362a_write(chip, 0x0a, 0);
262 cs4362a_write(chip, 0x0b, 0);
263 cs4362a_write(chip, 0x0d, 0);
264 cs4362a_write(chip, 0x0e, 0);
265 /* clear power down */
266 cs4398_write(chip, 8, CS4398_CPEN);
267 cs4362a_write(chip, 0x01, CS4362A_CPEN);
268
269 oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
270 GPIO_DX_UNKNOWN1 | GPIO_DX_UNKNOWN2);
271
272 xonar_common_init(chip);
273
274 snd_component_add(chip->card, "CS4398");
275 snd_component_add(chip->card, "CS4362A");
276 snd_component_add(chip->card, "CS5361");
277}
278
167static void xonar_cleanup(struct oxygen *chip) 279static void xonar_cleanup(struct oxygen *chip)
168{ 280{
169 struct xonar_data *data = chip->model_data; 281 struct xonar_data *data = chip->model_data;
@@ -171,6 +283,13 @@ static void xonar_cleanup(struct oxygen *chip)
171 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit); 283 oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, data->output_enable_bit);
172} 284}
173 285
286static void xonar_dx_cleanup(struct oxygen *chip)
287{
288 xonar_cleanup(chip);
289 cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
290 oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
291}
292
174static void set_pcm1796_params(struct oxygen *chip, 293static void set_pcm1796_params(struct oxygen *chip,
175 struct snd_pcm_hw_params *params) 294 struct snd_pcm_hw_params *params)
176{ 295{
@@ -219,6 +338,60 @@ static void set_cs53x1_params(struct oxygen *chip,
219 value, GPIO_CS53x1_M_MASK); 338 value, GPIO_CS53x1_M_MASK);
220} 339}
221 340
341static void set_cs43xx_params(struct oxygen *chip,
342 struct snd_pcm_hw_params *params)
343{
344 u8 fm_cs4398, fm_cs4362a;
345
346 fm_cs4398 = CS4398_DEM_NONE | CS4398_DIF_LJUST;
347 fm_cs4362a = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
348 if (params_rate(params) <= 50000) {
349 fm_cs4398 |= CS4398_FM_SINGLE;
350 fm_cs4362a |= CS4362A_FM_SINGLE;
351 } else if (params_rate(params) <= 100000) {
352 fm_cs4398 |= CS4398_FM_DOUBLE;
353 fm_cs4362a |= CS4362A_FM_DOUBLE;
354 } else {
355 fm_cs4398 |= CS4398_FM_QUAD;
356 fm_cs4362a |= CS4362A_FM_QUAD;
357 }
358 cs4398_write(chip, 2, fm_cs4398);
359 cs4362a_write(chip, 0x06, fm_cs4362a);
360 cs4362a_write(chip, 0x09, fm_cs4362a);
361 cs4362a_write(chip, 0x0c, fm_cs4362a);
362}
363
364static void update_cs4362a_volumes(struct oxygen *chip)
365{
366 u8 mute;
367
368 mute = chip->dac_mute ? CS4362A_MUTE : 0;
369 cs4362a_write(chip, 7, (127 - chip->dac_volume[2]) | mute);
370 cs4362a_write(chip, 8, (127 - chip->dac_volume[3]) | mute);
371 cs4362a_write(chip, 10, (127 - chip->dac_volume[4]) | mute);
372 cs4362a_write(chip, 11, (127 - chip->dac_volume[5]) | mute);
373 cs4362a_write(chip, 13, (127 - chip->dac_volume[6]) | mute);
374 cs4362a_write(chip, 14, (127 - chip->dac_volume[7]) | mute);
375}
376
377static void update_cs43xx_volume(struct oxygen *chip)
378{
379 cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2);
380 cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2);
381 update_cs4362a_volumes(chip);
382}
383
384static void update_cs43xx_mute(struct oxygen *chip)
385{
386 u8 reg;
387
388 reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
389 if (chip->dac_mute)
390 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
391 cs4398_write(chip, 4, reg);
392 update_cs4362a_volumes(chip);
393}
394
222static void xonar_gpio_changed(struct oxygen *chip) 395static void xonar_gpio_changed(struct oxygen *chip)
223{ 396{
224 struct xonar_data *data = chip->model_data; 397 struct xonar_data *data = chip->model_data;
@@ -248,6 +421,16 @@ static int pcm1796_volume_info(struct snd_kcontrol *ctl,
248 return 0; 421 return 0;
249} 422}
250 423
424static int cs4362a_volume_info(struct snd_kcontrol *ctl,
425 struct snd_ctl_elem_info *info)
426{
427 info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
428 info->count = 8;
429 info->value.integer.min = 0;
430 info->value.integer.max = 127;
431 return 0;
432}
433
251static int alt_switch_get(struct snd_kcontrol *ctl, 434static int alt_switch_get(struct snd_kcontrol *ctl,
252 struct snd_ctl_elem_value *value) 435 struct snd_ctl_elem_value *value)
253{ 436{
@@ -287,6 +470,7 @@ static const struct snd_kcontrol_new alt_switch = {
287}; 470};
288 471
289static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -12000, 50, 0); 472static const DECLARE_TLV_DB_SCALE(pcm1796_db_scale, -12000, 50, 0);
473static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -12700, 100, 0);
290 474
291static int xonar_d2_control_filter(struct snd_kcontrol_new *template) 475static int xonar_d2_control_filter(struct snd_kcontrol_new *template)
292{ 476{
@@ -301,6 +485,23 @@ static int xonar_d2_control_filter(struct snd_kcontrol_new *template)
301 return 0; 485 return 0;
302} 486}
303 487
488static int xonar_dx_control_filter(struct snd_kcontrol_new *template)
489{
490 if (!strcmp(template->name, "Master Playback Volume")) {
491 template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
492 template->info = cs4362a_volume_info;
493 template->tlv.p = cs4362a_db_scale;
494 } else if (!strncmp(template->name, "CD Capture ", 11)) {
495 return 1; /* no CD input */
496 } else if (!strcmp(template->name,
497 SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK)) ||
498 !strcmp(template->name,
499 SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT))) {
500 return 1; /* no digital input */
501 }
502 return 0;
503}
504
304static int xonar_mixer_init(struct oxygen *chip) 505static int xonar_mixer_init(struct oxygen *chip)
305{ 506{
306 return snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip)); 507 return snd_ctl_add(chip->card, snd_ctl_new1(&alt_switch, chip));
@@ -358,6 +559,28 @@ static const struct oxygen_model xonar_models[] = {
358 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 559 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
359 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST, 560 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
360 }, 561 },
562 [MODEL_DX] = {
563 .shortname = "Xonar DX",
564 .longname = "Asus Virtuoso 100",
565 .chip = "AV200",
566 .owner = THIS_MODULE,
567 .init = xonar_dx_init,
568 .control_filter = xonar_dx_control_filter,
569 .cleanup = xonar_dx_cleanup,
570 .set_dac_params = set_cs43xx_params,
571 .set_adc_params = set_cs53x1_params,
572 .update_dac_volume = update_cs43xx_volume,
573 .update_dac_mute = update_cs43xx_mute,
574 .gpio_changed = xonar_gpio_changed,
575 .model_data_size = sizeof(struct xonar_data),
576 .pcm_dev_cfg = PLAYBACK_0_TO_I2S |
577 PLAYBACK_1_TO_SPDIF |
578 CAPTURE_0_FROM_I2S_2,
579 .dac_channels = 8,
580 .function_flags = OXYGEN_FUNCTION_2WIRE,
581 .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
582 .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
583 },
361}; 584};
362 585
363static int __devinit xonar_probe(struct pci_dev *pci, 586static int __devinit xonar_probe(struct pci_dev *pci,