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-rw-r--r--drivers/spi/spi-tegra114.c48
-rw-r--r--drivers/spi/spi-tegra20-slink.c48
2 files changed, 34 insertions, 62 deletions
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index f62e6e5e90e3..c8604981a058 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -178,7 +178,6 @@ struct tegra_spi_data {
178 void __iomem *base; 178 void __iomem *base;
179 phys_addr_t phys; 179 phys_addr_t phys;
180 unsigned irq; 180 unsigned irq;
181 int dma_req_sel;
182 u32 spi_max_frequency; 181 u32 spi_max_frequency;
183 u32 cur_speed; 182 u32 cur_speed;
184 183
@@ -601,15 +600,15 @@ static int tegra_spi_init_dma_param(struct tegra_spi_data *tspi,
601 dma_addr_t dma_phys; 600 dma_addr_t dma_phys;
602 int ret; 601 int ret;
603 struct dma_slave_config dma_sconfig; 602 struct dma_slave_config dma_sconfig;
604 dma_cap_mask_t mask;
605 603
606 dma_cap_zero(mask); 604 dma_chan = dma_request_slave_channel_reason(tspi->dev,
607 dma_cap_set(DMA_SLAVE, mask); 605 dma_to_memory ? "rx" : "tx");
608 dma_chan = dma_request_channel(mask, NULL, NULL); 606 if (IS_ERR(dma_chan)) {
609 if (!dma_chan) { 607 ret = PTR_ERR(dma_chan);
610 dev_err(tspi->dev, 608 if (ret != -EPROBE_DEFER)
611 "Dma channel is not available, will try later\n"); 609 dev_err(tspi->dev,
612 return -EPROBE_DEFER; 610 "Dma channel is not available: %d\n", ret);
611 return ret;
613 } 612 }
614 613
615 dma_buf = dma_alloc_coherent(tspi->dev, tspi->dma_buf_size, 614 dma_buf = dma_alloc_coherent(tspi->dev, tspi->dma_buf_size,
@@ -620,7 +619,6 @@ static int tegra_spi_init_dma_param(struct tegra_spi_data *tspi,
620 return -ENOMEM; 619 return -ENOMEM;
621 } 620 }
622 621
623 dma_sconfig.slave_id = tspi->dma_req_sel;
624 if (dma_to_memory) { 622 if (dma_to_memory) {
625 dma_sconfig.src_addr = tspi->phys + SPI_RX_FIFO; 623 dma_sconfig.src_addr = tspi->phys + SPI_RX_FIFO;
626 dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 624 dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
@@ -1055,11 +1053,6 @@ static void tegra_spi_parse_dt(struct platform_device *pdev,
1055 struct tegra_spi_data *tspi) 1053 struct tegra_spi_data *tspi)
1056{ 1054{
1057 struct device_node *np = pdev->dev.of_node; 1055 struct device_node *np = pdev->dev.of_node;
1058 u32 of_dma[2];
1059
1060 if (of_property_read_u32_array(np, "nvidia,dma-request-selector",
1061 of_dma, 2) >= 0)
1062 tspi->dma_req_sel = of_dma[1];
1063 1056
1064 if (of_property_read_u32(np, "spi-max-frequency", 1057 if (of_property_read_u32(np, "spi-max-frequency",
1065 &tspi->spi_max_frequency)) 1058 &tspi->spi_max_frequency))
@@ -1138,22 +1131,15 @@ static int tegra_spi_probe(struct platform_device *pdev)
1138 tspi->max_buf_size = SPI_FIFO_DEPTH << 2; 1131 tspi->max_buf_size = SPI_FIFO_DEPTH << 2;
1139 tspi->dma_buf_size = DEFAULT_SPI_DMA_BUF_LEN; 1132 tspi->dma_buf_size = DEFAULT_SPI_DMA_BUF_LEN;
1140 1133
1141 if (tspi->dma_req_sel) { 1134 ret = tegra_spi_init_dma_param(tspi, true);
1142 ret = tegra_spi_init_dma_param(tspi, true); 1135 if (ret < 0)
1143 if (ret < 0) { 1136 goto exit_free_irq;
1144 dev_err(&pdev->dev, "RxDma Init failed, err %d\n", ret); 1137 ret = tegra_spi_init_dma_param(tspi, false);
1145 goto exit_free_irq; 1138 if (ret < 0)
1146 } 1139 goto exit_rx_dma_free;
1147 1140 tspi->max_buf_size = tspi->dma_buf_size;
1148 ret = tegra_spi_init_dma_param(tspi, false); 1141 init_completion(&tspi->tx_dma_complete);
1149 if (ret < 0) { 1142 init_completion(&tspi->rx_dma_complete);
1150 dev_err(&pdev->dev, "TxDma Init failed, err %d\n", ret);
1151 goto exit_rx_dma_free;
1152 }
1153 tspi->max_buf_size = tspi->dma_buf_size;
1154 init_completion(&tspi->tx_dma_complete);
1155 init_completion(&tspi->rx_dma_complete);
1156 }
1157 1143
1158 init_completion(&tspi->xfer_completion); 1144 init_completion(&tspi->xfer_completion);
1159 1145
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
index 1305b8f933ba..dd6f26c05947 100644
--- a/drivers/spi/spi-tegra20-slink.c
+++ b/drivers/spi/spi-tegra20-slink.c
@@ -171,7 +171,6 @@ struct tegra_slink_data {
171 void __iomem *base; 171 void __iomem *base;
172 phys_addr_t phys; 172 phys_addr_t phys;
173 unsigned irq; 173 unsigned irq;
174 int dma_req_sel;
175 u32 spi_max_frequency; 174 u32 spi_max_frequency;
176 u32 cur_speed; 175 u32 cur_speed;
177 176
@@ -630,15 +629,15 @@ static int tegra_slink_init_dma_param(struct tegra_slink_data *tspi,
630 dma_addr_t dma_phys; 629 dma_addr_t dma_phys;
631 int ret; 630 int ret;
632 struct dma_slave_config dma_sconfig; 631 struct dma_slave_config dma_sconfig;
633 dma_cap_mask_t mask;
634 632
635 dma_cap_zero(mask); 633 dma_chan = dma_request_slave_channel(tspi->dev,
636 dma_cap_set(DMA_SLAVE, mask); 634 dma_to_memory ? "rx" : "tx");
637 dma_chan = dma_request_channel(mask, NULL, NULL); 635 if (IS_ERR(dma_chan)) {
638 if (!dma_chan) { 636 ret = PTR_ERR(dma_chan);
639 dev_err(tspi->dev, 637 if (ret != -EPROBE_DEFER)
640 "Dma channel is not available, will try later\n"); 638 dev_err(tspi->dev,
641 return -EPROBE_DEFER; 639 "Dma channel is not available: %d\n", ret);
640 return ret;
642 } 641 }
643 642
644 dma_buf = dma_alloc_coherent(tspi->dev, tspi->dma_buf_size, 643 dma_buf = dma_alloc_coherent(tspi->dev, tspi->dma_buf_size,
@@ -649,7 +648,6 @@ static int tegra_slink_init_dma_param(struct tegra_slink_data *tspi,
649 return -ENOMEM; 648 return -ENOMEM;
650 } 649 }
651 650
652 dma_sconfig.slave_id = tspi->dma_req_sel;
653 if (dma_to_memory) { 651 if (dma_to_memory) {
654 dma_sconfig.src_addr = tspi->phys + SLINK_RX_FIFO; 652 dma_sconfig.src_addr = tspi->phys + SLINK_RX_FIFO;
655 dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 653 dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
@@ -1021,11 +1019,6 @@ static irqreturn_t tegra_slink_isr(int irq, void *context_data)
1021static void tegra_slink_parse_dt(struct tegra_slink_data *tspi) 1019static void tegra_slink_parse_dt(struct tegra_slink_data *tspi)
1022{ 1020{
1023 struct device_node *np = tspi->dev->of_node; 1021 struct device_node *np = tspi->dev->of_node;
1024 u32 of_dma[2];
1025
1026 if (of_property_read_u32_array(np, "nvidia,dma-request-selector",
1027 of_dma, 2) >= 0)
1028 tspi->dma_req_sel = of_dma[1];
1029 1022
1030 if (of_property_read_u32(np, "spi-max-frequency", 1023 if (of_property_read_u32(np, "spi-max-frequency",
1031 &tspi->spi_max_frequency)) 1024 &tspi->spi_max_frequency))
@@ -1129,22 +1122,15 @@ static int tegra_slink_probe(struct platform_device *pdev)
1129 tspi->max_buf_size = SLINK_FIFO_DEPTH << 2; 1122 tspi->max_buf_size = SLINK_FIFO_DEPTH << 2;
1130 tspi->dma_buf_size = DEFAULT_SPI_DMA_BUF_LEN; 1123 tspi->dma_buf_size = DEFAULT_SPI_DMA_BUF_LEN;
1131 1124
1132 if (tspi->dma_req_sel) { 1125 ret = tegra_slink_init_dma_param(tspi, true);
1133 ret = tegra_slink_init_dma_param(tspi, true); 1126 if (ret < 0)
1134 if (ret < 0) { 1127 goto exit_free_irq;
1135 dev_err(&pdev->dev, "RxDma Init failed, err %d\n", ret); 1128 ret = tegra_slink_init_dma_param(tspi, false);
1136 goto exit_free_irq; 1129 if (ret < 0)
1137 } 1130 goto exit_rx_dma_free;
1138 1131 tspi->max_buf_size = tspi->dma_buf_size;
1139 ret = tegra_slink_init_dma_param(tspi, false); 1132 init_completion(&tspi->tx_dma_complete);
1140 if (ret < 0) { 1133 init_completion(&tspi->rx_dma_complete);
1141 dev_err(&pdev->dev, "TxDma Init failed, err %d\n", ret);
1142 goto exit_rx_dma_free;
1143 }
1144 tspi->max_buf_size = tspi->dma_buf_size;
1145 init_completion(&tspi->tx_dma_complete);
1146 init_completion(&tspi->rx_dma_complete);
1147 }
1148 1134
1149 init_completion(&tspi->xfer_completion); 1135 init_completion(&tspi->xfer_completion);
1150 1136