diff options
28 files changed, 146 insertions, 116 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index e2c5a94f683c..1ceb8e276376 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
| @@ -2152,7 +2152,7 @@ static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr) | |||
| 2152 | nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode) << (20 - PAGE_SHIFT); | 2152 | nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode) << (20 - PAGE_SHIFT); |
| 2153 | 2153 | ||
| 2154 | debugf0(" (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode); | 2154 | debugf0(" (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode); |
| 2155 | debugf0(" nr_pages= %u channel-count = %d\n", | 2155 | debugf0(" nr_pages/channel= %u channel-count = %d\n", |
| 2156 | nr_pages, pvt->channel_count); | 2156 | nr_pages, pvt->channel_count); |
| 2157 | 2157 | ||
| 2158 | return nr_pages; | 2158 | return nr_pages; |
| @@ -2171,6 +2171,7 @@ static int init_csrows(struct mem_ctl_info *mci) | |||
| 2171 | int i, j, empty = 1; | 2171 | int i, j, empty = 1; |
| 2172 | enum mem_type mtype; | 2172 | enum mem_type mtype; |
| 2173 | enum edac_type edac_mode; | 2173 | enum edac_type edac_mode; |
| 2174 | int nr_pages = 0; | ||
| 2174 | 2175 | ||
| 2175 | amd64_read_pci_cfg(pvt->F3, NBCFG, &val); | 2176 | amd64_read_pci_cfg(pvt->F3, NBCFG, &val); |
| 2176 | 2177 | ||
| @@ -2194,9 +2195,9 @@ static int init_csrows(struct mem_ctl_info *mci) | |||
| 2194 | 2195 | ||
| 2195 | empty = 0; | 2196 | empty = 0; |
| 2196 | if (csrow_enabled(i, 0, pvt)) | 2197 | if (csrow_enabled(i, 0, pvt)) |
| 2197 | csrow->nr_pages = amd64_csrow_nr_pages(pvt, 0, i); | 2198 | nr_pages = amd64_csrow_nr_pages(pvt, 0, i); |
| 2198 | if (csrow_enabled(i, 1, pvt)) | 2199 | if (csrow_enabled(i, 1, pvt)) |
| 2199 | csrow->nr_pages += amd64_csrow_nr_pages(pvt, 1, i); | 2200 | nr_pages += amd64_csrow_nr_pages(pvt, 1, i); |
| 2200 | 2201 | ||
| 2201 | get_cs_base_and_mask(pvt, i, 0, &base, &mask); | 2202 | get_cs_base_and_mask(pvt, i, 0, &base, &mask); |
| 2202 | /* 8 bytes of resolution */ | 2203 | /* 8 bytes of resolution */ |
| @@ -2204,7 +2205,7 @@ static int init_csrows(struct mem_ctl_info *mci) | |||
| 2204 | mtype = amd64_determine_memory_type(pvt, i); | 2205 | mtype = amd64_determine_memory_type(pvt, i); |
| 2205 | 2206 | ||
| 2206 | debugf1(" for MC node %d csrow %d:\n", pvt->mc_node_id, i); | 2207 | debugf1(" for MC node %d csrow %d:\n", pvt->mc_node_id, i); |
| 2207 | debugf1(" nr_pages: %u\n", csrow->nr_pages); | 2208 | debugf1(" nr_pages: %u\n", nr_pages * pvt->channel_count); |
| 2208 | 2209 | ||
| 2209 | /* | 2210 | /* |
| 2210 | * determine whether CHIPKILL or JUST ECC or NO ECC is operating | 2211 | * determine whether CHIPKILL or JUST ECC or NO ECC is operating |
| @@ -2218,6 +2219,7 @@ static int init_csrows(struct mem_ctl_info *mci) | |||
| 2218 | for (j = 0; j < pvt->channel_count; j++) { | 2219 | for (j = 0; j < pvt->channel_count; j++) { |
| 2219 | csrow->channels[j].dimm->mtype = mtype; | 2220 | csrow->channels[j].dimm->mtype = mtype; |
| 2220 | csrow->channels[j].dimm->edac_mode = edac_mode; | 2221 | csrow->channels[j].dimm->edac_mode = edac_mode; |
| 2222 | csrow->channels[j].dimm->nr_pages = nr_pages; | ||
| 2221 | } | 2223 | } |
| 2222 | } | 2224 | } |
| 2223 | 2225 | ||
diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index fcfe359f7be5..a2dde205f651 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c | |||
| @@ -205,10 +205,10 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
| 205 | mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL; | 205 | mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL; |
| 206 | pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms); | 206 | pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms); |
| 207 | csrow->first_page = mba_base >> PAGE_SHIFT; | 207 | csrow->first_page = mba_base >> PAGE_SHIFT; |
| 208 | csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT; | 208 | dimm->nr_pages = (mba_mask + 1) >> PAGE_SHIFT; |
| 209 | csrow->last_page = csrow->first_page + csrow->nr_pages - 1; | 209 | csrow->last_page = csrow->first_page + dimm->nr_pages - 1; |
| 210 | csrow->page_mask = mba_mask >> PAGE_SHIFT; | 210 | csrow->page_mask = mba_mask >> PAGE_SHIFT; |
| 211 | dimm->grain = csrow->nr_pages << PAGE_SHIFT; | 211 | dimm->grain = dimm->nr_pages << PAGE_SHIFT; |
| 212 | dimm->mtype = MEM_RDDR; | 212 | dimm->mtype = MEM_RDDR; |
| 213 | dimm->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN; | 213 | dimm->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN; |
| 214 | dimm->edac_mode = edac_mode; | 214 | dimm->edac_mode = edac_mode; |
diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c index 94fbb127215a..09e1b5d3df70 100644 --- a/drivers/edac/cell_edac.c +++ b/drivers/edac/cell_edac.c | |||
| @@ -128,6 +128,7 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) | |||
| 128 | struct cell_edac_priv *priv = mci->pvt_info; | 128 | struct cell_edac_priv *priv = mci->pvt_info; |
| 129 | struct device_node *np; | 129 | struct device_node *np; |
| 130 | int j; | 130 | int j; |
| 131 | u32 nr_pages; | ||
| 131 | 132 | ||
| 132 | for (np = NULL; | 133 | for (np = NULL; |
| 133 | (np = of_find_node_by_name(np, "memory")) != NULL;) { | 134 | (np = of_find_node_by_name(np, "memory")) != NULL;) { |
| @@ -142,19 +143,20 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci) | |||
| 142 | if (of_node_to_nid(np) != priv->node) | 143 | if (of_node_to_nid(np) != priv->node) |
| 143 | continue; | 144 | continue; |
| 144 | csrow->first_page = r.start >> PAGE_SHIFT; | 145 | csrow->first_page = r.start >> PAGE_SHIFT; |
| 145 | csrow->nr_pages = resource_size(&r) >> PAGE_SHIFT; | 146 | nr_pages = resource_size(&r) >> PAGE_SHIFT; |
| 146 | csrow->last_page = csrow->first_page + csrow->nr_pages - 1; | 147 | csrow->last_page = csrow->first_page + nr_pages - 1; |
| 147 | 148 | ||
| 148 | for (j = 0; j < csrow->nr_channels; j++) { | 149 | for (j = 0; j < csrow->nr_channels; j++) { |
| 149 | dimm = csrow->channels[j].dimm; | 150 | dimm = csrow->channels[j].dimm; |
| 150 | dimm->mtype = MEM_XDR; | 151 | dimm->mtype = MEM_XDR; |
| 151 | dimm->edac_mode = EDAC_SECDED; | 152 | dimm->edac_mode = EDAC_SECDED; |
| 153 | dimm->nr_pages = nr_pages / csrow->nr_channels; | ||
| 152 | } | 154 | } |
| 153 | dev_dbg(mci->dev, | 155 | dev_dbg(mci->dev, |
| 154 | "Initialized on node %d, chanmask=0x%x," | 156 | "Initialized on node %d, chanmask=0x%x," |
| 155 | " first_page=0x%lx, nr_pages=0x%x\n", | 157 | " first_page=0x%lx, nr_pages=0x%x\n", |
| 156 | priv->node, priv->chanmask, | 158 | priv->node, priv->chanmask, |
| 157 | csrow->first_page, csrow->nr_pages); | 159 | csrow->first_page, dimm->nr_pages); |
| 158 | break; | 160 | break; |
| 159 | } | 161 | } |
| 160 | } | 162 | } |
diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index ee90f3da8f3a..7b764a882dae 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c | |||
| @@ -332,7 +332,7 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) | |||
| 332 | struct dimm_info *dimm; | 332 | struct dimm_info *dimm; |
| 333 | int index, j; | 333 | int index, j; |
| 334 | u32 mbmr, mbbar, bba; | 334 | u32 mbmr, mbbar, bba; |
| 335 | unsigned long row_size, last_nr_pages = 0; | 335 | unsigned long row_size, nr_pages, last_nr_pages = 0; |
| 336 | 336 | ||
| 337 | get_total_mem(pdata); | 337 | get_total_mem(pdata); |
| 338 | 338 | ||
| @@ -351,12 +351,14 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) | |||
| 351 | 351 | ||
| 352 | row_size = bba * (1UL << 28); /* 256M */ | 352 | row_size = bba * (1UL << 28); /* 256M */ |
| 353 | csrow->first_page = last_nr_pages; | 353 | csrow->first_page = last_nr_pages; |
| 354 | csrow->nr_pages = row_size >> PAGE_SHIFT; | 354 | nr_pages = row_size >> PAGE_SHIFT; |
| 355 | csrow->last_page = csrow->first_page + csrow->nr_pages - 1; | 355 | csrow->last_page = csrow->first_page + nr_pages - 1; |
| 356 | last_nr_pages = csrow->last_page + 1; | 356 | last_nr_pages = csrow->last_page + 1; |
| 357 | 357 | ||
| 358 | for (j = 0; j < csrow->nr_channels; j++) { | 358 | for (j = 0; j < csrow->nr_channels; j++) { |
| 359 | dimm = csrow->channels[j].dimm; | 359 | dimm = csrow->channels[j].dimm; |
| 360 | |||
| 361 | dimm->nr_pages = nr_pages / csrow->nr_channels; | ||
| 360 | dimm->mtype = MEM_RDDR; | 362 | dimm->mtype = MEM_RDDR; |
| 361 | dimm->edac_mode = EDAC_SECDED; | 363 | dimm->edac_mode = EDAC_SECDED; |
| 362 | 364 | ||
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index 6cf6ec6bc71e..cf17579ebc6d 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c | |||
| @@ -1044,7 +1044,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
| 1044 | int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ | 1044 | int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ |
| 1045 | int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ | 1045 | int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ |
| 1046 | u8 value; | 1046 | u8 value; |
| 1047 | u32 dra, drc, cumul_size, i; | 1047 | u32 dra, drc, cumul_size, i, nr_pages; |
| 1048 | 1048 | ||
| 1049 | dra = 0; | 1049 | dra = 0; |
| 1050 | for (index = 0; index < 4; index++) { | 1050 | for (index = 0; index < 4; index++) { |
| @@ -1078,11 +1078,13 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
| 1078 | 1078 | ||
| 1079 | csrow->first_page = last_cumul_size; | 1079 | csrow->first_page = last_cumul_size; |
| 1080 | csrow->last_page = cumul_size - 1; | 1080 | csrow->last_page = cumul_size - 1; |
| 1081 | csrow->nr_pages = cumul_size - last_cumul_size; | 1081 | nr_pages = cumul_size - last_cumul_size; |
| 1082 | last_cumul_size = cumul_size; | 1082 | last_cumul_size = cumul_size; |
| 1083 | 1083 | ||
| 1084 | for (i = 0; i < drc_chan + 1; i++) { | 1084 | for (i = 0; i < drc_chan + 1; i++) { |
| 1085 | struct dimm_info *dimm = csrow->channels[i].dimm; | 1085 | struct dimm_info *dimm = csrow->channels[i].dimm; |
| 1086 | |||
| 1087 | dimm->nr_pages = nr_pages / (drc_chan + 1); | ||
| 1086 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ | 1088 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ |
| 1087 | dimm->mtype = MEM_RDDR; /* only one type supported */ | 1089 | dimm->mtype = MEM_RDDR; /* only one type supported */ |
| 1088 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; | 1090 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; |
diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index 5ed97f6eb346..709aca216639 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c | |||
| @@ -349,7 +349,7 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
| 349 | unsigned long last_cumul_size; | 349 | unsigned long last_cumul_size; |
| 350 | int index, j; | 350 | int index, j; |
| 351 | u8 value; | 351 | u8 value; |
| 352 | u32 dra, cumul_size; | 352 | u32 dra, cumul_size, nr_pages; |
| 353 | int drc_chan, drc_drbg, drc_ddim, mem_dev; | 353 | int drc_chan, drc_drbg, drc_ddim, mem_dev; |
| 354 | struct csrow_info *csrow; | 354 | struct csrow_info *csrow; |
| 355 | struct dimm_info *dimm; | 355 | struct dimm_info *dimm; |
| @@ -380,12 +380,13 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
| 380 | 380 | ||
| 381 | csrow->first_page = last_cumul_size; | 381 | csrow->first_page = last_cumul_size; |
| 382 | csrow->last_page = cumul_size - 1; | 382 | csrow->last_page = cumul_size - 1; |
| 383 | csrow->nr_pages = cumul_size - last_cumul_size; | 383 | nr_pages = cumul_size - last_cumul_size; |
| 384 | last_cumul_size = cumul_size; | 384 | last_cumul_size = cumul_size; |
| 385 | 385 | ||
| 386 | for (j = 0; j < drc_chan + 1; j++) { | 386 | for (j = 0; j < drc_chan + 1; j++) { |
| 387 | dimm = csrow->channels[j].dimm; | 387 | dimm = csrow->channels[j].dimm; |
| 388 | 388 | ||
| 389 | dimm->nr_pages = nr_pages / (drc_chan + 1); | ||
| 389 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ | 390 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ |
| 390 | dimm->mtype = MEM_RDDR; /* only one type supported */ | 391 | dimm->mtype = MEM_RDDR; /* only one type supported */ |
| 391 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; | 392 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; |
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 0942efad55c1..072aa81b4a70 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c | |||
| @@ -43,9 +43,10 @@ static void edac_mc_dump_channel(struct rank_info *chan) | |||
| 43 | { | 43 | { |
| 44 | debugf4("\tchannel = %p\n", chan); | 44 | debugf4("\tchannel = %p\n", chan); |
| 45 | debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); | 45 | debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); |
| 46 | debugf4("\tchannel->ce_count = %d\n", chan->dimm->ce_count); | ||
| 47 | debugf4("\tchannel->label = '%s'\n", chan->dimm->label); | ||
| 48 | debugf4("\tchannel->csrow = %p\n\n", chan->csrow); | 46 | debugf4("\tchannel->csrow = %p\n\n", chan->csrow); |
| 47 | debugf4("\tdimm->ce_count = %d\n", chan->dimm->ce_count); | ||
| 48 | debugf4("\tdimm->label = '%s'\n", chan->dimm->label); | ||
| 49 | debugf4("\tdimm->nr_pages = 0x%x\n", chan->dimm->nr_pages); | ||
| 49 | } | 50 | } |
| 50 | 51 | ||
| 51 | static void edac_mc_dump_csrow(struct csrow_info *csrow) | 52 | static void edac_mc_dump_csrow(struct csrow_info *csrow) |
| @@ -55,7 +56,6 @@ static void edac_mc_dump_csrow(struct csrow_info *csrow) | |||
| 55 | debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page); | 56 | debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page); |
| 56 | debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); | 57 | debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); |
| 57 | debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); | 58 | debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); |
| 58 | debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages); | ||
| 59 | debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels); | 59 | debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels); |
| 60 | debugf4("\tcsrow->channels = %p\n", csrow->channels); | 60 | debugf4("\tcsrow->channels = %p\n", csrow->channels); |
| 61 | debugf4("\tcsrow->mci = %p\n\n", csrow->mci); | 61 | debugf4("\tcsrow->mci = %p\n\n", csrow->mci); |
| @@ -652,15 +652,19 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset, | |||
| 652 | int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) | 652 | int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) |
| 653 | { | 653 | { |
| 654 | struct csrow_info *csrows = mci->csrows; | 654 | struct csrow_info *csrows = mci->csrows; |
| 655 | int row, i; | 655 | int row, i, j, n; |
| 656 | 656 | ||
| 657 | debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page); | 657 | debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page); |
| 658 | row = -1; | 658 | row = -1; |
| 659 | 659 | ||
| 660 | for (i = 0; i < mci->nr_csrows; i++) { | 660 | for (i = 0; i < mci->nr_csrows; i++) { |
| 661 | struct csrow_info *csrow = &csrows[i]; | 661 | struct csrow_info *csrow = &csrows[i]; |
| 662 | 662 | n = 0; | |
| 663 | if (csrow->nr_pages == 0) | 663 | for (j = 0; j < csrow->nr_channels; j++) { |
| 664 | struct dimm_info *dimm = csrow->channels[j].dimm; | ||
| 665 | n += dimm->nr_pages; | ||
| 666 | } | ||
| 667 | if (n == 0) | ||
| 664 | continue; | 668 | continue; |
| 665 | 669 | ||
| 666 | debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) " | 670 | debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) " |
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index 487e03eeed26..1dc1c6ca4308 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c | |||
| @@ -144,7 +144,13 @@ static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, | |||
| 144 | static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, | 144 | static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, |
| 145 | int private) | 145 | int private) |
| 146 | { | 146 | { |
| 147 | return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages)); | 147 | int i; |
| 148 | u32 nr_pages = 0; | ||
| 149 | |||
| 150 | for (i = 0; i < csrow->nr_channels; i++) | ||
| 151 | nr_pages += csrow->channels[i].dimm->nr_pages; | ||
| 152 | |||
| 153 | return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); | ||
| 148 | } | 154 | } |
| 149 | 155 | ||
| 150 | static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, | 156 | static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, |
| @@ -519,16 +525,16 @@ static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data) | |||
| 519 | 525 | ||
| 520 | static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data) | 526 | static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data) |
| 521 | { | 527 | { |
| 522 | int total_pages, csrow_idx; | 528 | int total_pages = 0, csrow_idx, j; |
| 523 | 529 | ||
| 524 | for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows; | 530 | for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { |
| 525 | csrow_idx++) { | ||
| 526 | struct csrow_info *csrow = &mci->csrows[csrow_idx]; | 531 | struct csrow_info *csrow = &mci->csrows[csrow_idx]; |
| 527 | 532 | ||
| 528 | if (!csrow->nr_pages) | 533 | for (j = 0; j < csrow->nr_channels; j++) { |
| 529 | continue; | 534 | struct dimm_info *dimm = csrow->channels[j].dimm; |
| 530 | 535 | ||
| 531 | total_pages += csrow->nr_pages; | 536 | total_pages += dimm->nr_pages; |
| 537 | } | ||
| 532 | } | 538 | } |
| 533 | 539 | ||
| 534 | return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); | 540 | return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages)); |
| @@ -900,7 +906,7 @@ static void edac_remove_mci_instance_attributes(struct mem_ctl_info *mci, | |||
| 900 | */ | 906 | */ |
| 901 | int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) | 907 | int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) |
| 902 | { | 908 | { |
| 903 | int i; | 909 | int i, j; |
| 904 | int err; | 910 | int err; |
| 905 | struct csrow_info *csrow; | 911 | struct csrow_info *csrow; |
| 906 | struct kobject *kobj_mci = &mci->edac_mci_kobj; | 912 | struct kobject *kobj_mci = &mci->edac_mci_kobj; |
| @@ -934,10 +940,13 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) | |||
| 934 | /* Make directories for each CSROW object under the mc<id> kobject | 940 | /* Make directories for each CSROW object under the mc<id> kobject |
| 935 | */ | 941 | */ |
| 936 | for (i = 0; i < mci->nr_csrows; i++) { | 942 | for (i = 0; i < mci->nr_csrows; i++) { |
| 943 | int nr_pages = 0; | ||
| 944 | |||
| 937 | csrow = &mci->csrows[i]; | 945 | csrow = &mci->csrows[i]; |
| 946 | for (j = 0; j < csrow->nr_channels; j++) | ||
| 947 | nr_pages += csrow->channels[j].dimm->nr_pages; | ||
| 938 | 948 | ||
| 939 | /* Only expose populated CSROWs */ | 949 | if (nr_pages > 0) { |
| 940 | if (csrow->nr_pages > 0) { | ||
| 941 | err = edac_create_csrow_object(mci, csrow, i); | 950 | err = edac_create_csrow_object(mci, csrow, i); |
| 942 | if (err) { | 951 | if (err) { |
| 943 | debugf1("%s() failure: create csrow %d obj\n", | 952 | debugf1("%s() failure: create csrow %d obj\n", |
| @@ -949,10 +958,14 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) | |||
| 949 | 958 | ||
| 950 | return 0; | 959 | return 0; |
| 951 | 960 | ||
| 952 | /* CSROW error: backout what has already been registered, */ | ||
| 953 | fail1: | 961 | fail1: |
| 954 | for (i--; i >= 0; i--) { | 962 | for (i--; i >= 0; i--) { |
| 955 | if (mci->csrows[i].nr_pages > 0) | 963 | int nr_pages = 0; |
| 964 | |||
| 965 | csrow = &mci->csrows[i]; | ||
| 966 | for (j = 0; j < csrow->nr_channels; j++) | ||
| 967 | nr_pages += csrow->channels[j].dimm->nr_pages; | ||
| 968 | if (nr_pages > 0) | ||
| 956 | kobject_put(&mci->csrows[i].kobj); | 969 | kobject_put(&mci->csrows[i].kobj); |
| 957 | } | 970 | } |
| 958 | 971 | ||
| @@ -972,14 +985,20 @@ fail0: | |||
| 972 | */ | 985 | */ |
| 973 | void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) | 986 | void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci) |
| 974 | { | 987 | { |
| 975 | int i; | 988 | struct csrow_info *csrow; |
| 989 | int i, j; | ||
| 976 | 990 | ||
| 977 | debugf0("%s()\n", __func__); | 991 | debugf0("%s()\n", __func__); |
| 978 | 992 | ||
| 979 | /* remove all csrow kobjects */ | 993 | /* remove all csrow kobjects */ |
| 980 | debugf4("%s() unregister this mci kobj\n", __func__); | 994 | debugf4("%s() unregister this mci kobj\n", __func__); |
| 981 | for (i = 0; i < mci->nr_csrows; i++) { | 995 | for (i = 0; i < mci->nr_csrows; i++) { |
| 982 | if (mci->csrows[i].nr_pages > 0) { | 996 | int nr_pages = 0; |
| 997 | |||
| 998 | csrow = &mci->csrows[i]; | ||
| 999 | for (j = 0; j < csrow->nr_channels; j++) | ||
| 1000 | nr_pages += csrow->channels[j].dimm->nr_pages; | ||
| 1001 | if (nr_pages > 0) { | ||
| 983 | debugf0("%s() unreg csrow-%d\n", __func__, i); | 1002 | debugf0("%s() unreg csrow-%d\n", __func__, i); |
| 984 | kobject_put(&mci->csrows[i].kobj); | 1003 | kobject_put(&mci->csrows[i].kobj); |
| 985 | } | 1004 | } |
diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c index 8fe60ee37826..719ccbed7435 100644 --- a/drivers/edac/i3000_edac.c +++ b/drivers/edac/i3000_edac.c | |||
| @@ -306,7 +306,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) | |||
| 306 | int rc; | 306 | int rc; |
| 307 | int i, j; | 307 | int i, j; |
| 308 | struct mem_ctl_info *mci = NULL; | 308 | struct mem_ctl_info *mci = NULL; |
| 309 | unsigned long last_cumul_size; | 309 | unsigned long last_cumul_size, nr_pages; |
| 310 | int interleaved, nr_channels; | 310 | int interleaved, nr_channels; |
| 311 | unsigned char dra[I3000_RANKS / 2], drb[I3000_RANKS]; | 311 | unsigned char dra[I3000_RANKS / 2], drb[I3000_RANKS]; |
| 312 | unsigned char *c0dra = dra, *c1dra = &dra[I3000_RANKS_PER_CHANNEL / 2]; | 312 | unsigned char *c0dra = dra, *c1dra = &dra[I3000_RANKS_PER_CHANNEL / 2]; |
| @@ -391,11 +391,13 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx) | |||
| 391 | 391 | ||
| 392 | csrow->first_page = last_cumul_size; | 392 | csrow->first_page = last_cumul_size; |
| 393 | csrow->last_page = cumul_size - 1; | 393 | csrow->last_page = cumul_size - 1; |
| 394 | csrow->nr_pages = cumul_size - last_cumul_size; | 394 | nr_pages = cumul_size - last_cumul_size; |
| 395 | last_cumul_size = cumul_size; | 395 | last_cumul_size = cumul_size; |
| 396 | 396 | ||
| 397 | for (j = 0; j < nr_channels; j++) { | 397 | for (j = 0; j < nr_channels; j++) { |
| 398 | struct dimm_info *dimm = csrow->channels[j].dimm; | 398 | struct dimm_info *dimm = csrow->channels[j].dimm; |
| 399 | |||
| 400 | dimm->nr_pages = nr_pages / nr_channels; | ||
| 399 | dimm->grain = I3000_DEAP_GRAIN; | 401 | dimm->grain = I3000_DEAP_GRAIN; |
| 400 | dimm->mtype = MEM_DDR2; | 402 | dimm->mtype = MEM_DDR2; |
| 401 | dimm->dtype = DEV_UNKNOWN; | 403 | dimm->dtype = DEV_UNKNOWN; |
diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 93c4d5a6a623..3b3622209f3e 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c | |||
| @@ -376,11 +376,10 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) | |||
| 376 | if (nr_pages == 0) | 376 | if (nr_pages == 0) |
| 377 | continue; | 377 | continue; |
| 378 | 378 | ||
| 379 | csrow->nr_pages = nr_pages; | ||
| 380 | |||
| 381 | for (j = 0; j < nr_channels; j++) { | 379 | for (j = 0; j < nr_channels; j++) { |
| 382 | struct dimm_info *dimm = csrow->channels[j].dimm; | 380 | struct dimm_info *dimm = csrow->channels[j].dimm; |
| 383 | 381 | ||
| 382 | dimm->nr_pages = nr_pages / nr_channels; | ||
| 384 | dimm->grain = nr_pages << PAGE_SHIFT; | 383 | dimm->grain = nr_pages << PAGE_SHIFT; |
| 385 | dimm->mtype = MEM_DDR2; | 384 | dimm->mtype = MEM_DDR2; |
| 386 | dimm->dtype = DEV_UNKNOWN; | 385 | dimm->dtype = DEV_UNKNOWN; |
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 26b40556958e..f3a1a3e1e4e1 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c | |||
| @@ -1236,6 +1236,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) | |||
| 1236 | { | 1236 | { |
| 1237 | struct i5000_pvt *pvt; | 1237 | struct i5000_pvt *pvt; |
| 1238 | struct csrow_info *p_csrow; | 1238 | struct csrow_info *p_csrow; |
| 1239 | struct dimm_info *dimm; | ||
| 1239 | int empty, channel_count; | 1240 | int empty, channel_count; |
| 1240 | int max_csrows; | 1241 | int max_csrows; |
| 1241 | int mtr, mtr1; | 1242 | int mtr, mtr1; |
| @@ -1265,21 +1266,22 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) | |||
| 1265 | 1266 | ||
| 1266 | csrow_megs = 0; | 1267 | csrow_megs = 0; |
| 1267 | for (channel = 0; channel < pvt->maxch; channel++) { | 1268 | for (channel = 0; channel < pvt->maxch; channel++) { |
| 1269 | dimm = p_csrow->channels[channel].dimm; | ||
| 1268 | csrow_megs += pvt->dimm_info[csrow][channel].megabytes; | 1270 | csrow_megs += pvt->dimm_info[csrow][channel].megabytes; |
| 1269 | p_csrow->channels[channel].dimm->grain = 8; | 1271 | dimm->grain = 8; |
| 1270 | 1272 | ||
| 1271 | /* Assume DDR2 for now */ | 1273 | /* Assume DDR2 for now */ |
| 1272 | p_csrow->channels[channel].dimm->mtype = MEM_FB_DDR2; | 1274 | dimm->mtype = MEM_FB_DDR2; |
| 1273 | 1275 | ||
| 1274 | /* ask what device type on this row */ | 1276 | /* ask what device type on this row */ |
| 1275 | if (MTR_DRAM_WIDTH(mtr)) | 1277 | if (MTR_DRAM_WIDTH(mtr)) |
| 1276 | p_csrow->channels[channel].dimm->dtype = DEV_X8; | 1278 | dimm->dtype = DEV_X8; |
| 1277 | else | 1279 | else |
| 1278 | p_csrow->channels[channel].dimm->dtype = DEV_X4; | 1280 | dimm->dtype = DEV_X4; |
| 1279 | 1281 | ||
| 1280 | p_csrow->channels[channel].dimm->edac_mode = EDAC_S8ECD8ED; | 1282 | dimm->edac_mode = EDAC_S8ECD8ED; |
| 1283 | dimm->nr_pages = (csrow_megs << 8) / pvt->maxch; | ||
| 1281 | } | 1284 | } |
| 1282 | p_csrow->nr_pages = csrow_megs << 8; | ||
| 1283 | 1285 | ||
| 1284 | empty = 0; | 1286 | empty = 0; |
| 1285 | } | 1287 | } |
diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c index 5338c7968f78..c08e94064ef6 100644 --- a/drivers/edac/i5100_edac.c +++ b/drivers/edac/i5100_edac.c | |||
| @@ -859,7 +859,6 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) | |||
| 859 | * FIXME: these two are totally bogus -- I don't see how to | 859 | * FIXME: these two are totally bogus -- I don't see how to |
| 860 | * map them correctly to this structure... | 860 | * map them correctly to this structure... |
| 861 | */ | 861 | */ |
| 862 | mci->csrows[i].nr_pages = npages; | ||
| 863 | mci->csrows[i].csrow_idx = i; | 862 | mci->csrows[i].csrow_idx = i; |
| 864 | mci->csrows[i].mci = mci; | 863 | mci->csrows[i].mci = mci; |
| 865 | mci->csrows[i].nr_channels = 1; | 864 | mci->csrows[i].nr_channels = 1; |
| @@ -867,14 +866,19 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci) | |||
| 867 | total_pages += npages; | 866 | total_pages += npages; |
| 868 | 867 | ||
| 869 | dimm = mci->csrows[i].channels[0].dimm; | 868 | dimm = mci->csrows[i].channels[0].dimm; |
| 870 | dimm->grain = 32; | 869 | dimm->nr_pages = npages; |
| 871 | dimm->dtype = (priv->mtr[chan][rank].width == 4) ? | 870 | if (npages) { |
| 872 | DEV_X4 : DEV_X8; | 871 | total_pages += npages; |
| 873 | dimm->mtype = MEM_RDDR2; | 872 | |
| 874 | dimm->edac_mode = EDAC_SECDED; | 873 | dimm->grain = 32; |
| 875 | snprintf(dimm->label, sizeof(dimm->label), | 874 | dimm->dtype = (priv->mtr[chan][rank].width == 4) ? |
| 876 | "DIMM%u", | 875 | DEV_X4 : DEV_X8; |
| 877 | i5100_rank_to_slot(mci, chan, rank)); | 876 | dimm->mtype = MEM_RDDR2; |
| 877 | dimm->edac_mode = EDAC_SECDED; | ||
| 878 | snprintf(dimm->label, sizeof(dimm->label), | ||
| 879 | "DIMM%u", | ||
| 880 | i5100_rank_to_slot(mci, chan, rank)); | ||
| 881 | } | ||
| 878 | } | 882 | } |
| 879 | } | 883 | } |
| 880 | 884 | ||
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index 6f85dcb34019..6543f4a8367b 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c | |||
| @@ -1156,7 +1156,7 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) | |||
| 1156 | int empty, channel_count; | 1156 | int empty, channel_count; |
| 1157 | int max_csrows; | 1157 | int max_csrows; |
| 1158 | int mtr; | 1158 | int mtr; |
| 1159 | int csrow_megs; | 1159 | int size_mb; |
| 1160 | int channel; | 1160 | int channel; |
| 1161 | int csrow; | 1161 | int csrow; |
| 1162 | struct dimm_info *dimm; | 1162 | struct dimm_info *dimm; |
| @@ -1171,8 +1171,6 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) | |||
| 1171 | for (csrow = 0; csrow < max_csrows; csrow++) { | 1171 | for (csrow = 0; csrow < max_csrows; csrow++) { |
| 1172 | p_csrow = &mci->csrows[csrow]; | 1172 | p_csrow = &mci->csrows[csrow]; |
| 1173 | 1173 | ||
| 1174 | p_csrow->csrow_idx = csrow; | ||
| 1175 | |||
| 1176 | /* use branch 0 for the basis */ | 1174 | /* use branch 0 for the basis */ |
| 1177 | mtr = determine_mtr(pvt, csrow, 0); | 1175 | mtr = determine_mtr(pvt, csrow, 0); |
| 1178 | 1176 | ||
| @@ -1180,12 +1178,11 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) | |||
| 1180 | if (!MTR_DIMMS_PRESENT(mtr)) | 1178 | if (!MTR_DIMMS_PRESENT(mtr)) |
| 1181 | continue; | 1179 | continue; |
| 1182 | 1180 | ||
| 1183 | csrow_megs = 0; | ||
| 1184 | for (channel = 0; channel < pvt->maxch; channel++) { | 1181 | for (channel = 0; channel < pvt->maxch; channel++) { |
| 1185 | csrow_megs += pvt->dimm_info[csrow][channel].megabytes; | 1182 | size_mb = pvt->dimm_info[csrow][channel].megabytes; |
| 1186 | 1183 | ||
| 1187 | p_csrow->nr_pages = csrow_megs << 8; | ||
| 1188 | dimm = p_csrow->channels[channel].dimm; | 1184 | dimm = p_csrow->channels[channel].dimm; |
| 1185 | dimm->nr_pages = size_mb << 8; | ||
| 1189 | dimm->grain = 8; | 1186 | dimm->grain = 8; |
| 1190 | dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; | 1187 | dimm->dtype = MTR_DRAM_WIDTH(mtr) ? DEV_X8 : DEV_X4; |
| 1191 | dimm->mtype = MEM_RDDR2; | 1188 | dimm->mtype = MEM_RDDR2; |
diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c index d4153d6cfe30..d6f3a2d0f70a 100644 --- a/drivers/edac/i7300_edac.c +++ b/drivers/edac/i7300_edac.c | |||
| @@ -617,9 +617,7 @@ static void i7300_enable_error_reporting(struct mem_ctl_info *mci) | |||
| 617 | static int decode_mtr(struct i7300_pvt *pvt, | 617 | static int decode_mtr(struct i7300_pvt *pvt, |
| 618 | int slot, int ch, int branch, | 618 | int slot, int ch, int branch, |
| 619 | struct i7300_dimm_info *dinfo, | 619 | struct i7300_dimm_info *dinfo, |
| 620 | struct csrow_info *p_csrow, | 620 | struct dimm_info *dimm) |
| 621 | struct dimm_info *dimm, | ||
| 622 | u32 *nr_pages) | ||
| 623 | { | 621 | { |
| 624 | int mtr, ans, addrBits, channel; | 622 | int mtr, ans, addrBits, channel; |
| 625 | 623 | ||
| @@ -651,7 +649,6 @@ static int decode_mtr(struct i7300_pvt *pvt, | |||
| 651 | addrBits -= 3; /* 8 bits per bytes */ | 649 | addrBits -= 3; /* 8 bits per bytes */ |
| 652 | 650 | ||
| 653 | dinfo->megabytes = 1 << addrBits; | 651 | dinfo->megabytes = 1 << addrBits; |
| 654 | *nr_pages = dinfo->megabytes << 8; | ||
| 655 | 652 | ||
| 656 | debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); | 653 | debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); |
| 657 | 654 | ||
| @@ -664,8 +661,6 @@ static int decode_mtr(struct i7300_pvt *pvt, | |||
| 664 | debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); | 661 | debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]); |
| 665 | debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); | 662 | debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); |
| 666 | 663 | ||
| 667 | p_csrow->csrow_idx = slot; | ||
| 668 | |||
| 669 | /* | 664 | /* |
| 670 | * The type of error detection actually depends of the | 665 | * The type of error detection actually depends of the |
| 671 | * mode of operation. When it is just one single memory chip, at | 666 | * mode of operation. When it is just one single memory chip, at |
| @@ -675,6 +670,7 @@ static int decode_mtr(struct i7300_pvt *pvt, | |||
| 675 | * See datasheet Sections 7.3.6 to 7.3.8 | 670 | * See datasheet Sections 7.3.6 to 7.3.8 |
| 676 | */ | 671 | */ |
| 677 | 672 | ||
| 673 | dimm->nr_pages = MiB_TO_PAGES(dinfo->megabytes); | ||
| 678 | dimm->grain = 8; | 674 | dimm->grain = 8; |
| 679 | dimm->mtype = MEM_FB_DDR2; | 675 | dimm->mtype = MEM_FB_DDR2; |
| 680 | if (IS_SINGLE_MODE(pvt->mc_settings_a)) { | 676 | if (IS_SINGLE_MODE(pvt->mc_settings_a)) { |
| @@ -774,11 +770,9 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) | |||
| 774 | { | 770 | { |
| 775 | struct i7300_pvt *pvt; | 771 | struct i7300_pvt *pvt; |
| 776 | struct i7300_dimm_info *dinfo; | 772 | struct i7300_dimm_info *dinfo; |
| 777 | struct csrow_info *p_csrow; | ||
| 778 | int rc = -ENODEV; | 773 | int rc = -ENODEV; |
| 779 | int mtr; | 774 | int mtr; |
| 780 | int ch, branch, slot, channel; | 775 | int ch, branch, slot, channel; |
| 781 | u32 nr_pages; | ||
| 782 | struct dimm_info *dimm; | 776 | struct dimm_info *dimm; |
| 783 | 777 | ||
| 784 | pvt = mci->pvt_info; | 778 | pvt = mci->pvt_info; |
| @@ -804,7 +798,6 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) | |||
| 804 | } | 798 | } |
| 805 | 799 | ||
| 806 | /* Get the set of MTR[0-7] regs by each branch */ | 800 | /* Get the set of MTR[0-7] regs by each branch */ |
| 807 | nr_pages = 0; | ||
| 808 | for (slot = 0; slot < MAX_SLOTS; slot++) { | 801 | for (slot = 0; slot < MAX_SLOTS; slot++) { |
| 809 | int where = mtr_regs[slot]; | 802 | int where = mtr_regs[slot]; |
| 810 | for (branch = 0; branch < MAX_BRANCHES; branch++) { | 803 | for (branch = 0; branch < MAX_BRANCHES; branch++) { |
| @@ -815,21 +808,18 @@ static int i7300_init_csrows(struct mem_ctl_info *mci) | |||
| 815 | int channel = to_channel(ch, branch); | 808 | int channel = to_channel(ch, branch); |
| 816 | 809 | ||
| 817 | dinfo = &pvt->dimm_info[slot][channel]; | 810 | dinfo = &pvt->dimm_info[slot][channel]; |
| 818 | p_csrow = &mci->csrows[slot]; | ||
| 819 | 811 | ||
| 820 | dimm = p_csrow->channels[branch * MAX_CH_PER_BRANCH + ch].dimm; | 812 | dimm = mci->csrows[slot].channels[branch * MAX_CH_PER_BRANCH + ch].dimm; |
| 821 | 813 | ||
| 822 | mtr = decode_mtr(pvt, slot, ch, branch, | 814 | mtr = decode_mtr(pvt, slot, ch, branch, |
| 823 | dinfo, p_csrow, dimm, | 815 | dinfo, dimm); |
| 824 | &nr_pages); | 816 | |
| 825 | /* if no DIMMS on this row, continue */ | 817 | /* if no DIMMS on this row, continue */ |
| 826 | if (!MTR_DIMMS_PRESENT(mtr)) | 818 | if (!MTR_DIMMS_PRESENT(mtr)) |
| 827 | continue; | 819 | continue; |
| 828 | 820 | ||
| 829 | /* Update per_csrow memory count */ | ||
| 830 | p_csrow->nr_pages += nr_pages; | ||
| 831 | |||
| 832 | rc = 0; | 821 | rc = 0; |
| 822 | |||
| 833 | } | 823 | } |
| 834 | } | 824 | } |
| 835 | } | 825 | } |
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c index 76c957c525fb..0e3cc34bcc22 100644 --- a/drivers/edac/i7core_edac.c +++ b/drivers/edac/i7core_edac.c | |||
| @@ -715,17 +715,12 @@ static int get_dimm_config(struct mem_ctl_info *mci) | |||
| 715 | npages = MiB_TO_PAGES(size); | 715 | npages = MiB_TO_PAGES(size); |
| 716 | 716 | ||
| 717 | csr = &mci->csrows[csrow]; | 717 | csr = &mci->csrows[csrow]; |
| 718 | csr->nr_pages = npages; | ||
| 719 | |||
| 720 | csr->csrow_idx = csrow; | ||
| 721 | csr->nr_channels = 1; | ||
| 722 | |||
| 723 | csr->channels[0].chan_idx = i; | ||
| 724 | csr->channels[0].ce_count = 0; | ||
| 725 | 718 | ||
| 726 | pvt->csrow_map[i][j] = csrow; | 719 | pvt->csrow_map[i][j] = csrow; |
| 727 | 720 | ||
| 728 | dimm = csr->channels[0].dimm; | 721 | dimm = csr->channels[0].dimm; |
| 722 | dimm->nr_pages = npages; | ||
| 723 | |||
| 729 | switch (banks) { | 724 | switch (banks) { |
| 730 | case 4: | 725 | case 4: |
| 731 | dimm->dtype = DEV_X4; | 726 | dimm->dtype = DEV_X4; |
| @@ -746,6 +741,7 @@ static int get_dimm_config(struct mem_ctl_info *mci) | |||
| 746 | dimm->grain = 8; | 741 | dimm->grain = 8; |
| 747 | dimm->edac_mode = mode; | 742 | dimm->edac_mode = mode; |
| 748 | dimm->mtype = mtype; | 743 | dimm->mtype = mtype; |
| 744 | csrow++; | ||
| 749 | } | 745 | } |
| 750 | 746 | ||
| 751 | pci_read_config_dword(pdev, MC_SAG_CH_0, &value[0]); | 747 | pci_read_config_dword(pdev, MC_SAG_CH_0, &value[0]); |
diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index 0b98dd3408b9..02b252acd999 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c | |||
| @@ -220,7 +220,7 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci, | |||
| 220 | row_base = row_high_limit_last; | 220 | row_base = row_high_limit_last; |
| 221 | csrow->first_page = row_base >> PAGE_SHIFT; | 221 | csrow->first_page = row_base >> PAGE_SHIFT; |
| 222 | csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; | 222 | csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; |
| 223 | csrow->nr_pages = csrow->last_page - csrow->first_page + 1; | 223 | dimm->nr_pages = csrow->last_page - csrow->first_page + 1; |
| 224 | /* EAP reports in 4kilobyte granularity [61] */ | 224 | /* EAP reports in 4kilobyte granularity [61] */ |
| 225 | dimm->grain = 1 << 12; | 225 | dimm->grain = 1 << 12; |
| 226 | dimm->mtype = mtype; | 226 | dimm->mtype = mtype; |
diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index 3eb77845cfca..8485bbf4379f 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c | |||
| @@ -167,7 +167,7 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev) | |||
| 167 | 167 | ||
| 168 | csrow->first_page = last_cumul_size; | 168 | csrow->first_page = last_cumul_size; |
| 169 | csrow->last_page = cumul_size - 1; | 169 | csrow->last_page = cumul_size - 1; |
| 170 | csrow->nr_pages = cumul_size - last_cumul_size; | 170 | dimm->nr_pages = cumul_size - last_cumul_size; |
| 171 | last_cumul_size = cumul_size; | 171 | last_cumul_size = cumul_size; |
| 172 | dimm->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */ | 172 | dimm->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */ |
| 173 | dimm->mtype = MEM_RMBS; | 173 | dimm->mtype = MEM_RMBS; |
diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index eac574285da8..e16281b41f3b 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c | |||
| @@ -347,7 +347,7 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci, | |||
| 347 | unsigned long last_cumul_size; | 347 | unsigned long last_cumul_size; |
| 348 | u8 value; | 348 | u8 value; |
| 349 | u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ | 349 | u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ |
| 350 | u32 cumul_size; | 350 | u32 cumul_size, nr_pages; |
| 351 | int index, j; | 351 | int index, j; |
| 352 | 352 | ||
| 353 | drc_ddim = (drc >> 18) & 0x1; | 353 | drc_ddim = (drc >> 18) & 0x1; |
| @@ -371,12 +371,13 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci, | |||
| 371 | 371 | ||
| 372 | csrow->first_page = last_cumul_size; | 372 | csrow->first_page = last_cumul_size; |
| 373 | csrow->last_page = cumul_size - 1; | 373 | csrow->last_page = cumul_size - 1; |
| 374 | csrow->nr_pages = cumul_size - last_cumul_size; | 374 | nr_pages = cumul_size - last_cumul_size; |
| 375 | last_cumul_size = cumul_size; | 375 | last_cumul_size = cumul_size; |
| 376 | 376 | ||
| 377 | for (j = 0; j < nr_chans; j++) { | 377 | for (j = 0; j < nr_chans; j++) { |
| 378 | dimm = csrow->channels[j].dimm; | 378 | dimm = csrow->channels[j].dimm; |
| 379 | 379 | ||
| 380 | dimm->nr_pages = nr_pages / nr_chans; | ||
| 380 | dimm->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */ | 381 | dimm->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */ |
| 381 | dimm->mtype = MEM_DDR; | 382 | dimm->mtype = MEM_DDR; |
| 382 | dimm->dtype = DEV_UNKNOWN; | 383 | dimm->dtype = DEV_UNKNOWN; |
diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c index b8ec8719e2f5..014a9483fccc 100644 --- a/drivers/edac/i82975x_edac.c +++ b/drivers/edac/i82975x_edac.c | |||
| @@ -370,7 +370,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, | |||
| 370 | struct csrow_info *csrow; | 370 | struct csrow_info *csrow; |
| 371 | unsigned long last_cumul_size; | 371 | unsigned long last_cumul_size; |
| 372 | u8 value; | 372 | u8 value; |
| 373 | u32 cumul_size; | 373 | u32 cumul_size, nr_pages; |
| 374 | int index, chan; | 374 | int index, chan; |
| 375 | struct dimm_info *dimm; | 375 | struct dimm_info *dimm; |
| 376 | enum dev_type dtype; | 376 | enum dev_type dtype; |
| @@ -402,6 +402,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, | |||
| 402 | debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index, | 402 | debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index, |
| 403 | cumul_size); | 403 | cumul_size); |
| 404 | 404 | ||
| 405 | nr_pages = cumul_size - last_cumul_size; | ||
| 405 | /* | 406 | /* |
| 406 | * Initialise dram labels | 407 | * Initialise dram labels |
| 407 | * index values: | 408 | * index values: |
| @@ -411,6 +412,11 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, | |||
| 411 | dtype = i82975x_dram_type(mch_window, index); | 412 | dtype = i82975x_dram_type(mch_window, index); |
| 412 | for (chan = 0; chan < csrow->nr_channels; chan++) { | 413 | for (chan = 0; chan < csrow->nr_channels; chan++) { |
| 413 | dimm = mci->csrows[index].channels[chan].dimm; | 414 | dimm = mci->csrows[index].channels[chan].dimm; |
| 415 | |||
| 416 | if (!nr_pages) | ||
| 417 | continue; | ||
| 418 | |||
| 419 | dimm->nr_pages = nr_pages / csrow->nr_channels; | ||
| 414 | strncpy(csrow->channels[chan].dimm->label, | 420 | strncpy(csrow->channels[chan].dimm->label, |
| 415 | labels[(index >> 1) + (chan * 2)], | 421 | labels[(index >> 1) + (chan * 2)], |
| 416 | EDAC_MC_LABEL_LEN); | 422 | EDAC_MC_LABEL_LEN); |
| @@ -420,12 +426,11 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci, | |||
| 420 | dimm->edac_mode = EDAC_SECDED; /* only supported */ | 426 | dimm->edac_mode = EDAC_SECDED; /* only supported */ |
| 421 | } | 427 | } |
| 422 | 428 | ||
| 423 | if (cumul_size == last_cumul_size) | 429 | if (!nr_pages) |
| 424 | continue; /* not populated */ | 430 | continue; /* not populated */ |
| 425 | 431 | ||
| 426 | csrow->first_page = last_cumul_size; | 432 | csrow->first_page = last_cumul_size; |
| 427 | csrow->last_page = cumul_size - 1; | 433 | csrow->last_page = cumul_size - 1; |
| 428 | csrow->nr_pages = cumul_size - last_cumul_size; | ||
| 429 | last_cumul_size = cumul_size; | 434 | last_cumul_size = cumul_size; |
| 430 | } | 435 | } |
| 431 | } | 436 | } |
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index fb92916d0872..c1d9e158972c 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c | |||
| @@ -947,7 +947,8 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci) | |||
| 947 | 947 | ||
| 948 | csrow->first_page = start; | 948 | csrow->first_page = start; |
| 949 | csrow->last_page = end; | 949 | csrow->last_page = end; |
| 950 | csrow->nr_pages = end + 1 - start; | 950 | |
| 951 | dimm->nr_pages = end + 1 - start; | ||
| 951 | dimm->grain = 8; | 952 | dimm->grain = 8; |
| 952 | dimm->mtype = mtype; | 953 | dimm->mtype = mtype; |
| 953 | dimm->dtype = DEV_UNKNOWN; | 954 | dimm->dtype = DEV_UNKNOWN; |
diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c index d2e3c39ede9f..281e24528599 100644 --- a/drivers/edac/mv64x60_edac.c +++ b/drivers/edac/mv64x60_edac.c | |||
| @@ -667,7 +667,8 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci, | |||
| 667 | 667 | ||
| 668 | csrow = &mci->csrows[0]; | 668 | csrow = &mci->csrows[0]; |
| 669 | dimm = csrow->channels[0].dimm; | 669 | dimm = csrow->channels[0].dimm; |
| 670 | csrow->nr_pages = pdata->total_mem >> PAGE_SHIFT; | 670 | |
| 671 | dimm->nr_pages = pdata->total_mem >> PAGE_SHIFT; | ||
| 671 | dimm->grain = 8; | 672 | dimm->grain = 8; |
| 672 | 673 | ||
| 673 | dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; | 674 | dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR; |
diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c index 4e53270bc336..3fcefda653fd 100644 --- a/drivers/edac/pasemi_edac.c +++ b/drivers/edac/pasemi_edac.c | |||
| @@ -153,20 +153,20 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, | |||
| 153 | switch ((rankcfg & MCDRAM_RANKCFG_TYPE_SIZE_M) >> | 153 | switch ((rankcfg & MCDRAM_RANKCFG_TYPE_SIZE_M) >> |
| 154 | MCDRAM_RANKCFG_TYPE_SIZE_S) { | 154 | MCDRAM_RANKCFG_TYPE_SIZE_S) { |
| 155 | case 0: | 155 | case 0: |
| 156 | csrow->nr_pages = 128 << (20 - PAGE_SHIFT); | 156 | dimm->nr_pages = 128 << (20 - PAGE_SHIFT); |
| 157 | break; | 157 | break; |
| 158 | case 1: | 158 | case 1: |
| 159 | csrow->nr_pages = 256 << (20 - PAGE_SHIFT); | 159 | dimm->nr_pages = 256 << (20 - PAGE_SHIFT); |
| 160 | break; | 160 | break; |
| 161 | case 2: | 161 | case 2: |
| 162 | case 3: | 162 | case 3: |
| 163 | csrow->nr_pages = 512 << (20 - PAGE_SHIFT); | 163 | dimm->nr_pages = 512 << (20 - PAGE_SHIFT); |
| 164 | break; | 164 | break; |
| 165 | case 4: | 165 | case 4: |
| 166 | csrow->nr_pages = 1024 << (20 - PAGE_SHIFT); | 166 | dimm->nr_pages = 1024 << (20 - PAGE_SHIFT); |
| 167 | break; | 167 | break; |
| 168 | case 5: | 168 | case 5: |
| 169 | csrow->nr_pages = 2048 << (20 - PAGE_SHIFT); | 169 | dimm->nr_pages = 2048 << (20 - PAGE_SHIFT); |
| 170 | break; | 170 | break; |
| 171 | default: | 171 | default: |
| 172 | edac_mc_printk(mci, KERN_ERR, | 172 | edac_mc_printk(mci, KERN_ERR, |
| @@ -176,8 +176,8 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci, | |||
| 176 | } | 176 | } |
| 177 | 177 | ||
| 178 | csrow->first_page = last_page_in_mmc; | 178 | csrow->first_page = last_page_in_mmc; |
| 179 | csrow->last_page = csrow->first_page + csrow->nr_pages - 1; | 179 | csrow->last_page = csrow->first_page + dimm->nr_pages - 1; |
| 180 | last_page_in_mmc += csrow->nr_pages; | 180 | last_page_in_mmc += dimm->nr_pages; |
| 181 | csrow->page_mask = 0; | 181 | csrow->page_mask = 0; |
| 182 | dimm->grain = PASEMI_EDAC_ERROR_GRAIN; | 182 | dimm->grain = PASEMI_EDAC_ERROR_GRAIN; |
| 183 | dimm->mtype = MEM_DDR; | 183 | dimm->mtype = MEM_DDR; |
diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c index ec5e529e33f6..95cfc0f8d46d 100644 --- a/drivers/edac/ppc4xx_edac.c +++ b/drivers/edac/ppc4xx_edac.c | |||
| @@ -896,7 +896,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) | |||
| 896 | enum dev_type dtype; | 896 | enum dev_type dtype; |
| 897 | enum edac_type edac_mode; | 897 | enum edac_type edac_mode; |
| 898 | int row, j; | 898 | int row, j; |
| 899 | u32 mbxcf, size; | 899 | u32 mbxcf, size, nr_pages; |
| 900 | 900 | ||
| 901 | /* Establish the memory type and width */ | 901 | /* Establish the memory type and width */ |
| 902 | 902 | ||
| @@ -947,7 +947,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) | |||
| 947 | case SDRAM_MBCF_SZ_2GB: | 947 | case SDRAM_MBCF_SZ_2GB: |
| 948 | case SDRAM_MBCF_SZ_4GB: | 948 | case SDRAM_MBCF_SZ_4GB: |
| 949 | case SDRAM_MBCF_SZ_8GB: | 949 | case SDRAM_MBCF_SZ_8GB: |
| 950 | csi->nr_pages = SDRAM_MBCF_SZ_TO_PAGES(size); | 950 | nr_pages = SDRAM_MBCF_SZ_TO_PAGES(size); |
| 951 | break; | 951 | break; |
| 952 | default: | 952 | default: |
| 953 | ppc4xx_edac_mc_printk(KERN_ERR, mci, | 953 | ppc4xx_edac_mc_printk(KERN_ERR, mci, |
| @@ -973,6 +973,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) | |||
| 973 | for (j = 0; j < csi->nr_channels; j++) { | 973 | for (j = 0; j < csi->nr_channels; j++) { |
| 974 | struct dimm_info *dimm = csi->channels[j].dimm; | 974 | struct dimm_info *dimm = csi->channels[j].dimm; |
| 975 | 975 | ||
| 976 | dimm->nr_pages = nr_pages / csi->nr_channels; | ||
| 976 | dimm->grain = 1; | 977 | dimm->grain = 1; |
| 977 | 978 | ||
| 978 | dimm->mtype = mtype; | 979 | dimm->mtype = mtype; |
diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index 70b0dfa81db4..c41b375e1f38 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c | |||
| @@ -249,7 +249,8 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
| 249 | 249 | ||
| 250 | csrow->first_page = row_base >> PAGE_SHIFT; | 250 | csrow->first_page = row_base >> PAGE_SHIFT; |
| 251 | csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; | 251 | csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1; |
| 252 | csrow->nr_pages = csrow->last_page - csrow->first_page + 1; | 252 | |
| 253 | dimm->nr_pages = csrow->last_page - csrow->first_page + 1; | ||
| 253 | /* Error address is top 19 bits - so granularity is * | 254 | /* Error address is top 19 bits - so granularity is * |
| 254 | * 14 bits */ | 255 | * 14 bits */ |
| 255 | dimm->grain = 1 << 14; | 256 | dimm->grain = 1 << 14; |
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index d5892c052bf4..2ce9bf5e354b 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c | |||
| @@ -561,7 +561,6 @@ static int get_dimm_config(struct mem_ctl_info *mci) | |||
| 561 | u32 reg; | 561 | u32 reg; |
| 562 | enum edac_type mode; | 562 | enum edac_type mode; |
| 563 | enum mem_type mtype; | 563 | enum mem_type mtype; |
| 564 | struct dimm_info *dimm; | ||
| 565 | 564 | ||
| 566 | pci_read_config_dword(pvt->pci_br, SAD_TARGET, ®); | 565 | pci_read_config_dword(pvt->pci_br, SAD_TARGET, ®); |
| 567 | pvt->sbridge_dev->source_id = SOURCE_ID(reg); | 566 | pvt->sbridge_dev->source_id = SOURCE_ID(reg); |
| @@ -613,11 +612,11 @@ static int get_dimm_config(struct mem_ctl_info *mci) | |||
| 613 | /* On all supported DDR3 DIMM types, there are 8 banks available */ | 612 | /* On all supported DDR3 DIMM types, there are 8 banks available */ |
| 614 | banks = 8; | 613 | banks = 8; |
| 615 | 614 | ||
| 616 | dimm = mci->dimms; | ||
| 617 | for (i = 0; i < NUM_CHANNELS; i++) { | 615 | for (i = 0; i < NUM_CHANNELS; i++) { |
| 618 | u32 mtr; | 616 | u32 mtr; |
| 619 | 617 | ||
| 620 | for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) { | 618 | for (j = 0; j < ARRAY_SIZE(mtr_regs); j++) { |
| 619 | struct dimm_info *dimm = &mci->dimms[j]; | ||
| 621 | pci_read_config_dword(pvt->pci_tad[i], | 620 | pci_read_config_dword(pvt->pci_tad[i], |
| 622 | mtr_regs[j], &mtr); | 621 | mtr_regs[j], &mtr); |
| 623 | debugf4("Channel #%d MTR%d = %x\n", i, j, mtr); | 622 | debugf4("Channel #%d MTR%d = %x\n", i, j, mtr); |
| @@ -642,15 +641,12 @@ static int get_dimm_config(struct mem_ctl_info *mci) | |||
| 642 | * csrows. | 641 | * csrows. |
| 643 | */ | 642 | */ |
| 644 | csr = &mci->csrows[csrow]; | 643 | csr = &mci->csrows[csrow]; |
| 645 | csr->nr_pages = npages; | ||
| 646 | csr->csrow_idx = csrow; | ||
| 647 | csr->nr_channels = 1; | ||
| 648 | csr->channels[0].chan_idx = i; | ||
| 649 | pvt->csrow_map[i][j] = csrow; | 644 | pvt->csrow_map[i][j] = csrow; |
| 650 | last_page += npages; | 645 | last_page += npages; |
| 651 | csrow++; | 646 | csrow++; |
| 652 | 647 | ||
| 653 | csr->channels[0].dimm = dimm; | 648 | csr->channels[0].dimm = dimm; |
| 649 | dimm->nr_pages = npages; | ||
| 654 | dimm->grain = 32; | 650 | dimm->grain = 32; |
| 655 | dimm->dtype = (banks == 8) ? DEV_X8 : DEV_X4; | 651 | dimm->dtype = (banks == 8) ? DEV_X8 : DEV_X4; |
| 656 | dimm->mtype = mtype; | 652 | dimm->mtype = mtype; |
diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c index 54067c4b0cc1..054c9bb3a5dc 100644 --- a/drivers/edac/tile_edac.c +++ b/drivers/edac/tile_edac.c | |||
| @@ -110,7 +110,7 @@ static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci) | |||
| 110 | return -1; | 110 | return -1; |
| 111 | } | 111 | } |
| 112 | 112 | ||
| 113 | csrow->nr_pages = mem_info.mem_size >> PAGE_SHIFT; | 113 | dimm->nr_pages = mem_info.mem_size >> PAGE_SHIFT; |
| 114 | dimm->grain = TILE_EDAC_ERROR_GRAIN; | 114 | dimm->grain = TILE_EDAC_ERROR_GRAIN; |
| 115 | dimm->dtype = DEV_UNKNOWN; | 115 | dimm->dtype = DEV_UNKNOWN; |
| 116 | 116 | ||
diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c index bc7f880a4eed..e3247997aa00 100644 --- a/drivers/edac/x38_edac.c +++ b/drivers/edac/x38_edac.c | |||
| @@ -373,10 +373,10 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx) | |||
| 373 | if (nr_pages == 0) | 373 | if (nr_pages == 0) |
| 374 | continue; | 374 | continue; |
| 375 | 375 | ||
| 376 | csrow->nr_pages = nr_pages; | ||
| 377 | |||
| 378 | for (j = 0; j < x38_channel_num; j++) { | 376 | for (j = 0; j < x38_channel_num; j++) { |
| 379 | struct dimm_info *dimm = csrow->channels[j].dimm; | 377 | struct dimm_info *dimm = csrow->channels[j].dimm; |
| 378 | |||
| 379 | dimm->nr_pages = nr_pages / x38_channel_num; | ||
| 380 | dimm->grain = nr_pages << PAGE_SHIFT; | 380 | dimm->grain = nr_pages << PAGE_SHIFT; |
| 381 | dimm->mtype = MEM_DDR2; | 381 | dimm->mtype = MEM_DDR2; |
| 382 | dimm->dtype = DEV_UNKNOWN; | 382 | dimm->dtype = DEV_UNKNOWN; |
diff --git a/include/linux/edac.h b/include/linux/edac.h index 87aa07d2ee28..67717cab1313 100644 --- a/include/linux/edac.h +++ b/include/linux/edac.h | |||
| @@ -324,6 +324,8 @@ struct dimm_info { | |||
| 324 | enum mem_type mtype; /* memory dimm type */ | 324 | enum mem_type mtype; /* memory dimm type */ |
| 325 | enum edac_type edac_mode; /* EDAC mode for this dimm */ | 325 | enum edac_type edac_mode; /* EDAC mode for this dimm */ |
| 326 | 326 | ||
| 327 | u32 nr_pages; /* number of pages in csrow */ | ||
| 328 | |||
| 327 | u32 ce_count; /* Correctable Errors for this dimm */ | 329 | u32 ce_count; /* Correctable Errors for this dimm */ |
| 328 | }; | 330 | }; |
| 329 | 331 | ||
| @@ -350,12 +352,12 @@ struct rank_info { | |||
| 350 | }; | 352 | }; |
| 351 | 353 | ||
| 352 | struct csrow_info { | 354 | struct csrow_info { |
| 355 | /* Used only by edac_mc_find_csrow_by_page() */ | ||
| 353 | unsigned long first_page; /* first page number in csrow */ | 356 | unsigned long first_page; /* first page number in csrow */ |
| 354 | unsigned long last_page; /* last page number in csrow */ | 357 | unsigned long last_page; /* last page number in csrow */ |
| 355 | u32 nr_pages; /* number of pages in csrow */ | ||
| 356 | unsigned long page_mask; /* used for interleaving - | 358 | unsigned long page_mask; /* used for interleaving - |
| 357 | * 0UL for non intlv | 359 | * 0UL for non intlv */ |
| 358 | */ | 360 | |
| 359 | int csrow_idx; /* the chip-select row */ | 361 | int csrow_idx; /* the chip-select row */ |
| 360 | 362 | ||
| 361 | u32 ue_count; /* Uncorrectable Errors for this csrow */ | 363 | u32 ue_count; /* Uncorrectable Errors for this csrow */ |
