2 files changed, 46 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 454feb61217e..fb192713e73b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -302,6 +302,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += am3517-craneboard.dtb \
         omap3-ha.dtb \
         omap3-ha-lcd.dtb \
         omap3-igep0020.dtb \
+        omap3-igep0020-rev-f.dtb \
         omap3-igep0030.dtb \
         omap3-igep0030-rev-g.dtb \
         omap3-ldp.dtb \
diff --git a/arch/arm/boot/dts/omap3-igep0020-rev-f.dts b/arch/arm/boot/dts/omap3-igep0020-rev-f.dts
new file mode 100644
index 000000000000..cc8bd0cd8cf8
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-igep0020-rev-f.dts
@@ -0,0 +1,45 @@
+/*
+ * Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x)
+ *
+ * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
+ * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "omap3-igep0020-common.dtsi"
+
+/ {
+        model = "IGEPv2 Rev. F (TI OMAP AM/DM37x)";
+        compatible = "isee,omap3-igep0020-rev-f", "ti,omap36xx", "ti,omap3";
+
+        /* Regulator to trigger the WL_EN signal of the Wifi module */
+        lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
+                compatible = "regulator-fixed";
+                regulator-name = "regulator-lbep5clwmc-wlen";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>;            /* gpio_139 - WL_EN */
+                enable-active-high;
+        };
+};
+
+&omap3_pmx_core {
+        lbep5clwmc_pins: pinmux_lbep5clwmc_pins {
+                pinctrl-single,pins = <
+                        OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT | MUX_MODE4)        /* mcspi1_cs3.gpio_177 - W_IRQ */
+                        OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)       /* sdmmc2_dat5.gpio_137 - BT_EN */
+                        OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)       /* sdmmc2_dat7.gpio_139 - WL_EN */
+                >;
+        };
+};
+
+&mmc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
+        vmmc-supply = <&lbep5clwmc_wlen>;
+        bus-width = <4>;
+        non-removable;
+};