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-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_object.c97
-rw-r--r--drivers/gpu/drm/nouveau/nv10_graph.c1
-rw-r--r--drivers/gpu/drm/nouveau/nv20_graph.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv40_graph.c1
6 files changed, 53 insertions, 52 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 2fdc26655ca1..2099f04c0b0a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -842,8 +842,6 @@ extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
842 uint32_t *o_ret); 842 uint32_t *o_ret);
843extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class, 843extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
844 struct nouveau_gpuobj **); 844 struct nouveau_gpuobj **);
845extern int nouveau_gpuobj_sw_new(struct nouveau_channel *, int class,
846 struct nouveau_gpuobj **);
847extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data, 845extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
848 struct drm_file *); 846 struct drm_file *);
849extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data, 847extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index f70bec835f5f..75ce1b45d8a4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -437,7 +437,7 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
437 int ret; 437 int ret;
438 438
439 /* Create an NV_SW object for various sync purposes */ 439 /* Create an NV_SW object for various sync purposes */
440 ret = nouveau_gpuobj_sw_new(chan, NV_SW, &obj); 440 ret = nouveau_gpuobj_gr_new(chan, NV_SW, &obj);
441 if (ret) 441 if (ret)
442 return ret; 442 return ret;
443 443
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
index 70ffd7530503..9c26da4cdc00 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -495,23 +495,67 @@ nouveau_gpuobj_gart_dma_new(struct nouveau_channel *chan,
495 entry[5]: 495 entry[5]:
496 set to 0? 496 set to 0?
497*/ 497*/
498static int
499nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class,
500 struct nouveau_gpuobj **gpuobj_ret)
501{
502 struct drm_nouveau_private *dev_priv;
503 struct nouveau_gpuobj *gpuobj;
504
505 if (!chan || !gpuobj_ret || *gpuobj_ret != NULL)
506 return -EINVAL;
507 dev_priv = chan->dev->dev_private;
508
509 gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);
510 if (!gpuobj)
511 return -ENOMEM;
512 gpuobj->dev = chan->dev;
513 gpuobj->engine = NVOBJ_ENGINE_SW;
514 gpuobj->class = class;
515 kref_init(&gpuobj->refcount);
516 gpuobj->cinst = 0x40;
517
518 spin_lock(&dev_priv->ramin_lock);
519 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
520 spin_unlock(&dev_priv->ramin_lock);
521 *gpuobj_ret = gpuobj;
522 return 0;
523}
524
498int 525int
499nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class, 526nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
500 struct nouveau_gpuobj **gpuobj) 527 struct nouveau_gpuobj **gpuobj)
501{ 528{
529 struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
530 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
531 struct nouveau_pgraph_object_class *grc;
502 struct drm_device *dev = chan->dev; 532 struct drm_device *dev = chan->dev;
503 struct drm_nouveau_private *dev_priv = dev->dev_private;
504 int ret; 533 int ret;
505 534
506 NV_DEBUG(dev, "ch%d class=0x%04x\n", chan->id, class); 535 NV_DEBUG(dev, "ch%d class=0x%04x\n", chan->id, class);
507 536
537 grc = pgraph->grclass;
538 while (grc->id) {
539 if (grc->id == class)
540 break;
541 grc++;
542 }
543
544 if (!grc->id) {
545 NV_ERROR(dev, "illegal object class: 0x%x\n", class);
546 return -EINVAL;
547 }
548
549 if (grc->engine == NVOBJ_ENGINE_SW)
550 return nouveau_gpuobj_sw_new(chan, class, gpuobj);
551
508 ret = nouveau_gpuobj_new(dev, chan, 552 ret = nouveau_gpuobj_new(dev, chan,
509 nouveau_gpuobj_class_instmem_size(dev, class), 553 nouveau_gpuobj_class_instmem_size(dev, class),
510 16, 554 16,
511 NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, 555 NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE,
512 gpuobj); 556 gpuobj);
513 if (ret) { 557 if (ret) {
514 NV_ERROR(dev, "Error creating gpuobj: %d\n", ret); 558 NV_ERROR(dev, "error creating gpuobj: %d\n", ret);
515 return ret; 559 return ret;
516 } 560 }
517 561
@@ -541,38 +585,11 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
541 } 585 }
542 dev_priv->engine.instmem.flush(dev); 586 dev_priv->engine.instmem.flush(dev);
543 587
544 (*gpuobj)->engine = NVOBJ_ENGINE_GR; 588 (*gpuobj)->engine = grc->engine;
545 (*gpuobj)->class = class; 589 (*gpuobj)->class = class;
546 return 0; 590 return 0;
547} 591}
548 592
549int
550nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class,
551 struct nouveau_gpuobj **gpuobj_ret)
552{
553 struct drm_nouveau_private *dev_priv;
554 struct nouveau_gpuobj *gpuobj;
555
556 if (!chan || !gpuobj_ret || *gpuobj_ret != NULL)
557 return -EINVAL;
558 dev_priv = chan->dev->dev_private;
559
560 gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);
561 if (!gpuobj)
562 return -ENOMEM;
563 gpuobj->dev = chan->dev;
564 gpuobj->engine = NVOBJ_ENGINE_SW;
565 gpuobj->class = class;
566 kref_init(&gpuobj->refcount);
567 gpuobj->cinst = 0x40;
568
569 spin_lock(&dev_priv->ramin_lock);
570 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list);
571 spin_unlock(&dev_priv->ramin_lock);
572 *gpuobj_ret = gpuobj;
573 return 0;
574}
575
576static int 593static int
577nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan) 594nouveau_gpuobj_channel_init_pramin(struct nouveau_channel *chan)
578{ 595{
@@ -868,10 +885,7 @@ nouveau_gpuobj_resume(struct drm_device *dev)
868int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data, 885int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,
869 struct drm_file *file_priv) 886 struct drm_file *file_priv)
870{ 887{
871 struct drm_nouveau_private *dev_priv = dev->dev_private;
872 struct drm_nouveau_grobj_alloc *init = data; 888 struct drm_nouveau_grobj_alloc *init = data;
873 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
874 struct nouveau_pgraph_object_class *grc;
875 struct nouveau_gpuobj *gr = NULL; 889 struct nouveau_gpuobj *gr = NULL;
876 struct nouveau_channel *chan; 890 struct nouveau_channel *chan;
877 int ret; 891 int ret;
@@ -879,18 +893,6 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,
879 if (init->handle == ~0) 893 if (init->handle == ~0)
880 return -EINVAL; 894 return -EINVAL;
881 895
882 grc = pgraph->grclass;
883 while (grc->id) {
884 if (grc->id == init->class)
885 break;
886 grc++;
887 }
888
889 if (!grc->id) {
890 NV_ERROR(dev, "Illegal object class: 0x%x\n", init->class);
891 return -EPERM;
892 }
893
894 chan = nouveau_channel_get(dev, file_priv, init->channel); 896 chan = nouveau_channel_get(dev, file_priv, init->channel);
895 if (IS_ERR(chan)) 897 if (IS_ERR(chan))
896 return PTR_ERR(chan); 898 return PTR_ERR(chan);
@@ -900,10 +902,7 @@ int nouveau_ioctl_grobj_alloc(struct drm_device *dev, void *data,
900 goto out; 902 goto out;
901 } 903 }
902 904
903 if (grc->engine != NVOBJ_ENGINE_SW) 905 ret = nouveau_gpuobj_gr_new(chan, init->class, &gr);
904 ret = nouveau_gpuobj_gr_new(chan, grc->id, &gr);
905 else
906 ret = nouveau_gpuobj_sw_new(chan, grc->id, &gr);
907 if (ret) { 906 if (ret) {
908 NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n", 907 NV_ERROR(dev, "Error creating object: %d (%d/0x%08x)\n",
909 ret, init->channel, init->handle); 908 ret, init->channel, init->handle);
diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c
index 375d63161d12..ed31a622889e 100644
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -1075,6 +1075,7 @@ static struct nouveau_pgraph_object_method nv17_graph_celsius_mthds[] = {
1075}; 1075};
1076 1076
1077struct nouveau_pgraph_object_class nv10_graph_grclass[] = { 1077struct nouveau_pgraph_object_class nv10_graph_grclass[] = {
1078 { 0x506e, NVOBJ_ENGINE_SW, NULL }, /* nvsw */
1078 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */ 1079 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
1079 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */ 1080 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
1080 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */ 1081 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index 109418d72f93..872f8d059694 100644
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -757,6 +757,7 @@ nv30_graph_init(struct drm_device *dev)
757} 757}
758 758
759struct nouveau_pgraph_object_class nv20_graph_grclass[] = { 759struct nouveau_pgraph_object_class nv20_graph_grclass[] = {
760 { 0x506e, NVOBJ_ENGINE_SW, NULL }, /* nvsw */
760 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */ 761 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
761 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */ 762 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
762 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */ 763 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */
@@ -777,6 +778,7 @@ struct nouveau_pgraph_object_class nv20_graph_grclass[] = {
777}; 778};
778 779
779struct nouveau_pgraph_object_class nv30_graph_grclass[] = { 780struct nouveau_pgraph_object_class nv30_graph_grclass[] = {
781 { 0x506e, NVOBJ_ENGINE_SW, NULL }, /* nvsw */
780 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */ 782 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
781 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */ 783 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
782 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */ 784 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index cd47760b2d0a..70d957895cea 100644
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -409,6 +409,7 @@ void nv40_graph_takedown(struct drm_device *dev)
409} 409}
410 410
411struct nouveau_pgraph_object_class nv40_graph_grclass[] = { 411struct nouveau_pgraph_object_class nv40_graph_grclass[] = {
412 { 0x506e, NVOBJ_ENGINE_SW, NULL }, /* nvsw */
412 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */ 413 { 0x0030, NVOBJ_ENGINE_GR, NULL }, /* null */
413 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */ 414 { 0x0039, NVOBJ_ENGINE_GR, NULL }, /* m2mf */
414 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */ 415 { 0x004a, NVOBJ_ENGINE_GR, NULL }, /* gdirect */