2 files changed, 25 insertions, 28 deletions

diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 3b9baea9a4c2..3911e0450bbe 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -240,24 +240,6 @@ static void i915_save_display(struct drm_device *dev)
                 dev_priv->regfile.savePP_DIVISOR = I915_READ(PP_DIVISOR);
         }
 
-        if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
-                /* Display Port state */
-                if (SUPPORTS_INTEGRATED_DP(dev)) {
-                        dev_priv->regfile.saveDP_B = I915_READ(DP_B);
-                        dev_priv->regfile.saveDP_C = I915_READ(DP_C);
-                        dev_priv->regfile.saveDP_D = I915_READ(DP_D);
-                        dev_priv->regfile.savePIPEA_GMCH_DATA_M = I915_READ(_PIPEA_GMCH_DATA_M);
-                        dev_priv->regfile.savePIPEB_GMCH_DATA_M = I915_READ(_PIPEB_GMCH_DATA_M);
-                        dev_priv->regfile.savePIPEA_GMCH_DATA_N = I915_READ(_PIPEA_GMCH_DATA_N);
-                        dev_priv->regfile.savePIPEB_GMCH_DATA_N = I915_READ(_PIPEB_GMCH_DATA_N);
-                        dev_priv->regfile.savePIPEA_DP_LINK_M = I915_READ(_PIPEA_DP_LINK_M);
-                        dev_priv->regfile.savePIPEB_DP_LINK_M = I915_READ(_PIPEB_DP_LINK_M);
-                        dev_priv->regfile.savePIPEA_DP_LINK_N = I915_READ(_PIPEA_DP_LINK_N);
-                        dev_priv->regfile.savePIPEB_DP_LINK_N = I915_READ(_PIPEB_DP_LINK_N);
-                }
-                /* FIXME: regfile.save TV & SDVO state */
-        }
-
         /* Only regfile.save FBC state on the platform that supports FBC */
         if (I915_HAS_FBC(dev)) {
                 if (HAS_PCH_SPLIT(dev)) {
@@ -323,16 +305,6 @@ static void i915_restore_display(struct drm_device *dev)
                 I915_WRITE(PP_CONTROL, dev_priv->regfile.savePP_CONTROL);
         }
 
-        if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
-                /* Display Port state */
-                if (SUPPORTS_INTEGRATED_DP(dev)) {
-                        I915_WRITE(DP_B, dev_priv->regfile.saveDP_B);
-                        I915_WRITE(DP_C, dev_priv->regfile.saveDP_C);
-                        I915_WRITE(DP_D, dev_priv->regfile.saveDP_D);
-                }
-                /* FIXME: restore TV & SDVO state */
-        }
-
         /* only restore FBC info on the platform that supports FBC*/
         intel_disable_fbc(dev);
         if (I915_HAS_FBC(dev)) {
@@ -347,6 +319,7 @@ static void i915_restore_display(struct drm_device *dev)
                         I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
                 }
         }
+
         if (!drm_core_check_feature(dev, DRIVER_MODESET))
                 i915_restore_vga(dev);
         else
diff --git a/drivers/gpu/drm/i915/i915_ums.c b/drivers/gpu/drm/i915/i915_ums.c
index 359c77b7b1b2..985a09716237 100644
--- a/drivers/gpu/drm/i915/i915_ums.c
+++ b/drivers/gpu/drm/i915/i915_ums.c
@@ -254,6 +254,22 @@ void i915_save_display_reg(struct drm_device *dev)
         else
                 dev_priv->regfile.saveADPA = I915_READ(ADPA);
 
+        /* Display Port state */
+        if (SUPPORTS_INTEGRATED_DP(dev)) {
+                dev_priv->regfile.saveDP_B = I915_READ(DP_B);
+                dev_priv->regfile.saveDP_C = I915_READ(DP_C);
+                dev_priv->regfile.saveDP_D = I915_READ(DP_D);
+                dev_priv->regfile.savePIPEA_GMCH_DATA_M = I915_READ(_PIPEA_GMCH_DATA_M);
+                dev_priv->regfile.savePIPEB_GMCH_DATA_M = I915_READ(_PIPEB_GMCH_DATA_M);
+                dev_priv->regfile.savePIPEA_GMCH_DATA_N = I915_READ(_PIPEA_GMCH_DATA_N);
+                dev_priv->regfile.savePIPEB_GMCH_DATA_N = I915_READ(_PIPEB_GMCH_DATA_N);
+                dev_priv->regfile.savePIPEA_DP_LINK_M = I915_READ(_PIPEA_DP_LINK_M);
+                dev_priv->regfile.savePIPEB_DP_LINK_M = I915_READ(_PIPEB_DP_LINK_M);
+                dev_priv->regfile.savePIPEA_DP_LINK_N = I915_READ(_PIPEA_DP_LINK_N);
+                dev_priv->regfile.savePIPEB_DP_LINK_N = I915_READ(_PIPEB_DP_LINK_N);
+        }
+        /* FIXME: regfile.save TV & SDVO state */
+
         return;
 }
 
@@ -475,5 +491,13 @@ void i915_restore_display_reg(struct drm_device *dev)
         else
                 I915_WRITE(ADPA, dev_priv->regfile.saveADPA);
 
+        /* Display Port state */
+        if (SUPPORTS_INTEGRATED_DP(dev)) {
+                I915_WRITE(DP_B, dev_priv->regfile.saveDP_B);
+                I915_WRITE(DP_C, dev_priv->regfile.saveDP_C);
+                I915_WRITE(DP_D, dev_priv->regfile.saveDP_D);
+        }
+        /* FIXME: restore TV & SDVO state */
+
         return;
 }