aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/arm/mach-mvebu/platsmp-a9.c20
1 files changed, 11 insertions, 9 deletions
diff --git a/arch/arm/mach-mvebu/platsmp-a9.c b/arch/arm/mach-mvebu/platsmp-a9.c
index 04d0b1847c39..96c2c59e34b6 100644
--- a/arch/arm/mach-mvebu/platsmp-a9.c
+++ b/arch/arm/mach-mvebu/platsmp-a9.c
@@ -20,6 +20,7 @@
20#include <asm/smp_scu.h> 20#include <asm/smp_scu.h>
21#include <asm/smp_plat.h> 21#include <asm/smp_plat.h>
22#include "common.h" 22#include "common.h"
23#include "mvebu-soc-id.h"
23#include "pmsu.h" 24#include "pmsu.h"
24 25
25#define CRYPT0_ENG_ID 41 26#define CRYPT0_ENG_ID 41
@@ -63,11 +64,19 @@ static int __cpuinit mvebu_cortex_a9_boot_secondary(unsigned int cpu,
63 */ 64 */
64 hw_cpu = cpu_logical_map(cpu); 65 hw_cpu = cpu_logical_map(cpu);
65 66
66 if (of_machine_is_compatible("marvell,armada375")) 67 if (of_machine_is_compatible("marvell,armada375")) {
68 u32 dev, rev;
69
70 if (mvebu_get_soc_id(&dev, &rev) == 0 &&
71 rev == ARMADA_375_Z1_REV)
72 armada_375_smp_cpu1_enable_wa();
73
67 mvebu_system_controller_set_cpu_boot_addr(mvebu_cortex_a9_secondary_startup); 74 mvebu_system_controller_set_cpu_boot_addr(mvebu_cortex_a9_secondary_startup);
68 else 75 }
76 else {
69 mvebu_pmsu_set_cpu_boot_addr(hw_cpu, 77 mvebu_pmsu_set_cpu_boot_addr(hw_cpu,
70 mvebu_cortex_a9_secondary_startup); 78 mvebu_cortex_a9_secondary_startup);
79 }
71 80
72 smp_wmb(); 81 smp_wmb();
73 ret = mvebu_cpu_reset_deassert(hw_cpu); 82 ret = mvebu_cpu_reset_deassert(hw_cpu);
@@ -80,14 +89,7 @@ static int __cpuinit mvebu_cortex_a9_boot_secondary(unsigned int cpu,
80 return 0; 89 return 0;
81} 90}
82 91
83static void __init mvebu_cortex_a9_smp_prepare_cpus(unsigned int max_cpus)
84{
85 if (of_machine_is_compatible("marvell,armada375"))
86 armada_375_smp_cpu1_enable_wa();
87}
88
89static struct smp_operations mvebu_cortex_a9_smp_ops __initdata = { 92static struct smp_operations mvebu_cortex_a9_smp_ops __initdata = {
90 .smp_prepare_cpus = mvebu_cortex_a9_smp_prepare_cpus,
91 .smp_boot_secondary = mvebu_cortex_a9_boot_secondary, 93 .smp_boot_secondary = mvebu_cortex_a9_boot_secondary,
92#ifdef CONFIG_HOTPLUG_CPU 94#ifdef CONFIG_HOTPLUG_CPU
93 .cpu_die = armada_xp_cpu_die, 95 .cpu_die = armada_xp_cpu_die,