diff options
| -rw-r--r-- | arch/x86/kernel/cpu/common.c | 6 | ||||
| -rw-r--r-- | arch/x86/kernel/cpu/intel.c | 4 | ||||
| -rw-r--r-- | arch/x86/platform/intel-mid/intel-mid.c | 2 |
3 files changed, 9 insertions, 3 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index b5c8ff5e9dfc..2346c95c6ab1 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c | |||
| @@ -1396,6 +1396,12 @@ void cpu_init(void) | |||
| 1396 | 1396 | ||
| 1397 | wait_for_master_cpu(cpu); | 1397 | wait_for_master_cpu(cpu); |
| 1398 | 1398 | ||
| 1399 | /* | ||
| 1400 | * Initialize the CR4 shadow before doing anything that could | ||
| 1401 | * try to read it. | ||
| 1402 | */ | ||
| 1403 | cr4_init_shadow(); | ||
| 1404 | |||
| 1399 | show_ucode_info_early(); | 1405 | show_ucode_info_early(); |
| 1400 | 1406 | ||
| 1401 | printk(KERN_INFO "Initializing CPU#%d\n", cpu); | 1407 | printk(KERN_INFO "Initializing CPU#%d\n", cpu); |
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 94d7dcb12145..50163fa9034f 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c | |||
| @@ -565,8 +565,8 @@ static const struct _tlb_table intel_tlb_table[] = { | |||
| 565 | { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" }, | 565 | { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" }, |
| 566 | { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" }, | 566 | { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" }, |
| 567 | { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" }, | 567 | { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" }, |
| 568 | { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set ssociative" }, | 568 | { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set associative" }, |
| 569 | { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set ssociative" }, | 569 | { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set associative" }, |
| 570 | { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" }, | 570 | { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" }, |
| 571 | { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" }, | 571 | { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" }, |
| 572 | { 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" }, | 572 | { 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" }, |
diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c index 1bbedc4b0f88..3005f0c89f2e 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c | |||
| @@ -130,7 +130,7 @@ static void intel_mid_arch_setup(void) | |||
| 130 | intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip](); | 130 | intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip](); |
| 131 | else { | 131 | else { |
| 132 | intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL](); | 132 | intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL](); |
| 133 | pr_info("ARCH: Uknown SoC, assuming PENWELL!\n"); | 133 | pr_info("ARCH: Unknown SoC, assuming PENWELL!\n"); |
| 134 | } | 134 | } |
| 135 | 135 | ||
| 136 | out: | 136 | out: |
