diff options
| -rw-r--r-- | arch/mips/cavium-octeon/octeon-irq.c | 30 |
1 files changed, 2 insertions, 28 deletions
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index bccbda90f7b7..fac22a89f614 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c | |||
| @@ -729,18 +729,6 @@ static struct irq_chip octeon_irq_chip_ciu_v2 = { | |||
| 729 | .name = "CIU", | 729 | .name = "CIU", |
| 730 | .irq_enable = octeon_irq_ciu_enable_v2, | 730 | .irq_enable = octeon_irq_ciu_enable_v2, |
| 731 | .irq_disable = octeon_irq_ciu_disable_all_v2, | 731 | .irq_disable = octeon_irq_ciu_disable_all_v2, |
| 732 | .irq_mask = octeon_irq_ciu_disable_local_v2, | ||
| 733 | .irq_unmask = octeon_irq_ciu_enable_v2, | ||
| 734 | #ifdef CONFIG_SMP | ||
| 735 | .irq_set_affinity = octeon_irq_ciu_set_affinity_v2, | ||
| 736 | .irq_cpu_offline = octeon_irq_cpu_offline_ciu, | ||
| 737 | #endif | ||
| 738 | }; | ||
| 739 | |||
| 740 | static struct irq_chip octeon_irq_chip_ciu_edge_v2 = { | ||
| 741 | .name = "CIU-E", | ||
| 742 | .irq_enable = octeon_irq_ciu_enable_v2, | ||
| 743 | .irq_disable = octeon_irq_ciu_disable_all_v2, | ||
| 744 | .irq_ack = octeon_irq_ciu_ack, | 732 | .irq_ack = octeon_irq_ciu_ack, |
| 745 | .irq_mask = octeon_irq_ciu_disable_local_v2, | 733 | .irq_mask = octeon_irq_ciu_disable_local_v2, |
| 746 | .irq_unmask = octeon_irq_ciu_enable_v2, | 734 | .irq_unmask = octeon_irq_ciu_enable_v2, |
| @@ -754,19 +742,8 @@ static struct irq_chip octeon_irq_chip_ciu = { | |||
| 754 | .name = "CIU", | 742 | .name = "CIU", |
| 755 | .irq_enable = octeon_irq_ciu_enable, | 743 | .irq_enable = octeon_irq_ciu_enable, |
| 756 | .irq_disable = octeon_irq_ciu_disable_all, | 744 | .irq_disable = octeon_irq_ciu_disable_all, |
| 757 | .irq_mask = octeon_irq_dummy_mask, | ||
| 758 | #ifdef CONFIG_SMP | ||
| 759 | .irq_set_affinity = octeon_irq_ciu_set_affinity, | ||
| 760 | .irq_cpu_offline = octeon_irq_cpu_offline_ciu, | ||
| 761 | #endif | ||
| 762 | }; | ||
| 763 | |||
| 764 | static struct irq_chip octeon_irq_chip_ciu_edge = { | ||
| 765 | .name = "CIU-E", | ||
| 766 | .irq_enable = octeon_irq_ciu_enable, | ||
| 767 | .irq_disable = octeon_irq_ciu_disable_all, | ||
| 768 | .irq_mask = octeon_irq_dummy_mask, | ||
| 769 | .irq_ack = octeon_irq_ciu_ack, | 745 | .irq_ack = octeon_irq_ciu_ack, |
| 746 | .irq_mask = octeon_irq_dummy_mask, | ||
| 770 | #ifdef CONFIG_SMP | 747 | #ifdef CONFIG_SMP |
| 771 | .irq_set_affinity = octeon_irq_ciu_set_affinity, | 748 | .irq_set_affinity = octeon_irq_ciu_set_affinity, |
| 772 | .irq_cpu_offline = octeon_irq_cpu_offline_ciu, | 749 | .irq_cpu_offline = octeon_irq_cpu_offline_ciu, |
| @@ -993,7 +970,6 @@ static void __init octeon_irq_init_ciu(void) | |||
| 993 | { | 970 | { |
| 994 | unsigned int i; | 971 | unsigned int i; |
| 995 | struct irq_chip *chip; | 972 | struct irq_chip *chip; |
| 996 | struct irq_chip *chip_edge; | ||
| 997 | struct irq_chip *chip_mbox; | 973 | struct irq_chip *chip_mbox; |
| 998 | struct irq_chip *chip_wd; | 974 | struct irq_chip *chip_wd; |
| 999 | struct irq_chip *chip_gpio; | 975 | struct irq_chip *chip_gpio; |
| @@ -1008,7 +984,6 @@ static void __init octeon_irq_init_ciu(void) | |||
| 1008 | octeon_irq_ip2 = octeon_irq_ip2_v2; | 984 | octeon_irq_ip2 = octeon_irq_ip2_v2; |
| 1009 | octeon_irq_ip3 = octeon_irq_ip3_v2; | 985 | octeon_irq_ip3 = octeon_irq_ip3_v2; |
| 1010 | chip = &octeon_irq_chip_ciu_v2; | 986 | chip = &octeon_irq_chip_ciu_v2; |
| 1011 | chip_edge = &octeon_irq_chip_ciu_edge_v2; | ||
| 1012 | chip_mbox = &octeon_irq_chip_ciu_mbox_v2; | 987 | chip_mbox = &octeon_irq_chip_ciu_mbox_v2; |
| 1013 | chip_wd = &octeon_irq_chip_ciu_wd_v2; | 988 | chip_wd = &octeon_irq_chip_ciu_wd_v2; |
| 1014 | chip_gpio = &octeon_irq_chip_ciu_gpio_v2; | 989 | chip_gpio = &octeon_irq_chip_ciu_gpio_v2; |
| @@ -1016,7 +991,6 @@ static void __init octeon_irq_init_ciu(void) | |||
| 1016 | octeon_irq_ip2 = octeon_irq_ip2_v1; | 991 | octeon_irq_ip2 = octeon_irq_ip2_v1; |
| 1017 | octeon_irq_ip3 = octeon_irq_ip3_v1; | 992 | octeon_irq_ip3 = octeon_irq_ip3_v1; |
| 1018 | chip = &octeon_irq_chip_ciu; | 993 | chip = &octeon_irq_chip_ciu; |
| 1019 | chip_edge = &octeon_irq_chip_ciu_edge; | ||
| 1020 | chip_mbox = &octeon_irq_chip_ciu_mbox; | 994 | chip_mbox = &octeon_irq_chip_ciu_mbox; |
| 1021 | chip_wd = &octeon_irq_chip_ciu_wd; | 995 | chip_wd = &octeon_irq_chip_ciu_wd; |
| 1022 | chip_gpio = &octeon_irq_chip_ciu_gpio; | 996 | chip_gpio = &octeon_irq_chip_ciu_gpio; |
| @@ -1046,7 +1020,7 @@ static void __init octeon_irq_init_ciu(void) | |||
| 1046 | octeon_irq_set_ciu_mapping(OCTEON_IRQ_TWSI, 0, 45, chip, handle_level_irq); | 1020 | octeon_irq_set_ciu_mapping(OCTEON_IRQ_TWSI, 0, 45, chip, handle_level_irq); |
| 1047 | octeon_irq_set_ciu_mapping(OCTEON_IRQ_RML, 0, 46, chip, handle_level_irq); | 1021 | octeon_irq_set_ciu_mapping(OCTEON_IRQ_RML, 0, 46, chip, handle_level_irq); |
| 1048 | for (i = 0; i < 4; i++) | 1022 | for (i = 0; i < 4; i++) |
| 1049 | octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip_edge, handle_edge_irq); | 1023 | octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip, handle_edge_irq); |
| 1050 | 1024 | ||
| 1051 | octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq); | 1025 | octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq); |
| 1052 | octeon_irq_set_ciu_mapping(OCTEON_IRQ_TWSI2, 0, 59, chip, handle_level_irq); | 1026 | octeon_irq_set_ciu_mapping(OCTEON_IRQ_TWSI2, 0, 59, chip, handle_level_irq); |
