diff options
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2a878a35facc..1d22238416c7 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi | |||
| @@ -149,6 +149,11 @@ | |||
| 149 | clock-frequency = <24000000>; | 149 | clock-frequency = <24000000>; |
| 150 | }; | 150 | }; |
| 151 | 151 | ||
| 152 | display-subsystem { | ||
| 153 | compatible = "rockchip,display-subsystem"; | ||
| 154 | ports = <&vopl_out>, <&vopb_out>; | ||
| 155 | }; | ||
| 156 | |||
| 152 | sdmmc: dwmmc@ff0c0000 { | 157 | sdmmc: dwmmc@ff0c0000 { |
| 153 | compatible = "rockchip,rk3288-dw-mshc"; | 158 | compatible = "rockchip,rk3288-dw-mshc"; |
| 154 | clock-freq-min-max = <400000 150000000>; | 159 | clock-freq-min-max = <400000 150000000>; |
| @@ -566,6 +571,23 @@ | |||
| 566 | status = "disabled"; | 571 | status = "disabled"; |
| 567 | }; | 572 | }; |
| 568 | 573 | ||
| 574 | vopb: vop@ff930000 { | ||
| 575 | compatible = "rockchip,rk3288-vop"; | ||
| 576 | reg = <0xff930000 0x19c>; | ||
| 577 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | ||
| 578 | clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; | ||
| 579 | clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; | ||
| 580 | resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; | ||
| 581 | reset-names = "axi", "ahb", "dclk"; | ||
| 582 | iommus = <&vopb_mmu>; | ||
| 583 | status = "disabled"; | ||
| 584 | |||
| 585 | vopb_out: port { | ||
| 586 | #address-cells = <1>; | ||
| 587 | #size-cells = <0>; | ||
| 588 | }; | ||
| 589 | }; | ||
| 590 | |||
| 569 | vopb_mmu: iommu@ff930300 { | 591 | vopb_mmu: iommu@ff930300 { |
| 570 | compatible = "rockchip,iommu"; | 592 | compatible = "rockchip,iommu"; |
| 571 | reg = <0xff930300 0x100>; | 593 | reg = <0xff930300 0x100>; |
| @@ -575,6 +597,23 @@ | |||
| 575 | status = "disabled"; | 597 | status = "disabled"; |
| 576 | }; | 598 | }; |
| 577 | 599 | ||
| 600 | vopl: vop@ff940000 { | ||
| 601 | compatible = "rockchip,rk3288-vop"; | ||
| 602 | reg = <0xff940000 0x19c>; | ||
| 603 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | ||
| 604 | clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; | ||
| 605 | clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; | ||
| 606 | resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; | ||
| 607 | reset-names = "axi", "ahb", "dclk"; | ||
| 608 | iommus = <&vopl_mmu>; | ||
| 609 | status = "disabled"; | ||
| 610 | |||
| 611 | vopl_out: port { | ||
| 612 | #address-cells = <1>; | ||
| 613 | #size-cells = <0>; | ||
| 614 | }; | ||
| 615 | }; | ||
| 616 | |||
| 578 | vopl_mmu: iommu@ff940300 { | 617 | vopl_mmu: iommu@ff940300 { |
| 579 | compatible = "rockchip,iommu"; | 618 | compatible = "rockchip,iommu"; |
| 580 | reg = <0xff940300 0x100>; | 619 | reg = <0xff940300 0x100>; |
