diff options
| -rw-r--r-- | arch/arm/mach-shmobile/include/mach/sh73a0.h | 21 | ||||
| -rw-r--r-- | arch/arm/mach-shmobile/pfc-sh73a0.c | 85 |
2 files changed, 97 insertions, 9 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h index 8a6593964402..ceb2cdc92bf9 100644 --- a/arch/arm/mach-shmobile/include/mach/sh73a0.h +++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h | |||
| @@ -441,6 +441,27 @@ enum { | |||
| 441 | GPIO_FN_RESETA_N_PU_OFF, | 441 | GPIO_FN_RESETA_N_PU_OFF, |
| 442 | GPIO_FN_EDBGREQ_PD, | 442 | GPIO_FN_EDBGREQ_PD, |
| 443 | GPIO_FN_EDBGREQ_PU, | 443 | GPIO_FN_EDBGREQ_PU, |
| 444 | |||
| 445 | /* Functions with pull-ups */ | ||
| 446 | GPIO_FN_KEYIN0_PU, | ||
| 447 | GPIO_FN_KEYIN1_PU, | ||
| 448 | GPIO_FN_KEYIN2_PU, | ||
| 449 | GPIO_FN_KEYIN3_PU, | ||
| 450 | GPIO_FN_KEYIN4_PU, | ||
| 451 | GPIO_FN_KEYIN5_PU, | ||
| 452 | GPIO_FN_KEYIN6_PU, | ||
| 453 | GPIO_FN_KEYIN7_PU, | ||
| 454 | GPIO_FN_SDHID1_0_PU, | ||
| 455 | GPIO_FN_SDHID1_1_PU, | ||
| 456 | GPIO_FN_SDHID1_2_PU, | ||
| 457 | GPIO_FN_SDHID1_3_PU, | ||
| 458 | GPIO_FN_SDHICMD1_PU, | ||
| 459 | GPIO_FN_MMCCMD0_PU, | ||
| 460 | GPIO_FN_MMCCMD1_PU, | ||
| 461 | GPIO_FN_FSIACK_PU, | ||
| 462 | GPIO_FN_FSIAILR_PU, | ||
| 463 | GPIO_FN_FSIAIBT_PU, | ||
| 464 | GPIO_FN_FSIAISLD_PU, | ||
| 444 | }; | 465 | }; |
| 445 | 466 | ||
| 446 | #endif /* __ASM_SH73A0_H__ */ | 467 | #endif /* __ASM_SH73A0_H__ */ |
diff --git a/arch/arm/mach-shmobile/pfc-sh73a0.c b/arch/arm/mach-shmobile/pfc-sh73a0.c index 1681170f9a4f..3eed44eb98b4 100644 --- a/arch/arm/mach-shmobile/pfc-sh73a0.c +++ b/arch/arm/mach-shmobile/pfc-sh73a0.c | |||
| @@ -479,6 +479,27 @@ enum { | |||
| 479 | EDBGREQ_PD_MARK, | 479 | EDBGREQ_PD_MARK, |
| 480 | EDBGREQ_PU_MARK, | 480 | EDBGREQ_PU_MARK, |
| 481 | 481 | ||
| 482 | /* Functions with pull-ups */ | ||
| 483 | KEYIN0_PU_MARK, | ||
| 484 | KEYIN1_PU_MARK, | ||
| 485 | KEYIN2_PU_MARK, | ||
| 486 | KEYIN3_PU_MARK, | ||
| 487 | KEYIN4_PU_MARK, | ||
| 488 | KEYIN5_PU_MARK, | ||
| 489 | KEYIN6_PU_MARK, | ||
| 490 | KEYIN7_PU_MARK, | ||
| 491 | SDHID1_0_PU_MARK, | ||
| 492 | SDHID1_1_PU_MARK, | ||
| 493 | SDHID1_2_PU_MARK, | ||
| 494 | SDHID1_3_PU_MARK, | ||
| 495 | SDHICMD1_PU_MARK, | ||
| 496 | MMCCMD0_PU_MARK, | ||
| 497 | MMCCMD1_PU_MARK, | ||
| 498 | FSIACK_PU_MARK, | ||
| 499 | FSIAILR_PU_MARK, | ||
| 500 | FSIAIBT_PU_MARK, | ||
| 501 | FSIAISLD_PU_MARK, | ||
| 502 | |||
| 482 | PINMUX_MARK_END, | 503 | PINMUX_MARK_END, |
| 483 | }; | 504 | }; |
| 484 | 505 | ||
| @@ -935,26 +956,26 @@ static pinmux_enum_t pinmux_data[] = { | |||
| 935 | PINMUX_DATA(KEYOUT0_MARK, PORT65_FN2), \ | 956 | PINMUX_DATA(KEYOUT0_MARK, PORT65_FN2), \ |
| 936 | PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN4, MSEL3CR_MSEL11_0), | 957 | PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN4, MSEL3CR_MSEL11_0), |
| 937 | PINMUX_DATA(A20_MARK, PORT66_FN1), \ | 958 | PINMUX_DATA(A20_MARK, PORT66_FN1), \ |
| 938 | PINMUX_DATA(KEYIN0_MARK, PORT66_FN2, PORT66_IN_PU), \ | 959 | PINMUX_DATA(KEYIN0_MARK, PORT66_FN2), \ |
| 939 | PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN4, MSEL3CR_MSEL11_0), | 960 | PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN4, MSEL3CR_MSEL11_0), |
| 940 | PINMUX_DATA(A21_MARK, PORT67_FN1), \ | 961 | PINMUX_DATA(A21_MARK, PORT67_FN1), \ |
| 941 | PINMUX_DATA(KEYIN1_MARK, PORT67_FN2, PORT67_IN_PU), \ | 962 | PINMUX_DATA(KEYIN1_MARK, PORT67_FN2), \ |
| 942 | PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN4, MSEL3CR_MSEL11_0), | 963 | PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN4, MSEL3CR_MSEL11_0), |
| 943 | PINMUX_DATA(A22_MARK, PORT68_FN1), \ | 964 | PINMUX_DATA(A22_MARK, PORT68_FN1), \ |
| 944 | PINMUX_DATA(KEYIN2_MARK, PORT68_FN2, PORT68_IN_PU), \ | 965 | PINMUX_DATA(KEYIN2_MARK, PORT68_FN2), \ |
| 945 | PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN4, MSEL3CR_MSEL11_0), | 966 | PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN4, MSEL3CR_MSEL11_0), |
| 946 | PINMUX_DATA(A23_MARK, PORT69_FN1), \ | 967 | PINMUX_DATA(A23_MARK, PORT69_FN1), \ |
| 947 | PINMUX_DATA(KEYIN3_MARK, PORT69_FN2, PORT69_IN_PU), \ | 968 | PINMUX_DATA(KEYIN3_MARK, PORT69_FN2), \ |
| 948 | PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN4, MSEL3CR_MSEL11_0), | 969 | PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN4, MSEL3CR_MSEL11_0), |
| 949 | PINMUX_DATA(A24_MARK, PORT70_FN1), \ | 970 | PINMUX_DATA(A24_MARK, PORT70_FN1), \ |
| 950 | PINMUX_DATA(KEYIN4_MARK, PORT70_FN2, PORT70_IN_PU), \ | 971 | PINMUX_DATA(KEYIN4_MARK, PORT70_FN2), \ |
| 951 | PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN4, MSEL3CR_MSEL11_0), | 972 | PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN4, MSEL3CR_MSEL11_0), |
| 952 | PINMUX_DATA(A25_MARK, PORT71_FN1), \ | 973 | PINMUX_DATA(A25_MARK, PORT71_FN1), \ |
| 953 | PINMUX_DATA(KEYIN5_MARK, PORT71_FN2, PORT71_IN_PU), \ | 974 | PINMUX_DATA(KEYIN5_MARK, PORT71_FN2), \ |
| 954 | PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN4, MSEL3CR_MSEL11_0), | 975 | PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN4, MSEL3CR_MSEL11_0), |
| 955 | PINMUX_DATA(A26_MARK, PORT72_FN1), \ | 976 | PINMUX_DATA(A26_MARK, PORT72_FN1), \ |
| 956 | PINMUX_DATA(KEYIN6_MARK, PORT72_FN2, PORT72_IN_PU), | 977 | PINMUX_DATA(KEYIN6_MARK, PORT72_FN2), |
| 957 | PINMUX_DATA(KEYIN7_MARK, PORT73_FN2, PORT73_IN_PU), | 978 | PINMUX_DATA(KEYIN7_MARK, PORT73_FN2), |
| 958 | PINMUX_DATA(D0_NAF0_MARK, PORT74_FN1), | 979 | PINMUX_DATA(D0_NAF0_MARK, PORT74_FN1), |
| 959 | PINMUX_DATA(D1_NAF1_MARK, PORT75_FN1), | 980 | PINMUX_DATA(D1_NAF1_MARK, PORT75_FN1), |
| 960 | PINMUX_DATA(D2_NAF2_MARK, PORT76_FN1), | 981 | PINMUX_DATA(D2_NAF2_MARK, PORT76_FN1), |
| @@ -1484,6 +1505,31 @@ static pinmux_enum_t pinmux_data[] = { | |||
| 1484 | PINMUX_DATA(RESETA_N_PU_OFF_MARK, MSEL4CR_MSEL4_1), | 1505 | PINMUX_DATA(RESETA_N_PU_OFF_MARK, MSEL4CR_MSEL4_1), |
| 1485 | PINMUX_DATA(EDBGREQ_PD_MARK, MSEL4CR_MSEL1_0), | 1506 | PINMUX_DATA(EDBGREQ_PD_MARK, MSEL4CR_MSEL1_0), |
| 1486 | PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1), | 1507 | PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1), |
| 1508 | |||
| 1509 | /* Functions with pull-ups */ | ||
| 1510 | PINMUX_DATA(KEYIN0_PU_MARK, PORT66_FN2, PORT66_IN_PU), | ||
| 1511 | PINMUX_DATA(KEYIN1_PU_MARK, PORT67_FN2, PORT67_IN_PU), | ||
| 1512 | PINMUX_DATA(KEYIN2_PU_MARK, PORT68_FN2, PORT68_IN_PU), | ||
| 1513 | PINMUX_DATA(KEYIN3_PU_MARK, PORT69_FN2, PORT69_IN_PU), | ||
| 1514 | PINMUX_DATA(KEYIN4_PU_MARK, PORT70_FN2, PORT70_IN_PU), | ||
| 1515 | PINMUX_DATA(KEYIN5_PU_MARK, PORT71_FN2, PORT71_IN_PU), | ||
| 1516 | PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU), | ||
| 1517 | PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU), | ||
| 1518 | |||
| 1519 | PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_IN_PU, PORT259_FN1), | ||
| 1520 | PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_IN_PU, PORT260_FN1), | ||
| 1521 | PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_IN_PU, PORT261_FN1), | ||
| 1522 | PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_IN_PU, PORT262_FN1), | ||
| 1523 | PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_IN_PU, PORT263_FN1), | ||
| 1524 | |||
| 1525 | PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU, | ||
| 1526 | MSEL4CR_MSEL15_0), | ||
| 1527 | PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT279_IN_PU, | ||
| 1528 | MSEL4CR_MSEL15_1), | ||
| 1529 | PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), | ||
| 1530 | PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), | ||
| 1531 | PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU), | ||
| 1532 | PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU), | ||
| 1487 | }; | 1533 | }; |
| 1488 | 1534 | ||
| 1489 | #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA) | 1535 | #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA) |
| @@ -2125,6 +2171,27 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
| 2125 | GPIO_FN(RESETA_N_PU_OFF), | 2171 | GPIO_FN(RESETA_N_PU_OFF), |
| 2126 | GPIO_FN(EDBGREQ_PD), | 2172 | GPIO_FN(EDBGREQ_PD), |
| 2127 | GPIO_FN(EDBGREQ_PU), | 2173 | GPIO_FN(EDBGREQ_PU), |
| 2174 | |||
| 2175 | /* Functions with pull-ups */ | ||
| 2176 | GPIO_FN(KEYIN0_PU), | ||
| 2177 | GPIO_FN(KEYIN1_PU), | ||
| 2178 | GPIO_FN(KEYIN2_PU), | ||
| 2179 | GPIO_FN(KEYIN3_PU), | ||
| 2180 | GPIO_FN(KEYIN4_PU), | ||
| 2181 | GPIO_FN(KEYIN5_PU), | ||
| 2182 | GPIO_FN(KEYIN6_PU), | ||
| 2183 | GPIO_FN(KEYIN7_PU), | ||
| 2184 | GPIO_FN(SDHID1_0_PU), | ||
| 2185 | GPIO_FN(SDHID1_1_PU), | ||
| 2186 | GPIO_FN(SDHID1_2_PU), | ||
| 2187 | GPIO_FN(SDHID1_3_PU), | ||
| 2188 | GPIO_FN(SDHICMD1_PU), | ||
| 2189 | GPIO_FN(MMCCMD0_PU), | ||
| 2190 | GPIO_FN(MMCCMD1_PU), | ||
| 2191 | GPIO_FN(FSIACK_PU), | ||
| 2192 | GPIO_FN(FSIAILR_PU), | ||
| 2193 | GPIO_FN(FSIAIBT_PU), | ||
| 2194 | GPIO_FN(FSIAISLD_PU), | ||
| 2128 | }; | 2195 | }; |
| 2129 | 2196 | ||
| 2130 | #define PORTCR(nr, reg) \ | 2197 | #define PORTCR(nr, reg) \ |
| @@ -2663,7 +2730,7 @@ static struct pinmux_info sh73a0_pinmux_info = { | |||
| 2663 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | 2730 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, |
| 2664 | 2731 | ||
| 2665 | .first_gpio = GPIO_PORT0, | 2732 | .first_gpio = GPIO_PORT0, |
| 2666 | .last_gpio = GPIO_FN_EDBGREQ_PU, | 2733 | .last_gpio = GPIO_FN_FSIAISLD_PU, |
| 2667 | 2734 | ||
| 2668 | .gpios = pinmux_gpios, | 2735 | .gpios = pinmux_gpios, |
| 2669 | .cfg_regs = pinmux_config_regs, | 2736 | .cfg_regs = pinmux_config_regs, |
